]> Pileus Git - ~andy/linux/commitdiff
ARM: l2x0: use -st dsb option for ordering writel_relaxed with unlock
authorWill Deacon <will.deacon@arm.com>
Wed, 12 Jun 2013 08:59:59 +0000 (09:59 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 12 Aug 2013 11:25:46 +0000 (12:25 +0100)
writel_relaxed and spin_unlock are both store operations, so we only
need to enforce store ordering in the dsb.

Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm/mm/cache-l2x0.c

index d70e0aba0c9d9b4a0d10a78c627e159b1bf90d9b..0c3fc276bd303a619d3fc22e6319e51aa0ea2d97 100644 (file)
@@ -290,7 +290,7 @@ static void l2x0_disable(void)
        raw_spin_lock_irqsave(&l2x0_lock, flags);
        __l2x0_flush_all();
        writel_relaxed(0, l2x0_base + L2X0_CTRL);
-       dsb();
+       dsb(st);
        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }