]> Pileus Git - ~andy/linux/commitdiff
ARM: cacheflush: use -ishst dsb variant for ensuring flush completion
authorWill Deacon <will.deacon@arm.com>
Wed, 12 Jun 2013 09:03:30 +0000 (10:03 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 12 Aug 2013 11:25:46 +0000 (12:25 +0100)
flush_cache_vmap contains a dsb to ensure that any cacheflushing
operations to flush out newly written ptes have completed.

This patch adds the -ishst option to the dsb, since that is all that is
required for completing cacheflushing in the inner-shareable domain.

Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm/include/asm/cacheflush.h

index 17d0ae8672fa666b8d1e43ae40b0226e1bd04ac8..04d73262e0035ef8faab84f4138286c1e1735bc7 100644 (file)
@@ -352,7 +352,7 @@ static inline void flush_cache_vmap(unsigned long start, unsigned long end)
                 * set_pte_at() called from vmap_pte_range() does not
                 * have a DSB after cleaning the cache line.
                 */
-               dsb();
+               dsb(ishst);
 }
 
 static inline void flush_cache_vunmap(unsigned long start, unsigned long end)