Pileus Git - ~andy/csm213a-hw/blob - hw2/examples.cpp

   1 #include "mbed.h"
   2 #include "serial_dma.h"
   3 #include "timer_dma.h"
   4
   5 /**
   6  *
   7  * Only port A, C, and D can do aysnc DMA (p. 67)
   8  *
   9  * DMA Channel Allocation:
  10  *     Ch  Trigger    Description
  11  *     0   gpio       timestamp (async event)
  12  *     1   uart1      transmit
  13  *     2   uart2 tx   timestamp (time sync xmt)
  14  *     3   uart2 rx   timestamp (time sync rcv)
  15  *
  16  * Uart Sources:
  17  *      UART 0     UART 1     UART 2
  18  *     xmt  rcv   xmt  rcv   xmt  rcv
  19  *     ---  ---   ---  ---   ---  ---
  20  *     A2   A1  --A19  A18-- -    -
  21  *     A14  A15   -    -     -    -
  22  *     B17  B16   -    -     -    -
  23  *     -    -   **C4   C3--  -    -
  24  *     D7   D6    -    -   **D3/3 D2/3** <<<
  25  *     -    -     -    -   **D5/3 D4/3**
  26  *     E20  E21   E0   E1    E16  E17
  27  *     -    -     -    -     E22  E23
  28  *
  29  * Pinout
  30  *     A1    B18        E30  C1
  31  *     A2    B19        B20  C2
  32  *     D3    C0         E23  B3
  33  *     A12   C4         E22  B2
  34  *     A4    C6         E21  B1
  35  *     A5    C7         E20  B0
  36  *     C8    C10
  37  *     C9    C11        E2   P5-9V
  38  *                      E3   GND
  39  *     A13   C13        E6   GND
  40  *     D2    C16        E16  P5V-USB
  41  *     D4    A7         E17  P3V3
  42  *     D6    A6         E18  RST
  43  *     D7    A14        E19  P3V3
  44  *     D5    A15        E31  SDA/D5
  45  *     GND   A15
  46  *     VREFH A17
  47  *     E0    B9
  48  *     E1    --
  49  */
  50
  51 /* Trigger select options */
  52
  53 #define TMP_CONF_TRGSEL_EXTRG 0x0 // 0b0000 External trigger pin input (EXTRG_IN)
  54 #define TMP_CONF_TRGSEL_CMP0  0x1 // 0b0001 CMP0 output
  55 #define TMP_CONF_TRGSEL_PIT0  0x4 // 0b0100 PIT trigger 0
  56 #define TMP_CONF_TRGSEL_PIT1  0x5 // 0b0101 PIT trigger 1
  57 #define TMP_CONF_TRGSEL_TPM0  0x8 // 0b1000 TPM0 overflow
  58 #define TMP_CONF_TRGSEL_TPM1  0x9 // 0b1001 TPM1 overflow
  59 #define TMP_CONF_TRGSEL_TPM2  0xA // 0b1010 TPM2 overflow
  60 #define TMP_CONF_TRGSEL_RTCA  0xC // 0b1100 RTC alarm
  61 #define TMP_CONF_TRGSEL_RTCS  0xD // 0b1101 RTC seconds
  62 #define TMP_CONF_TRGSEL_LPTMR 0xE // 0b1110 LPTMR trigger
  63
  64 /********************
  65  * Data definitions *
  66  ********************/
  67
  68 // LEDs
  69 extern DigitalOut led1;
  70 extern DigitalOut led2;
  71
  72 // UARTs
  73 extern Serial     uart0;
  74 extern Serial     uart1;
  75 extern Serial     uart2;
  76
  77 // Serial DMA
  78 extern sdma_t    *sdma0;
  79 extern sdma_t    *sdma1;
  80 extern sdma_t    *sdma2;
  81
  82 // Timer DMA
  83 extern tdma_t    *tdma0;
  84 extern tdma_t    *tdma1;
  85 extern tdma_t    *tdma2;
  86 extern tdma_t    *tdma3;
  87
  88 /********
  89  * Main *
  90  ********/
  91
  92 void test_tpm_init(void)
  93 {
  94         // EXTRG_IN - PTB8 - alt 3
  95         //            PTC0 - alt 3
  96         //            PTC6 - alt 3
  97
  98         // Setup System Integration Module
  99         SIM_Type *sim = SIM;
 100
 101         sim->SCGC5 |= SIM_SCGC5_PORTA_MASK
 102                    |  SIM_SCGC5_PORTB_MASK
 103                    |  SIM_SCGC5_PORTC_MASK
 104                    |  SIM_SCGC5_PORTD_MASK
 105                    |  SIM_SCGC5_PORTE_MASK
 106                    |  SIM_SCGC5_LPTMR_MASK;
 107
 108         sim->SCGC6 |= SIM_SCGC6_TPM0_MASK
 109                    |  SIM_SCGC6_TPM1_MASK
 110                    |  SIM_SCGC6_TPM2_MASK
 111                    |  SIM_SCGC6_DAC0_MASK
 112                    |  SIM_SCGC6_ADC0_MASK
 113                    |  SIM_SCGC6_PIT_MASK
 114                    |  SIM_SCGC6_DMAMUX_MASK
 115                    |  SIM_SCGC6_RTC_MASK;
 116
 117         sim->SOPT2 |= SIM_SOPT2_TPMSRC(1);
 118
 119         sim->SOPT4  = SIM_SOPT4_TPM1CLKSEL_MASK
 120                    |  SIM_SOPT4_TPM1CH0SRC(3);
 121
 122         printf("SOPT2:%08lx SCGC5:%08lx SCGC6:%08lx\r\n",
 123                         sim->SOPT2, sim->SCGC5, sim->SCGC6);
 124         //SOPT2:05010000 SCGC5:00003f83 SCGC6:07800001
 125
 126         //sim->SOPT7 |= SIM_SOPT7_ADC0TRGSEL(TMP_CONF_TRGSEL_EXTRG);
 127
 128         // Setup Port Control
 129         PORT_Type *port = PORTC;
 130
 131         PORTE->PCR[25] = PORT_PCR_ISF_MASK
 132                        | PORT_PCR_IRQC(0x1)
 133                        | PORT_PCR_MUX(3) ;
 134
 135         port->PCR[0]   = PORT_PCR_ISF_MASK
 136                        | PORT_PCR_IRQC(0x1)
 137                        | PORT_PCR_MUX(3)
 138                        | PORT_PCR_PE_MASK;
 139
 140         // Setup Timer/PWM Module
 141         volatile TPM_Type *tpm = TPM1;
 142
 143         tpm->SC               = TPM_SC_PS(0x7)
 144                               | TPM_SC_TOF_MASK;
 145
 146         tpm->CNT              = TPM_CNT_COUNT(0);
 147
 148         tpm->MOD              = TPM_CNT_COUNT(0xFFFF);
 149
 150         tpm->CONTROLS[1].CnV  = 0x1234;
 151         tpm->CONTROLS[1].CnSC = TPM_CnSC_CHF_MASK
 152                               | TPM_CnSC_CHIE_MASK
 153                               | TPM_CnSC_ELSA_MASK;
 154
 155         //tpm->CONTROLS[0].CnSC = TPM_CnSC_CHF_MASK
 156         //                    | TPM_CnSC_CHIE_MASK
 157         //                    | TPM_CnSC_MSB_MASK
 158         //                    | TPM_CnSC_MSA_MASK
 159         //                    | TPM_CnSC_ELSB_MASK
 160         //                    | TPM_CnSC_ELSA_MASK;
 161
 162         tpm->STATUS           = TPM_STATUS_CH0F_MASK
 163                               | TPM_STATUS_CH1F_MASK
 164                               | TPM_STATUS_CH2F_MASK
 165                               | TPM_STATUS_CH3F_MASK
 166                               | TPM_STATUS_CH4F_MASK
 167                               | TPM_STATUS_CH5F_MASK
 168                               | TPM_STATUS_TOF_MASK;
 169
 170         tpm->CONF             = TPM_CONF_TRGSEL(TMP_CONF_TRGSEL_EXTRG)
 171                               | TPM_CONF_CSOO_MASK
 172                               | TPM_CONF_CSOT_MASK
 173                               | TPM_CONF_GTBEEN_MASK
 174                               | TPM_CONF_DBGMODE_MASK;
 175
 176         tpm->SC               = TPM_SC_CMOD(1)
 177                               | TPM_SC_PS(0x7)
 178                               | TPM_SC_TOF_MASK;
 179
 180         printf("test - %02lx %08lx\r\n", tpm->CONTROLS[1].CnSC, tpm->CONTROLS[1].CnV); wait(0.1);
 181 }
 182
 183 void test_tpm_run(void)
 184 {
 185         //static DigitalIn pin(PTC0);
 186         //static DigitalIn pin(PTC2);
 187         //static int pin = 0;
 188
 189         printf("PTC0:%08lx GPCR:%08lx:%08lx - SC:%04lx CNT:%04lx MOD:%04lx STATUS:%04lx CONF:%08lx - CnSC:%02lx CnV:%04lx\r\n",
 190                         PORTC->PCR[0], PORTC->GPCHR, PORTC->GPCLR,
 191                         TPM1->SC, TPM1->CNT, TPM1->MOD, TPM1->STATUS, TPM1->CONF,
 192                         TPM1->CONTROLS[1].CnSC, TPM1->CONTROLS[1].CnV);
 193         TPM1->SC     |= TPM_STATUS_TOF_MASK;
 194         TPM1->STATUS |= TPM_STATUS_TOF_MASK;
 195 }
 196
 197 void test_pit_init(void)
 198 {
 199         //printf("test_pit_init\r\n");
 200
 201         // Enable
 202         SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;
 203         PIT->MCR    = 0;
 204
 205         // Channel 0
 206         PIT->CHANNEL[0].LDVAL = 0xFFFFFFFF;
 207         PIT->CHANNEL[0].TCTRL = 0;
 208
 209         // Channel 1
 210         PIT->CHANNEL[1].LDVAL = 0xFFFFFFFF;
 211         PIT->CHANNEL[1].TCTRL = PIT_TCTRL_CHN_MASK;
 212
 213         // Start timers
 214         PIT->CHANNEL[0].TCTRL |= PIT_TCTRL_TEN_MASK;
 215         PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK;
 216
 217 }
 218
 219 void test_pit_run(void)
 220 {
 221         register volatile uint32_t *tmh asm("r4") = &PIT->LTMR64H;
 222         register volatile uint32_t *tml asm("r5") = &PIT->LTMR64L;
 223
 224         register uint32_t hi0 asm("r0"), lo0 asm("r1");
 225         register uint32_t hi1 asm("r2"), lo1 asm("r3");
 226
 227         asm("ldr %0, [%4]\n\t" // Two clocks per load
 228             "ldr %1, [%5]\n\t"
 229             "ldr %2, [%4]\n\t"
 230             "ldr %3, [%5]\n\t"
 231             : "=r"(hi0), "=r"(lo0), "=r"(hi1), "=r"(lo1)
 232             :  "r"(tmh),  "r"(tml));
 233
 234         uint64_t tm0 = ~((uint64_t)hi0 << 32 | lo0);
 235         uint64_t tm1 = ~((uint64_t)hi1 << 32 | lo1);
 236         double   bus = 24E6;   // 24 MHz bus clock
 237
 238         printf(" - pit");
 239         printf("  %08lx:%08lx", (uint32_t)(tm0>>32), (uint32_t)tm0);
 240         printf("  %08lx:%08lx", (uint32_t)(tm1>>32), (uint32_t)tm1);
 241         printf("  %08lx",       (uint32_t)(tm1-tm0));
 242         printf("  %f",          (double)tm0 / bus);
 243 }
 244
 245 void test_sdma_init(void)
 246 {
 247         sdma0 = sdma_open(SDMA_UART0, SDMA_CHANNEL0, SDMA_CHANNEL1);
 248         sdma1 = sdma_open(SDMA_UART1, SDMA_CHANNEL0, SDMA_CHANNEL1);
 249         sdma2 = sdma_open(SDMA_UART2, SDMA_CHANNEL2, SDMA_CHANNEL3);
 250
 251         sdma_pinmap(sdma1, PTE0, PTE1);
 252         sdma_pinmap(sdma2, PTD3, PTD2);
 253 }
 254
 255 void test_sdma_run(void)
 256 {
 257         char xmt[32] = "hello, world";
 258         char rcv[32] = {};
 259
 260         uint64_t tm1, tm2;
 261
 262         sdma_write(sdma1, xmt, strlen(xmt));
 263         sdma_flush(sdma1, &tm1);
 264
 265         sdma_read(sdma2, rcv, strlen(xmt));
 266         sdma_wait(sdma2, &tm2);
 267
 268         printf("send: [%s] -> [%s] ", xmt, rcv);
 269         printf("time: %08lx / %08lx ", (uint32_t)tm1, (uint32_t)tm2);
 270         printf("tag: dir:%08lx in:%08lx\r\n",
 271                         FPTD->PDDR, FPTD->PDIR);
 272
 273         (void)xmt; (void)rcv;
 274         (void)tm1; (void)tm2;
 275 }
 276
 277 void test_tdma_init(void)
 278 {
 279         tdma_init();
 280
 281         tdma0 = tdma_open(TDMA_CHAN0, 3, PTA1, PullNone);
 282         tdma1 = tdma_open(TDMA_CHAN1, 3, PTC1, PullNone);
 283         tdma2 = tdma_open(TDMA_CHAN2, 3, PTD3, PullUp);
 284         tdma3 = tdma_open(TDMA_CHAN3, 3, PTD2, PullUp);
 285 }
 286
 287 void test_tdma_run(void)
 288 {
 289         static uint32_t time0[2];
 290         static uint32_t time1[2];
 291         static uint32_t time2[2];
 292         static uint32_t time3[2];
 293
 294         tdma_stamp(tdma0, (uint64_t*)&time0);
 295         tdma_stamp(tdma1, (uint64_t*)&time1);
 296         tdma_stamp(tdma2, (uint64_t*)&time2);
 297         tdma_stamp(tdma3, (uint64_t*)&time3);
 298
 299         tdma_start(tdma0);
 300         tdma_start(tdma1);
 301         tdma_start(tdma2);
 302         tdma_start(tdma3);
 303
 304         printf(" - timer:");
 305         printf(" %08lx:%08lx", time0[1], time0[0]);
 306         printf(" %08lx:%08lx", time1[1], time1[0]);
 307         printf(" %08lx:%08lx", time2[1], time2[0]);
 308         printf(" %08lx:%08lx", time3[1], time3[0]);
 309         //printf(" do:%08lx", FPTD->PDOR);
 310         //printf(" di:%08lx", FPTD->PDIR);
 311         //printf(" dd:%08lx", FPTD->PDDR);
 312 }
 313
 314 void test_leds(void)
 315 {
 316         led1 = 1; led2 = 0; wait(0.1);
 317         led1 = 0; led2 = 1; wait(0.1);
 318 }
 319
 320 void test_main(void)
 321 {
 322         printf("init\r\n");
 323         //test_tpm_init();
 324         //test_pit_init();
 325         //test_sdma_init();
 326         //test_tdma_init();
 327
 328         printf("run\r\n");
 329         for (int i = 0; true; i++) {
 330                 printf("%8d", i);
 331                 test_leds();
 332                 //test_tpm_run();
 333                 //test_pit_run();
 334                 //test_sdma_run();
 335                 //test_tdma_run();
 336                 printf("\r\n");
 337         }
 338 }