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drm/i915: Don't set the fence number in DPFC_CTL on SNB
2013-11-25 Ville Syrjälädrm/i915: Don't set the fence number in DPFC_CTL on SNB
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-25 Daniel Vetterdrm/i915: Fix module unloading with DRM_I915_UMS=n
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Borislav Petkovi915, fbdev: Fix Kconfig typo
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Borislav Petkovi915, debugfs: Fix uninitialized warning
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Chris Wilsondrm/i915: Hold pc8 lock around toggling pc8.gpu_idle
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Ville Syrjälädrm/i915: Enable pipe gamma for sprites
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Ville Syrjälädrm/i915: Use plane_name() in gen7_enable_fbc()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Ville Syrjälädrm/i915: Set has_fbc=true for all SNB+, except VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Ville Syrjälädrm/i915: Emit SRM after the MSG_FBC_REND_STATE LRI
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-21 Ville Syrjälädrm/i915: Limit FBC flush to post batch flush
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-18 Daniel Vetterdrm/i915: remove intel_uncore_clear_errors
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-18 Paulo Zanonidrm/i915: reuse WRPLL when possible
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-18 Daniel Vetterdrm/i915: dp aux irq support for g4x/vlv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-15 Daniel VetterMerge branch 'backlight-rework' into drm-intel-next...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-15 Daniel VetterMerge branch 'bdw-fixes' into backlight-rework
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Daniel Vetterdrm/i915: Reject opening of pipe crc files for invalid...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Daniel Vetterdrm/i915: Use for_each_pipe in intel_display_crc_init
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: do not save/restore backlight registers in KMS
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: nuke get max backlight functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: remove QUIRK_NO_PCH_PWM_ENABLE
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: do full backlight setup at enable time
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: Limit GTT to 2GB
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: Add comment about gen8 HWS PGA
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: Free correct number of ppgtt pages
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: Do gen6 style reset for gen8
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: GEN8 backlight support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Ben Widawskydrm/i915/bdw: Add BDW to ULT macro
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: gather backlight information at setup
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Daniel Vetterdrm/i915: Deprecated UMS support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Daniel Vetterdrm/i915: Kill legeacy AGP for gen3 kms
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Daniel Vetterdrm/i915: Make AGP=n work even on gen3
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Mika Kuoppaladrm/i915: check i915_get_reset_stats_ioctl args
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: debug print on backlight register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: use the initialized backlight max value instead...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: move backlight level setting in enable/disable...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: vlv does not have pipe field in backlight...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: fix gen2-gen3 backlight set
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jesse Barnesdrm/i915: drop duplicate ggtt vma list add in setup_global_gtt
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: handle backlight through chip specific functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: make asle notifications update backlight...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: make backlight info per-connector
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: clean up backlight conditional build
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Mika Kuoppaladrm/i915: add i915_get_reset_stats_ioctl
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Mika Kuoppaladrm/i915: add i915_reset_count
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-11 Daniel Vetterdrm/i915: tune reset dmesg output a bit
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-11 Chon Ming Leedrm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Jani Nikuladrm/i915/opregion: fix build error on CONFIG_ACPI=n
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915: Make AGP support optional
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Mask the vblank interrupt on bdw by default
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up cpu fifo underrun reporting support...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Optimize gen8_enable|disable_vblank functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up pipe CRC support for bdw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up PCH interrupts for bdw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up port A aux channel
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Fix up the bdw pipe interrupt enable lists
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Optimize pipe irq handling on bdw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915/bdw: Take render error interrupt out of the...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Add BDW PCH check first
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915: Use hsw_crt_get_config on BDW
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Change dp aux timeout to 600us on DDIA
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Enable trickle feed on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: conservative SBE VUE cache mode
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Limit SDE poly depth FIFO to 2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Sampler power bypass disable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskyddrm/i915/bdw: Disable centroid pixel perf optimization
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: BWGTLB clock gate disable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement edp PSR workarounds
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Disable semaphores
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Create a separate BDW rps enable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Damien Lespiaudrm/i915/bdw: Broadwell has a max port clock of 300Mhz...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Don't wait for c0 threads on forcewake
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Use HSW formula for ring freq scaling
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Support eDP PSR
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Use The GT mailbox for IPS enable/disable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Add Broadwell display FIFO limits
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: check DPD on port D when setting the...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: BDW also has only 2 FDI lanes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add support for BDW DP voltage swings...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add BDW DDI buf translations for eDP
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Art Runyandrm/i915/bdw: Add BDW DDI buffer translation values
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Use pipe CSC on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: get the correct LCPLL frequency on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: Broadwell has PIPEMISC
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: on Broadwell, the panel fitter is on...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: pretend we have LPT LP on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v3)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: Broadwell also has the "power down well"
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add Broadwell sprite/plane/cursor checks
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Damien Lespiaudrm/i915/bdw: Broadwell has 3 pipes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add IS_BROADWELL macro
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: BSD init for gen8 also
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: ppgtt info in debugfs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Don't muck with gtt_size on Gen8 when...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Render ring flushing
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: unleash PPGTT
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement PPGTT enable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement PPGTT insert
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement PPGTT clear range
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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