]> Pileus Git - ~andy/linux/commit
drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell
authorBen Widawsky <benjamin.widawsky@intel.com>
Mon, 11 Nov 2013 22:46:28 +0000 (14:46 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 14 Nov 2013 08:33:12 +0000 (09:33 +0100)
commit596cc11e7a4a89bf6c45f955402d0bd0c7d51f13
tree172fe238de946a2f8d6f2f09bce5db622decf33f
parent3a2ffb65eec6dbda2fd8151894f51c18b42c8d41
drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell

The pipe B and pipe C interrupt mask and enable registers are now part
of the pipe, so disabling the pipe power wells will lost the contests of
the registers.

Art totally debugged this one!

v2: Use the irq_lock to clarify code, and prevent future bugs (Daniel)

Cc: Art Runyan <arthur.j.runyan@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Make sparse happy.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c