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drm/i915: nuke get max backlight functions
2013-11-14 Jani Nikuladrm/i915: nuke get max backlight functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: remove QUIRK_NO_PCH_PWM_ENABLE
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: do full backlight setup at enable time
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-14 Jani Nikuladrm/i915: gather backlight information at setup
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: debug print on backlight register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: use the initialized backlight max value instead...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: move backlight level setting in enable/disable...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: vlv does not have pipe field in backlight...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-13 Jani Nikuladrm/i915: fix gen2-gen3 backlight set
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: handle backlight through chip specific functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: make asle notifications update backlight...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: make backlight info per-connector
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-12 Jani Nikuladrm/i915: clean up backlight conditional build
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Mask the vblank interrupt on bdw by default
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up cpu fifo underrun reporting support...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Optimize gen8_enable|disable_vblank functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up pipe CRC support for bdw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up PCH interrupts for bdw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Wire up port A aux channel
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Fix up the bdw pipe interrupt enable lists
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915: Optimize pipe irq handling on bdw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915/bdw: Take render error interrupt out of the...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Add BDW PCH check first
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915: Use hsw_crt_get_config on BDW
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Change dp aux timeout to 600us on DDIA
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Enable trickle feed on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: conservative SBE VUE cache mode
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Limit SDE poly depth FIFO to 2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Sampler power bypass disable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskyddrm/i915/bdw: Disable centroid pixel perf optimization
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: BWGTLB clock gate disable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement edp PSR workarounds
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Disable semaphores
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Create a separate BDW rps enable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Damien Lespiaudrm/i915/bdw: Broadwell has a max port clock of 300Mhz...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Don't wait for c0 threads on forcewake
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Use HSW formula for ring freq scaling
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Support eDP PSR
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Use The GT mailbox for IPS enable/disable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Add Broadwell display FIFO limits
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: check DPD on port D when setting the...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: BDW also has only 2 FDI lanes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add support for BDW DP voltage swings...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add BDW DDI buf translations for eDP
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Art Runyandrm/i915/bdw: Add BDW DDI buffer translation values
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Use pipe CSC on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: get the correct LCPLL frequency on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: Broadwell has PIPEMISC
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: on Broadwell, the panel fitter is on...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: pretend we have LPT LP on Broadwell
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v3)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: Broadwell also has the "power down well"
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add Broadwell sprite/plane/cursor checks
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Damien Lespiaudrm/i915/bdw: Broadwell has 3 pipes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Paulo Zanonidrm/i915/bdw: add IS_BROADWELL macro
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: BSD init for gen8 also
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: ppgtt info in debugfs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ville Syrjälädrm/i915/bdw: Don't muck with gtt_size on Gen8 when...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Render ring flushing
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: unleash PPGTT
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement PPGTT enable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement PPGTT insert
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement PPGTT clear range
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Initialize the PDEs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: PPGTT init & cleanup
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Support BDW caching
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Add GTT functions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Create gen8_gtt_pte_t
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Make gen8_gmch_probe
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Update relevant error state
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: debugfs updates
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Update MI_FLUSH_DW
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: dispatch updates (64b related)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Support 64b relocations
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Add interrupt info to debugfs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Implement interrupt changes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: support GMS and GGMS changes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: display stuff
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Clock gating init
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: HW context support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Swizzling support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Fences on gen8 look just like gen7
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Add device IDs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Daniel Vetterdrm/i915/bdw: Disable PPGTT for now
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-08 Ben Widawskydrm/i915/bdw: Initialize BDW forcewake vfuncs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-07 Ben Widawskydrm/i915/bdw: Handle forcewake for writes on gen8
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-06 Jesse Barnesdrm/i915/vlv: use per-pipe backlight controls v2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-06 Jesse Barnesdrm/i915: make backlight functions take a connector
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-06 Jani Nikuladrm/i915: move opregion asle request handling to a...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-06 Jesse Barnesdrm/i915/vlv: use PIPE_START_VBLANK interrupts on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-05 Ben Widawskydrm/i915/bdw: IS_GEN8 definition
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-05 Ville Syrjälädrm/i915: Make intel_dp_is_edp() less specific
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-05 Ville Syrjälädrm/i915: Give names to the VBT child device type bits
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-05 Mengdong Lindrm/i915/vlv: enable HDA display audio for Valleyview2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-04 Daniel Vetterdrm/i915/dvo: call ->mode_set callback only when the...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-04 Daniel VetterMerge tag 'v3.12' into drm-intel-next
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-01 Paulo Zanonidrm/i915: avoid unclaimed registers when capturing...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-01 Daniel Vetterdrm/i915: Enable DP port CRC for the "auto" source...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-11-01 Daniel Vetterdrm/i915: scramble reset support for DP port CRC on vlv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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