]> Pileus Git - ~andy/linux/commitdiff
drm/i915: Enable DP port CRC for the "auto" source on g4x/vlv
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 1 Nov 2013 09:50:23 +0000 (10:50 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 1 Nov 2013 17:27:56 +0000 (18:27 +0100)
Now that DP port CRCs are stable, we can use it for generic CRC tests.
Yay, the auto CRC source should now work everywhere!

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c

index 82c58eb1aa667b0adea2f50a093054a95134da9b..7008aacfc3c980674e3954bcd64eda338275256b 100644 (file)
@@ -1990,6 +1990,7 @@ static int i9xx_pipe_crc_auto_source(struct drm_device *dev, enum pipe pipe,
 {
        struct intel_encoder *encoder;
        struct intel_crtc *crtc;
+       struct intel_digital_port *dig_port;
        int ret = 0;
 
        *source = INTEL_PIPE_CRC_SOURCE_PIPE;
@@ -2011,8 +2012,22 @@ static int i9xx_pipe_crc_auto_source(struct drm_device *dev, enum pipe pipe,
                        break;
                case INTEL_OUTPUT_DISPLAYPORT:
                case INTEL_OUTPUT_EDP:
-                       /* We can't get stable CRCs for DP ports somehow. */
-                       ret = -ENODEV;
+                       dig_port = enc_to_dig_port(&encoder->base);
+                       switch (dig_port->port) {
+                       case PORT_B:
+                               *source = INTEL_PIPE_CRC_SOURCE_DP_B;
+                               break;
+                       case PORT_C:
+                               *source = INTEL_PIPE_CRC_SOURCE_DP_C;
+                               break;
+                       case PORT_D:
+                               *source = INTEL_PIPE_CRC_SOURCE_DP_D;
+                               break;
+                       default:
+                               WARN(1, "nonexisting DP port %c\n",
+                                    port_name(dig_port->port));
+                               break;
+                       }
                        break;
                }
        }