]> Pileus Git - ~andy/linux/commitdiff
drm/i915/dp: set sink to power down mode on dp disable
authorJani Nikula <jani.nikula@intel.com>
Tue, 12 Nov 2013 15:10:13 +0000 (17:10 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 14 Nov 2013 08:32:10 +0000 (09:32 +0100)
We used to put the local sink and any downstream sinks to power down
mode at disable or dpms off using the DPCD SET_POWER register, until
this was broken by

commit e8cb455876fa8f67c6aba394d0a14b697bf04cc3
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sun Jul 1 13:05:48 2012 +0200

    drm/i915/dp: convert to encoder disable/enable

Fix it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c

index eb8139da9763917df1966b015518c258d9e03649..0b2e842fef0151070b09af535d54fdcee2215602 100644 (file)
@@ -1774,7 +1774,7 @@ static void intel_disable_dp(struct intel_encoder *encoder)
         * ensure that we have vdd while we switch off the panel. */
        ironlake_edp_panel_vdd_on(intel_dp);
        ironlake_edp_backlight_off(intel_dp);
-       intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
+       intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
        ironlake_edp_panel_off(intel_dp);
 
        /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */