]> Pileus Git - ~andy/linux/commitdiff
irqchip: orion: clear stale interrupts in irq_startup
authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Thu, 23 Jan 2014 23:10:32 +0000 (00:10 +0100)
committerJason Cooper <jason@lakedaemon.net>
Thu, 6 Feb 2014 18:03:32 +0000 (18:03 +0000)
Bridge IRQ_CAUSE bits are asserted regardless of the corresponding bit in
IRQ_MASK register. To avoid interrupt events on stale irqs, we have to clear
them before unmask. This installs an .irq_startup callback to ensure stale
irqs are cleared before initial unmask.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: <stable@vger.kernel.org>: f56c0738b5c2: "irqchip: orion: clear bridge cause register on init"
Cc: <stable@vger.kernel.org>: 38bd80b84fca: "irqchip: orion: use handle_edge_irq on bridge irqs"
Cc: <stable@vger.kernel.org> # v3.10+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
drivers/irqchip/irq-orion.c

index 1f636f719065f82faae85736a5878016ad8ed9a8..0dfdc5c824a124ca36442ddea2d4befa0467a921 100644 (file)
@@ -123,6 +123,19 @@ static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc)
        }
 }
 
+/*
+ * Bridge IRQ_CAUSE is asserted regardless of IRQ_MASK register.
+ * To avoid interrupt events on stale irqs, we clear them before unmask.
+ */
+static unsigned int orion_bridge_irq_startup(struct irq_data *d)
+{
+       struct irq_chip_type *ct = irq_data_get_chip_type(d);
+
+       ct->chip.irq_ack(d);
+       ct->chip.irq_unmask(d);
+       return 0;
+}
+
 static int __init orion_bridge_irq_init(struct device_node *np,
                                        struct device_node *parent)
 {
@@ -176,6 +189,7 @@ static int __init orion_bridge_irq_init(struct device_node *np,
 
        gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE;
        gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK;
+       gc->chip_types[0].chip.irq_startup = orion_bridge_irq_startup;
        gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit;
        gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
        gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;