]> Pileus Git - ~andy/linux/commitdiff
drm/i915: Capture batchbuffer state upon GPU hang
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 30 Oct 2013 09:28:22 +0000 (09:28 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 30 Oct 2013 09:37:58 +0000 (10:37 +0100)
The bbstate contains useful bits of debugging information such as
whether the batch is being read from GTT or PPGTT, or whether it is
allowed to execute privileged instructions.

v2: Only record BB_STATE for gen4+

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gpu_error.c
drivers/gpu/drm/i915/i915_reg.h

index 57715c8e59c6e122e1c5e74e4ba5a079c96287c8..8bc0b3b42183f86bf2d466410a19fb314a792737 100644 (file)
@@ -299,6 +299,7 @@ struct drm_i915_error_state {
        u32 cpu_ring_tail[I915_NUM_RINGS];
        u32 error; /* gen6+ */
        u32 err_int; /* gen7 */
+       u32 bbstate[I915_NUM_RINGS];
        u32 instpm[I915_NUM_RINGS];
        u32 instps[I915_NUM_RINGS];
        u32 extra_instdone[I915_NUM_INSTDONE_REG];
index 5dde8102647122cbea30fb27e681bbe9a6317e29..a8bb213da79f3060a9c7dcbf3377777fa0052573 100644 (file)
@@ -249,7 +249,8 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
        err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
        if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
                err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
-
+       if (INTEL_INFO(dev)->gen >= 4)
+               err_printf(m, "  BB_STATE: 0x%08x\n", error->bbstate[ring]);
        if (INTEL_INFO(dev)->gen >= 4)
                err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
        err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
@@ -725,6 +726,7 @@ static void i915_record_ring_state(struct drm_device *dev,
                error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base));
                if (ring->id == RCS)
                        error->bbaddr = I915_READ64(BB_ADDR);
+               error->bbstate[ring->id] = I915_READ(RING_BBSTATE(ring->mmio_base));
        } else {
                error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX);
                error->ipeir[ring->id] = I915_READ(IPEIR);
index 47de41f1d4b456288aaad1e7c2c820f062a9509d..9785f7d031a4f970acca44293712cdf0e0ed6b6b 100644 (file)
 #define NOPID          0x02094
 #define HWSTAM         0x02098
 #define DMA_FADD_I8XX  0x020d0
+#define RING_BBSTATE(base)     ((base)+0x110)
 
 #define ERROR_GEN6     0x040a0
 #define GEN7_ERR_INT   0x44040