]> Pileus Git - ~andy/linux/commitdiff
arm64: add DSB after icache flush in __flush_icache_all()
authorVinayak Kale <vkale@apm.com>
Wed, 5 Feb 2014 09:34:36 +0000 (09:34 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 5 Feb 2014 10:26:35 +0000 (10:26 +0000)
Add DSB after icache flush to complete the cache maintenance operation.
The function __flush_icache_all() is used only for user space mappings
and an ISB is not required because of an exception return before executing
user instructions. An exception return would behave like an ISB.

Signed-off-by: Vinayak Kale <vkale@apm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/cacheflush.h

index fea9ee32720678b348685ef4803bb2c622c3eb8e..889324981aa4f569a77e6a5385897b6493c85526 100644 (file)
@@ -116,6 +116,7 @@ extern void flush_dcache_page(struct page *);
 static inline void __flush_icache_all(void)
 {
        asm("ic ialluis");
+       dsb();
 }
 
 #define flush_dcache_mmap_lock(mapping) \