]> Pileus Git - ~andy/linux/commitdiff
b43: HT-PHY: implement CCA reset
authorRafał Miłecki <zajec5@gmail.com>
Thu, 7 Mar 2013 15:47:20 +0000 (16:47 +0100)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 13 Mar 2013 18:27:49 +0000 (14:27 -0400)
It was just another similar-to-N-PHY and easy-to-track routine:
write32 0xb0601408 <- 0x00002057
 phy_read(0x0001) -> 0x0000
phy_write(0x0001) <- 0x4000
phy_write(0x0001) <- 0x0000
write32 0xb0601408 <- 0x00002055
(b43_phy_ht_force_rf_sequence was moved up unmodified)

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/b43/phy_ht.c

index 9d2a7e545bf64619326ec3e02a7946de9f86b819..23a46c667974623af8c28c5758583d74fcb6ab8b 100644 (file)
@@ -153,6 +153,31 @@ static void b43_radio_2059_init(struct b43_wldev *dev)
        b43_radio_mask(dev, 0x11, ~0x0008);
 }
 
+/**************************************************
+ * RF
+ **************************************************/
+
+static void b43_phy_ht_force_rf_sequence(struct b43_wldev *dev, u16 rf_seq)
+{
+       u8 i;
+
+       u16 save_seq_mode = b43_phy_read(dev, B43_PHY_HT_RF_SEQ_MODE);
+       b43_phy_set(dev, B43_PHY_HT_RF_SEQ_MODE, 0x3);
+
+       b43_phy_set(dev, B43_PHY_HT_RF_SEQ_TRIG, rf_seq);
+       for (i = 0; i < 200; i++) {
+               if (!(b43_phy_read(dev, B43_PHY_HT_RF_SEQ_STATUS) & rf_seq)) {
+                       i = 0;
+                       break;
+               }
+               msleep(1);
+       }
+       if (i)
+               b43err(dev->wl, "Forcing RF sequence timeout\n");
+
+       b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);
+}
+
 /**************************************************
  * Various PHY ops
  **************************************************/
@@ -173,6 +198,20 @@ static u16 b43_phy_ht_classifier(struct b43_wldev *dev, u16 mask, u16 val)
        return tmp;
 }
 
+static void b43_phy_ht_reset_cca(struct b43_wldev *dev)
+{
+       u16 bbcfg;
+
+       b43_phy_force_clock(dev, true);
+       bbcfg = b43_phy_read(dev, B43_PHY_HT_BBCFG);
+       b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg | B43_PHY_HT_BBCFG_RSTCCA);
+       udelay(1);
+       b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg & ~B43_PHY_HT_BBCFG_RSTCCA);
+       b43_phy_force_clock(dev, false);
+
+       b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RST2RX);
+}
+
 static void b43_phy_ht_zero_extg(struct b43_wldev *dev)
 {
        u8 i, j;
@@ -209,27 +248,6 @@ static void b43_phy_ht_afe_unk1(struct b43_wldev *dev)
        }
 }
 
-static void b43_phy_ht_force_rf_sequence(struct b43_wldev *dev, u16 rf_seq)
-{
-       u8 i;
-
-       u16 save_seq_mode = b43_phy_read(dev, B43_PHY_HT_RF_SEQ_MODE);
-       b43_phy_set(dev, B43_PHY_HT_RF_SEQ_MODE, 0x3);
-
-       b43_phy_set(dev, B43_PHY_HT_RF_SEQ_TRIG, rf_seq);
-       for (i = 0; i < 200; i++) {
-               if (!(b43_phy_read(dev, B43_PHY_HT_RF_SEQ_STATUS) & rf_seq)) {
-                       i = 0;
-                       break;
-               }
-               msleep(1);
-       }
-       if (i)
-               b43err(dev->wl, "Forcing RF sequence timeout\n");
-
-       b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);
-}
-
 static void b43_phy_ht_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
 {
        clip_st[0] = b43_phy_read(dev, B43_PHY_HT_C1_CLIP1THRES);
@@ -319,6 +337,14 @@ static void b43_phy_ht_spur_avoid(struct b43_wldev *dev,
        b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
 
        /* TODO: reset PLL */
+
+       if (spuravoid)
+               b43_phy_set(dev, B43_PHY_HT_BBCFG, B43_PHY_HT_BBCFG_RSTRX);
+       else
+               b43_phy_mask(dev, B43_PHY_HT_BBCFG,
+                               ~B43_PHY_HT_BBCFG_RSTRX & 0xFFFF);
+
+       b43_phy_ht_reset_cca(dev);
 }
 
 static void b43_phy_ht_channel_setup(struct b43_wldev *dev,