]> Pileus Git - ~andy/linux/commitdiff
ARM64: arch_timer: add support to configure and enable event stream
authorSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Tue, 13 Aug 2013 14:57:53 +0000 (15:57 +0100)
committerSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Thu, 26 Sep 2013 08:47:43 +0000 (09:47 +0100)
This patch adds support for configuring the event stream frequency
and enabling it.

It also adds the hwcaps as well as compat-specific definitions to
the user to detect this event stream feature.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
arch/arm64/include/asm/arch_timer.h
arch/arm64/include/asm/hwcap.h
arch/arm64/include/uapi/asm/hwcap.h
arch/arm64/kernel/setup.c

index 2b9722f42729e2eaf80d011e59776dc7747f415d..9400596a0f3972a91a8858da56e9d7097e4b9319 100644 (file)
@@ -92,21 +92,47 @@ static inline u32 arch_timer_get_cntfrq(void)
        return val;
 }
 
-static inline void arch_counter_set_user_access(void)
+static inline u32 arch_timer_get_cntkctl(void)
 {
        u32 cntkctl;
-
        asm volatile("mrs       %0, cntkctl_el1" : "=r" (cntkctl));
+       return cntkctl;
+}
+
+static inline void arch_timer_set_cntkctl(u32 cntkctl)
+{
+       asm volatile("msr       cntkctl_el1, %0" : : "r" (cntkctl));
+}
+
+static inline void arch_counter_set_user_access(void)
+{
+       u32 cntkctl = arch_timer_get_cntkctl();
 
        /* Disable user access to the timers and the physical counter */
+       /* Also disable virtual event stream */
        cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
                        | ARCH_TIMER_USR_VT_ACCESS_EN
+                       | ARCH_TIMER_VIRT_EVT_EN
                        | ARCH_TIMER_USR_PCT_ACCESS_EN);
 
        /* Enable user access to the virtual counter */
        cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
 
-       asm volatile("msr       cntkctl_el1, %0" : : "r" (cntkctl));
+       arch_timer_set_cntkctl(cntkctl);
+}
+
+static inline void arch_timer_evtstrm_enable(int divider)
+{
+       u32 cntkctl = arch_timer_get_cntkctl();
+       cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;
+       /* Set the divider and enable virtual event stream */
+       cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
+                       | ARCH_TIMER_VIRT_EVT_EN;
+       arch_timer_set_cntkctl(cntkctl);
+       elf_hwcap |= HWCAP_EVTSTRM;
+#ifdef CONFIG_COMPAT
+       compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
+#endif
 }
 
 static inline u64 arch_counter_get_cntvct(void)
index e2950b098e76f68803559ca264d7bed94ffa4789..6cddbb0c9f5459cff851101fd3010ad74882a1ef 100644 (file)
@@ -30,6 +30,7 @@
 #define COMPAT_HWCAP_IDIVA     (1 << 17)
 #define COMPAT_HWCAP_IDIVT     (1 << 18)
 #define COMPAT_HWCAP_IDIV      (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT)
+#define COMPAT_HWCAP_EVTSTRM   (1 << 21)
 
 #ifndef __ASSEMBLY__
 /*
  * instruction set this cpu supports.
  */
 #define ELF_HWCAP              (elf_hwcap)
-#define COMPAT_ELF_HWCAP       (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
-                                COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
-                                COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
-                                COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
-                                COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
+
+#ifdef CONFIG_COMPAT
+#define COMPAT_ELF_HWCAP       (compat_elf_hwcap)
+extern unsigned int compat_elf_hwcap;
+#endif
 
 extern unsigned long elf_hwcap;
 #endif
index eea497578b877194473f457d8ef827aba18e0943..9b12476e9c8567545c493704075f56c8643bbae6 100644 (file)
@@ -21,6 +21,7 @@
  */
 #define HWCAP_FP               (1 << 0)
 #define HWCAP_ASIMD            (1 << 1)
+#define HWCAP_EVTSTRM          (1 << 2)
 
 
 #endif /* _UAPI__ASM_HWCAP_H */
index 055cfb80e05c5d8d352880cb6db85d2cdea38241..d355b7b9710bcd067b136a36e7523a3fb3fd85cf 100644 (file)
@@ -60,6 +60,16 @@ EXPORT_SYMBOL(processor_id);
 unsigned long elf_hwcap __read_mostly;
 EXPORT_SYMBOL_GPL(elf_hwcap);
 
+#ifdef CONFIG_COMPAT
+#define COMPAT_ELF_HWCAP_DEFAULT       \
+                               (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
+                                COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
+                                COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
+                                COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
+                                COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
+unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
+#endif
+
 static const char *cpu_name;
 static const char *machine_name;
 phys_addr_t __fdt_pointer __initdata;
@@ -304,6 +314,7 @@ subsys_initcall(topology_init);
 static const char *hwcap_str[] = {
        "fp",
        "asimd",
+       "evtstrm",
        NULL
 };