]> Pileus Git - ~andy/linux/commitdiff
drm/i915: Drop I915_ prefix from HAS_FBC
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 Jan 2014 07:50:12 +0000 (08:50 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 Jan 2014 09:28:28 +0000 (10:28 +0100)
My OCD just couldn't let this slide. Spotted while reviewing Ville's
patch to only flip planes when we have FBC.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_suspend.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_pm.c

index 16e8e09bbdd69a2f212739049e7e330a5f091a61..95c92c8e55b3a7612948e1aff9f1065f5e80a23e 100644 (file)
@@ -1295,7 +1295,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
        struct drm_device *dev = node->minor->dev;
        drm_i915_private_t *dev_priv = dev->dev_private;
 
-       if (!I915_HAS_FBC(dev)) {
+       if (!HAS_FBC(dev)) {
                seq_puts(m, "FBC unsupported on this chipset\n");
                return 0;
        }
index 88901e5e1b7a3475bb5f438c453df21518016c1f..cf7922bdf87cf8113897ec0d3a5cb2ea59d9db4a 100644 (file)
@@ -1844,7 +1844,7 @@ struct drm_i915_file_private {
 
 #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
-#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
+#define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
 
 #define HAS_IPS(dev)           (IS_ULT(dev) || IS_BROADWELL(dev))
 
index 158cb3077ed62272f3df29bc7f3811d59544773c..261254a8a3850e249158025fd9dc24d2e0f2b40b 100644 (file)
@@ -3220,7 +3220,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
 
                for_each_pipe(pipe) {
                        int plane = pipe;
-                       if (I915_HAS_FBC(dev))
+                       if (HAS_FBC(dev))
                                plane = !plane;
 
                        if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
@@ -3421,7 +3421,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
 
                for_each_pipe(pipe) {
                        int plane = pipe;
-                       if (I915_HAS_FBC(dev))
+                       if (HAS_FBC(dev))
                                plane = !plane;
 
                        if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
index 6b8fef7fb3bb94f3aa442c867452637e9dd0919f..8150fdc08d497122c49959b9bbfaf0090259c7df 100644 (file)
@@ -237,7 +237,7 @@ static void i915_save_display(struct drm_device *dev)
        }
 
        /* Only regfile.save FBC state on the platform that supports FBC */
-       if (I915_HAS_FBC(dev)) {
+       if (HAS_FBC(dev)) {
                if (HAS_PCH_SPLIT(dev)) {
                        dev_priv->regfile.saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE);
                } else if (IS_GM45(dev)) {
@@ -300,7 +300,7 @@ static void i915_restore_display(struct drm_device *dev)
 
        /* only restore FBC info on the platform that supports FBC*/
        intel_disable_fbc(dev);
-       if (I915_HAS_FBC(dev)) {
+       if (HAS_FBC(dev)) {
                if (HAS_PCH_SPLIT(dev)) {
                        I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->regfile.saveDPFC_CB_BASE);
                } else if (IS_GM45(dev)) {
index dd064faccb27ba0ac48b28339cdd7bbc549bffb4..c4d3f439168625bfe634f521f9b133c7ff9392a9 100644 (file)
@@ -10169,7 +10169,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
         */
        intel_crtc->pipe = pipe;
        intel_crtc->plane = pipe;
-       if (I915_HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) {
+       if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) {
                DRM_DEBUG_KMS("swapping pipes & planes for FBC\n");
                intel_crtc->plane = !pipe;
        }
index 534459944d704c78ebd819b28202ba4de1436b55..26e6d1b5363f0628a2b03eca5ad117376cd90d89 100644 (file)
@@ -461,7 +461,7 @@ void intel_update_fbc(struct drm_device *dev)
        const struct drm_display_mode *adjusted_mode;
        unsigned int max_width, max_height;
 
-       if (!I915_HAS_FBC(dev)) {
+       if (!HAS_FBC(dev)) {
                set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED);
                return;
        }
@@ -5541,7 +5541,7 @@ void intel_init_pm(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
-       if (I915_HAS_FBC(dev)) {
+       if (HAS_FBC(dev)) {
                if (INTEL_INFO(dev)->gen >= 7) {
                        dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
                        dev_priv->display.enable_fbc = gen7_enable_fbc;