]> Pileus Git - ~andy/linux/commitdiff
Merge branch 'clockevents/3.14' of git://git.linaro.org/people/daniel.lezcano/linux...
authorIngo Molnar <mingo@kernel.org>
Sun, 12 Jan 2014 16:28:52 +0000 (17:28 +0100)
committerIngo Molnar <mingo@kernel.org>
Tue, 14 Jan 2014 13:33:29 +0000 (14:33 +0100)
Pull clocksource/clockevent updates from Daniel Lezcano:

  * Axel Lin removed an unused structure defining the ids for the
    bcm kona driver.

  * Ezequiel Garcia enabled the timer divider only when the 25MHz
    timer is not used for the armada 370 XP.

  * Jingoo Han removed a pointless platform data initialization for
    the sh_mtu and sh_mtu2.

  * Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt.

  * Linus Walleij added a useful warning in clk_of when no clocks
    are found while the old behavior was to silently hang at boot time.

  * Maxime Ripard added the high speed timer drivers for the
    Allwinner SoCs (A10, A13, A20). He increased the rating, shared the
    irq across all available cpus and fixed the clockevent's irq
    initialization for the sun4i.

  * Michael Opdenacker removed the usage of the IRQF_DISABLED for the
    all the timers driver located in drivers/clocksource.

  * Stephen Boyd switched to sched_clock_register for the
    arm_global_timer, cadence_ttc, sun4i and orion timers.

Conflicts:
drivers/clocksource/clksrc-of.c

Signed-off-by: Ingo Molnar <mingo@kernel.org>
1  2 
arch/arm/boot/dts/sun7i-a20.dtsi
drivers/clocksource/Kconfig
drivers/clocksource/clksrc-of.c
drivers/clocksource/sh_mtu2.c
drivers/clocksource/sh_tmu.c
drivers/clocksource/sun4i_timer.c
drivers/clocksource/time-armada-370-xp.c

Simple merge
Simple merge
index b9ddd9e3a2f599e2cc7424c1eac18d4280b2f850,a30b42c3ac3bdc483490a1bc781e663fc91edab5..ae2e4278c42abd75358279e937e991497097a2e6
@@@ -35,5 -36,9 +36,8 @@@ void __init clocksource_of_init(void
  
                init_func = match->data;
                init_func(np);
 -              of_node_put(np);
+               clocksources++;
        }
+       if (!clocksources)
+               pr_crit("%s: no matching clocksources found\n", __func__);
  }
Simple merge
Simple merge
Simple merge
index 4e7f6802e840ba9379eb42d733801526d173e89e,0450f6b69ade314d023095c83e37720cab7e731a..ee8691b89944e3fcbc3dbf7eeaadf00ec38ffd93
@@@ -262,14 -268,8 +263,13 @@@ static void __init armada_370_xp_timer_
        writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
        writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
  
-       timer_ctrl_clrset(0, TIMER0_EN | TIMER0_RELOAD_EN |
-                            TIMER0_DIV(TIMER_DIVIDER_SHIFT));
+       timer_ctrl_clrset(0, TIMER0_RELOAD_EN | enable_mask);
  
 +      /*
 +       * Set scale and timer for sched_clock.
 +       */
 +      sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk);
 +
        clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,
                              "armada_370_xp_clocksource",
                              timer_clk, 300, 32, clocksource_mmio_readl_down);