]> Pileus Git - ~andy/linux/commitdiff
mfd: wm5110: Add registers for headphone short circuit control
authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Thu, 9 Jan 2014 14:29:24 +0000 (14:29 +0000)
committerMark Brown <broonie@linaro.org>
Fri, 10 Jan 2014 11:52:17 +0000 (11:52 +0000)
Add the registers necessary to enable/disable the headphone short
circuit protection.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
drivers/mfd/wm5110-tables.c
include/linux/mfd/arizona/registers.h

index abd6713de7b030c50a2b5ff11ec3ed7ab3b1d576..4a4432eb499cac6debaf6c09685ffc670dda90dd 100644 (file)
@@ -610,6 +610,9 @@ static const struct reg_default wm5110_reg_default[] = {
        { 0x00000491, 0x0000 },    /* R1169  - PDM SPK1 CTRL 2 */
        { 0x00000492, 0x0069 },    /* R1170  - PDM SPK2 CTRL 1 */
        { 0x00000493, 0x0000 },    /* R1171  - PDM SPK2 CTRL 2 */
+       { 0x000004A0, 0x3480 },    /* R1184  - HP1 Short Circuit Ctrl */
+       { 0x000004A1, 0x3480 },    /* R1185  - HP2 Short Circuit Ctrl */
+       { 0x000004A2, 0x3480 },    /* R1186  - HP3 Short Circuit Ctrl */
        { 0x00000500, 0x000C },    /* R1280  - AIF1 BCLK Ctrl */
        { 0x00000501, 0x0008 },    /* R1281  - AIF1 Tx Pin Ctrl */
        { 0x00000502, 0x0000 },    /* R1282  - AIF1 Rx Pin Ctrl */
@@ -1639,6 +1642,9 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_PDM_SPK1_CTRL_2:
        case ARIZONA_PDM_SPK2_CTRL_1:
        case ARIZONA_PDM_SPK2_CTRL_2:
+       case ARIZONA_HP1_SHORT_CIRCUIT_CTRL:
+       case ARIZONA_HP2_SHORT_CIRCUIT_CTRL:
+       case ARIZONA_HP3_SHORT_CIRCUIT_CTRL:
        case ARIZONA_AIF1_BCLK_CTRL:
        case ARIZONA_AIF1_TX_PIN_CTRL:
        case ARIZONA_AIF1_RX_PIN_CTRL:
index 22916c0f1ca44ae9a99b48a6cba856978a54edc2..19883aeb1ac82b852d617c866b3b42edc72d5068 100644 (file)
 #define ARIZONA_PDM_SPK1_CTRL_2                  0x491
 #define ARIZONA_PDM_SPK2_CTRL_1                  0x492
 #define ARIZONA_PDM_SPK2_CTRL_2                  0x493
+#define ARIZONA_HP1_SHORT_CIRCUIT_CTRL           0x4A0
+#define ARIZONA_HP2_SHORT_CIRCUIT_CTRL           0x4A1
+#define ARIZONA_HP3_SHORT_CIRCUIT_CTRL           0x4A2
 #define ARIZONA_SPK_CTRL_2                       0x4B5
 #define ARIZONA_SPK_CTRL_3                       0x4B6
 #define ARIZONA_DAC_COMP_1                       0x4DC
 #define ARIZONA_SPK2_FMT_SHIFT                        0  /* SPK2_FMT */
 #define ARIZONA_SPK2_FMT_WIDTH                        1  /* SPK2_FMT */
 
+/*
+ * R1184 (0x4A0) - HP1 Short Circuit Ctrl
+ */
+#define ARIZONA_HP1_SC_ENA                       0x1000  /* HP1_SC_ENA */
+#define ARIZONA_HP1_SC_ENA_MASK                  0x1000  /* HP1_SC_ENA */
+#define ARIZONA_HP1_SC_ENA_SHIFT                     12  /* HP1_SC_ENA */
+#define ARIZONA_HP1_SC_ENA_WIDTH                      1  /* HP1_SC_ENA */
+
+/*
+ * R1185 (0x4A1) - HP2 Short Circuit Ctrl
+ */
+#define ARIZONA_HP2_SC_ENA                       0x1000  /* HP2_SC_ENA */
+#define ARIZONA_HP2_SC_ENA_MASK                  0x1000  /* HP2_SC_ENA */
+#define ARIZONA_HP2_SC_ENA_SHIFT                     12  /* HP2_SC_ENA */
+#define ARIZONA_HP2_SC_ENA_WIDTH                      1  /* HP2_SC_ENA */
+
+/*
+ * R1186 (0x4A2) - HP3 Short Circuit Ctrl
+ */
+#define ARIZONA_HP3_SC_ENA                       0x1000  /* HP3_SC_ENA */
+#define ARIZONA_HP3_SC_ENA_MASK                  0x1000  /* HP3_SC_ENA */
+#define ARIZONA_HP3_SC_ENA_SHIFT                     12  /* HP3_SC_ENA */
+#define ARIZONA_HP3_SC_ENA_WIDTH                      1  /* HP3_SC_ENA */
+
 /*
  * R1244 (0x4DC) - DAC comp 1
  */