parisc: disable preemption while flushing D- or I-caches through TMPALIAS region

It is necessary to disable preemption during cache flushes done through the
TMPALIAS region to ensure that the TLB setup is not clobbered by another flush.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>

diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index 9f21ab0c02e368ce38d6b3c5b1187799c9991fcf..79f694f3ad9bf96de1d2f73ed39efb6c7819f20c 100644 (file)
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -115,7 +115,9 @@ flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vma
 {
        if (PageAnon(page)) {
                flush_tlb_page(vma, vmaddr);
+               preempt_disable();
                flush_dcache_page_asm(page_to_phys(page), vmaddr);
+               preempt_enable();
        }
 }
 

diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 1c61b8245650ba8ef031b3500cbdd251f1d84a2a..4b12890642eb84289abd01772a5ee9121616aeec 100644 (file)
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -267,9 +267,11 @@ static inline void
 __flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr,
                   unsigned long physaddr)
 {
+       preempt_disable();
        flush_dcache_page_asm(physaddr, vmaddr);
        if (vma->vm_flags & VM_EXEC)
                flush_icache_page_asm(physaddr, vmaddr);
+       preempt_enable();
 }
 
 void flush_dcache_page(struct page *page)