Pileus Git - ~andy/linux/blob - sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include "hda_codec.h"
  41 #include "hda_local.h"
  42 #include "hda_jack.h"
  43
  44 static bool static_hdmi_pcm;
  45 module_param(static_hdmi_pcm, bool, 0644);
  46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  47
  48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
  49 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
  50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
  51
  52 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 /* max. connections to a widget */
  65 #define HDA_MAX_CONNECTIONS     32
  66
  67 struct hdmi_spec_per_pin {
  68         hda_nid_t pin_nid;
  69         int num_mux_nids;
  70         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  71         hda_nid_t cvt_nid;
  72
  73         struct hda_codec *codec;
  74         struct hdmi_eld sink_eld;
  75         struct mutex lock;
  76         struct delayed_work work;
  77         struct snd_kcontrol *eld_ctl;
  78         int repoll_count;
  79         bool setup; /* the stream has been set up by prepare callback */
  80         int channels; /* current number of channels */
  81         bool non_pcm;
  82         bool chmap_set;         /* channel-map override by ALSA API? */
  83         unsigned char chmap[8]; /* ALSA API channel-map */
  84         char pcm_name[8];       /* filled in build_pcm callbacks */
  85 #ifdef CONFIG_PROC_FS
  86         struct snd_info_entry *proc_entry;
  87 #endif
  88 };
  89
  90 struct cea_channel_speaker_allocation;
  91
  92 /* operations used by generic code that can be overridden by patches */
  93 struct hdmi_ops {
  94         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  95                            unsigned char *buf, int *eld_size);
  96
  97         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
  98         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
  99                                     int asp_slot);
 100         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 101                                     int asp_slot, int channel);
 102
 103         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 104                                     int ca, int active_channels, int conn_type);
 105
 106         /* enable/disable HBR (HD passthrough) */
 107         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 108
 109         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 110                             hda_nid_t pin_nid, u32 stream_tag, int format);
 111
 112         /* Helpers for producing the channel map TLVs. These can be overridden
 113          * for devices that have non-standard mapping requirements. */
 114         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 115                                                  int channels);
 116         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 117                                        unsigned int *chmap, int channels);
 118
 119         /* check that the user-given chmap is supported */
 120         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 121 };
 122
 123 struct hdmi_spec {
 124         int num_cvts;
 125         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 126         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 127
 128         int num_pins;
 129         struct snd_array pins; /* struct hdmi_spec_per_pin */
 130         struct snd_array pcm_rec; /* struct hda_pcm */
 131         unsigned int channels_max; /* max over all cvts */
 132
 133         struct hdmi_eld temp_eld;
 134         struct hdmi_ops ops;
 135
 136         bool dyn_pin_out;
 137
 138         /*
 139          * Non-generic VIA/NVIDIA specific
 140          */
 141         struct hda_multi_out multiout;
 142         struct hda_pcm_stream pcm_playback;
 143 };
 144
 145
 146 struct hdmi_audio_infoframe {
 147         u8 type; /* 0x84 */
 148         u8 ver;  /* 0x01 */
 149         u8 len;  /* 0x0a */
 150
 151         u8 checksum;
 152
 153         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 154         u8 SS01_SF24;
 155         u8 CXT04;
 156         u8 CA;
 157         u8 LFEPBL01_LSV36_DM_INH7;
 158 };
 159
 160 struct dp_audio_infoframe {
 161         u8 type; /* 0x84 */
 162         u8 len;  /* 0x1b */
 163         u8 ver;  /* 0x11 << 2 */
 164
 165         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 166         u8 SS01_SF24;
 167         u8 CXT04;
 168         u8 CA;
 169         u8 LFEPBL01_LSV36_DM_INH7;
 170 };
 171
 172 union audio_infoframe {
 173         struct hdmi_audio_infoframe hdmi;
 174         struct dp_audio_infoframe dp;
 175         u8 bytes[0];
 176 };
 177
 178 /*
 179  * CEA speaker placement:
 180  *
 181  *        FLH       FCH        FRH
 182  *  FLW    FL  FLC   FC   FRC   FR   FRW
 183  *
 184  *                                  LFE
 185  *                     TC
 186  *
 187  *          RL  RLC   RC   RRC   RR
 188  *
 189  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 190  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 191  */
 192 enum cea_speaker_placement {
 193         FL  = (1 <<  0),        /* Front Left           */
 194         FC  = (1 <<  1),        /* Front Center         */
 195         FR  = (1 <<  2),        /* Front Right          */
 196         FLC = (1 <<  3),        /* Front Left Center    */
 197         FRC = (1 <<  4),        /* Front Right Center   */
 198         RL  = (1 <<  5),        /* Rear Left            */
 199         RC  = (1 <<  6),        /* Rear Center          */
 200         RR  = (1 <<  7),        /* Rear Right           */
 201         RLC = (1 <<  8),        /* Rear Left Center     */
 202         RRC = (1 <<  9),        /* Rear Right Center    */
 203         LFE = (1 << 10),        /* Low Frequency Effect */
 204         FLW = (1 << 11),        /* Front Left Wide      */
 205         FRW = (1 << 12),        /* Front Right Wide     */
 206         FLH = (1 << 13),        /* Front Left High      */
 207         FCH = (1 << 14),        /* Front Center High    */
 208         FRH = (1 << 15),        /* Front Right High     */
 209         TC  = (1 << 16),        /* Top Center           */
 210 };
 211
 212 /*
 213  * ELD SA bits in the CEA Speaker Allocation data block
 214  */
 215 static int eld_speaker_allocation_bits[] = {
 216         [0] = FL | FR,
 217         [1] = LFE,
 218         [2] = FC,
 219         [3] = RL | RR,
 220         [4] = RC,
 221         [5] = FLC | FRC,
 222         [6] = RLC | RRC,
 223         /* the following are not defined in ELD yet */
 224         [7] = FLW | FRW,
 225         [8] = FLH | FRH,
 226         [9] = TC,
 227         [10] = FCH,
 228 };
 229
 230 struct cea_channel_speaker_allocation {
 231         int ca_index;
 232         int speakers[8];
 233
 234         /* derived values, just for convenience */
 235         int channels;
 236         int spk_mask;
 237 };
 238
 239 /*
 240  * ALSA sequence is:
 241  *
 242  *       surround40   surround41   surround50   surround51   surround71
 243  * ch0   front left   =            =            =            =
 244  * ch1   front right  =            =            =            =
 245  * ch2   rear left    =            =            =            =
 246  * ch3   rear right   =            =            =            =
 247  * ch4                LFE          center       center       center
 248  * ch5                                          LFE          LFE
 249  * ch6                                                       side left
 250  * ch7                                                       side right
 251  *
 252  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 253  */
 254 static int hdmi_channel_mapping[0x32][8] = {
 255         /* stereo */
 256         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 257         /* 2.1 */
 258         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 259         /* Dolby Surround */
 260         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 261         /* surround40 */
 262         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 263         /* 4ch */
 264         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 265         /* surround41 */
 266         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 267         /* surround50 */
 268         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 269         /* surround51 */
 270         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 271         /* 7.1 */
 272         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 273 };
 274
 275 /*
 276  * This is an ordered list!
 277  *
 278  * The preceding ones have better chances to be selected by
 279  * hdmi_channel_allocation().
 280  */
 281 static struct cea_channel_speaker_allocation channel_allocations[] = {
 282 /*                        channel:   7     6    5    4    3     2    1    0  */
 283 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 284                                  /* 2.1 */
 285 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 286                                  /* Dolby Surround */
 287 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 288                                  /* surround40 */
 289 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 290                                  /* surround41 */
 291 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 292                                  /* surround50 */
 293 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 294                                  /* surround51 */
 295 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 296                                  /* 6.1 */
 297 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 298                                  /* surround71 */
 299 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 300
 301 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 302 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 303 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 304 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 305 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 306 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 307 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 308 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 309 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 310 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 311 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 312 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 313 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 314 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 315 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 316 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 317 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 318 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 319 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 320 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 321 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 322 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 323 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 324 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 325 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 326 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 327 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 328 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 329 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 330 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 331 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 332 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 333 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 334 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 335 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 336 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 337 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 338 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 339 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 340 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 341 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 342 };
 343
 344
 345 /*
 346  * HDMI routines
 347  */
 348
 349 #define get_pin(spec, idx) \
 350         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 351 #define get_cvt(spec, idx) \
 352         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 353 #define get_pcm_rec(spec, idx) \
 354         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 355
 356 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 357 {
 358         int pin_idx;
 359
 360         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 361                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 362                         return pin_idx;
 363
 364         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 365         return -EINVAL;
 366 }
 367
 368 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 369                               struct hda_pcm_stream *hinfo)
 370 {
 371         int pin_idx;
 372
 373         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 374                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 375                         return pin_idx;
 376
 377         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 378         return -EINVAL;
 379 }
 380
 381 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 382 {
 383         int cvt_idx;
 384
 385         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 386                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 387                         return cvt_idx;
 388
 389         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 390         return -EINVAL;
 391 }
 392
 393 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 394                         struct snd_ctl_elem_info *uinfo)
 395 {
 396         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 397         struct hdmi_spec *spec = codec->spec;
 398         struct hdmi_spec_per_pin *per_pin;
 399         struct hdmi_eld *eld;
 400         int pin_idx;
 401
 402         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 403
 404         pin_idx = kcontrol->private_value;
 405         per_pin = get_pin(spec, pin_idx);
 406         eld = &per_pin->sink_eld;
 407
 408         mutex_lock(&per_pin->lock);
 409         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 410         mutex_unlock(&per_pin->lock);
 411
 412         return 0;
 413 }
 414
 415 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 416                         struct snd_ctl_elem_value *ucontrol)
 417 {
 418         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 419         struct hdmi_spec *spec = codec->spec;
 420         struct hdmi_spec_per_pin *per_pin;
 421         struct hdmi_eld *eld;
 422         int pin_idx;
 423
 424         pin_idx = kcontrol->private_value;
 425         per_pin = get_pin(spec, pin_idx);
 426         eld = &per_pin->sink_eld;
 427
 428         mutex_lock(&per_pin->lock);
 429         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 430                 mutex_unlock(&per_pin->lock);
 431                 snd_BUG();
 432                 return -EINVAL;
 433         }
 434
 435         memset(ucontrol->value.bytes.data, 0,
 436                ARRAY_SIZE(ucontrol->value.bytes.data));
 437         if (eld->eld_valid)
 438                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 439                        eld->eld_size);
 440         mutex_unlock(&per_pin->lock);
 441
 442         return 0;
 443 }
 444
 445 static struct snd_kcontrol_new eld_bytes_ctl = {
 446         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 447         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 448         .name = "ELD",
 449         .info = hdmi_eld_ctl_info,
 450         .get = hdmi_eld_ctl_get,
 451 };
 452
 453 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 454                         int device)
 455 {
 456         struct snd_kcontrol *kctl;
 457         struct hdmi_spec *spec = codec->spec;
 458         int err;
 459
 460         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 461         if (!kctl)
 462                 return -ENOMEM;
 463         kctl->private_value = pin_idx;
 464         kctl->id.device = device;
 465
 466         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 467         if (err < 0)
 468                 return err;
 469
 470         get_pin(spec, pin_idx)->eld_ctl = kctl;
 471         return 0;
 472 }
 473
 474 #ifdef BE_PARANOID
 475 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 476                                 int *packet_index, int *byte_index)
 477 {
 478         int val;
 479
 480         val = snd_hda_codec_read(codec, pin_nid, 0,
 481                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 482
 483         *packet_index = val >> 5;
 484         *byte_index = val & 0x1f;
 485 }
 486 #endif
 487
 488 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 489                                 int packet_index, int byte_index)
 490 {
 491         int val;
 492
 493         val = (packet_index << 5) | (byte_index & 0x1f);
 494
 495         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 496 }
 497
 498 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 499                                 unsigned char val)
 500 {
 501         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 502 }
 503
 504 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 505 {
 506         struct hdmi_spec *spec = codec->spec;
 507         int pin_out;
 508
 509         /* Unmute */
 510         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 511                 snd_hda_codec_write(codec, pin_nid, 0,
 512                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 513
 514         if (spec->dyn_pin_out)
 515                 /* Disable pin out until stream is active */
 516                 pin_out = 0;
 517         else
 518                 /* Enable pin out: some machines with GM965 gets broken output
 519                  * when the pin is disabled or changed while using with HDMI
 520                  */
 521                 pin_out = PIN_OUT;
 522
 523         snd_hda_codec_write(codec, pin_nid, 0,
 524                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 525 }
 526
 527 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 528 {
 529         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 530                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 531 }
 532
 533 static void hdmi_set_channel_count(struct hda_codec *codec,
 534                                    hda_nid_t cvt_nid, int chs)
 535 {
 536         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 537                 snd_hda_codec_write(codec, cvt_nid, 0,
 538                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 539 }
 540
 541 /*
 542  * ELD proc files
 543  */
 544
 545 #ifdef CONFIG_PROC_FS
 546 static void print_eld_info(struct snd_info_entry *entry,
 547                            struct snd_info_buffer *buffer)
 548 {
 549         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 550
 551         mutex_lock(&per_pin->lock);
 552         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 553         mutex_unlock(&per_pin->lock);
 554 }
 555
 556 static void write_eld_info(struct snd_info_entry *entry,
 557                            struct snd_info_buffer *buffer)
 558 {
 559         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 560
 561         mutex_lock(&per_pin->lock);
 562         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 563         mutex_unlock(&per_pin->lock);
 564 }
 565
 566 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 567 {
 568         char name[32];
 569         struct hda_codec *codec = per_pin->codec;
 570         struct snd_info_entry *entry;
 571         int err;
 572
 573         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 574         err = snd_card_proc_new(codec->bus->card, name, &entry);
 575         if (err < 0)
 576                 return err;
 577
 578         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 579         entry->c.text.write = write_eld_info;
 580         entry->mode |= S_IWUSR;
 581         per_pin->proc_entry = entry;
 582
 583         return 0;
 584 }
 585
 586 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 587 {
 588         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
 589                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
 590                 per_pin->proc_entry = NULL;
 591         }
 592 }
 593 #else
 594 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 595                                int index)
 596 {
 597         return 0;
 598 }
 599 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 600 {
 601 }
 602 #endif
 603
 604 /*
 605  * Channel mapping routines
 606  */
 607
 608 /*
 609  * Compute derived values in channel_allocations[].
 610  */
 611 static void init_channel_allocations(void)
 612 {
 613         int i, j;
 614         struct cea_channel_speaker_allocation *p;
 615
 616         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 617                 p = channel_allocations + i;
 618                 p->channels = 0;
 619                 p->spk_mask = 0;
 620                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 621                         if (p->speakers[j]) {
 622                                 p->channels++;
 623                                 p->spk_mask |= p->speakers[j];
 624                         }
 625         }
 626 }
 627
 628 static int get_channel_allocation_order(int ca)
 629 {
 630         int i;
 631
 632         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 633                 if (channel_allocations[i].ca_index == ca)
 634                         break;
 635         }
 636         return i;
 637 }
 638
 639 /*
 640  * The transformation takes two steps:
 641  *
 642  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 643  *            spk_mask => (channel_allocations[])         => ai->CA
 644  *
 645  * TODO: it could select the wrong CA from multiple candidates.
 646 */
 647 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 648 {
 649         int i;
 650         int ca = 0;
 651         int spk_mask = 0;
 652         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 653
 654         /*
 655          * CA defaults to 0 for basic stereo audio
 656          */
 657         if (channels <= 2)
 658                 return 0;
 659
 660         /*
 661          * expand ELD's speaker allocation mask
 662          *
 663          * ELD tells the speaker mask in a compact(paired) form,
 664          * expand ELD's notions to match the ones used by Audio InfoFrame.
 665          */
 666         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 667                 if (eld->info.spk_alloc & (1 << i))
 668                         spk_mask |= eld_speaker_allocation_bits[i];
 669         }
 670
 671         /* search for the first working match in the CA table */
 672         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 673                 if (channels == channel_allocations[i].channels &&
 674                     (spk_mask & channel_allocations[i].spk_mask) ==
 675                                 channel_allocations[i].spk_mask) {
 676                         ca = channel_allocations[i].ca_index;
 677                         break;
 678                 }
 679         }
 680
 681         if (!ca) {
 682                 /* if there was no match, select the regular ALSA channel
 683                  * allocation with the matching number of channels */
 684                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 685                         if (channels == channel_allocations[i].channels) {
 686                                 ca = channel_allocations[i].ca_index;
 687                                 break;
 688                         }
 689                 }
 690         }
 691
 692         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 693         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 694                     ca, channels, buf);
 695
 696         return ca;
 697 }
 698
 699 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 700                                        hda_nid_t pin_nid)
 701 {
 702 #ifdef CONFIG_SND_DEBUG_VERBOSE
 703         struct hdmi_spec *spec = codec->spec;
 704         int i;
 705         int channel;
 706
 707         for (i = 0; i < 8; i++) {
 708                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 709                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 710                                                 channel, i);
 711         }
 712 #endif
 713 }
 714
 715 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 716                                        hda_nid_t pin_nid,
 717                                        bool non_pcm,
 718                                        int ca)
 719 {
 720         struct hdmi_spec *spec = codec->spec;
 721         struct cea_channel_speaker_allocation *ch_alloc;
 722         int i;
 723         int err;
 724         int order;
 725         int non_pcm_mapping[8];
 726
 727         order = get_channel_allocation_order(ca);
 728         ch_alloc = &channel_allocations[order];
 729
 730         if (hdmi_channel_mapping[ca][1] == 0) {
 731                 int hdmi_slot = 0;
 732                 /* fill actual channel mappings in ALSA channel (i) order */
 733                 for (i = 0; i < ch_alloc->channels; i++) {
 734                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 735                                 hdmi_slot++; /* skip zero slots */
 736
 737                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 738                 }
 739                 /* fill the rest of the slots with ALSA channel 0xf */
 740                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 741                         if (!ch_alloc->speakers[7 - hdmi_slot])
 742                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 743         }
 744
 745         if (non_pcm) {
 746                 for (i = 0; i < ch_alloc->channels; i++)
 747                         non_pcm_mapping[i] = (i << 4) | i;
 748                 for (; i < 8; i++)
 749                         non_pcm_mapping[i] = (0xf << 4) | i;
 750         }
 751
 752         for (i = 0; i < 8; i++) {
 753                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 754                 int hdmi_slot = slotsetup & 0x0f;
 755                 int channel = (slotsetup & 0xf0) >> 4;
 756                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 757                 if (err) {
 758                         snd_printdd(KERN_NOTICE
 759                                     "HDMI: channel mapping failed\n");
 760                         break;
 761                 }
 762         }
 763 }
 764
 765 struct channel_map_table {
 766         unsigned char map;              /* ALSA API channel map position */
 767         int spk_mask;                   /* speaker position bit mask */
 768 };
 769
 770 static struct channel_map_table map_tables[] = {
 771         { SNDRV_CHMAP_FL,       FL },
 772         { SNDRV_CHMAP_FR,       FR },
 773         { SNDRV_CHMAP_RL,       RL },
 774         { SNDRV_CHMAP_RR,       RR },
 775         { SNDRV_CHMAP_LFE,      LFE },
 776         { SNDRV_CHMAP_FC,       FC },
 777         { SNDRV_CHMAP_RLC,      RLC },
 778         { SNDRV_CHMAP_RRC,      RRC },
 779         { SNDRV_CHMAP_RC,       RC },
 780         { SNDRV_CHMAP_FLC,      FLC },
 781         { SNDRV_CHMAP_FRC,      FRC },
 782         { SNDRV_CHMAP_TFL,      FLH },
 783         { SNDRV_CHMAP_TFR,      FRH },
 784         { SNDRV_CHMAP_FLW,      FLW },
 785         { SNDRV_CHMAP_FRW,      FRW },
 786         { SNDRV_CHMAP_TC,       TC },
 787         { SNDRV_CHMAP_TFC,      FCH },
 788         {} /* terminator */
 789 };
 790
 791 /* from ALSA API channel position to speaker bit mask */
 792 static int to_spk_mask(unsigned char c)
 793 {
 794         struct channel_map_table *t = map_tables;
 795         for (; t->map; t++) {
 796                 if (t->map == c)
 797                         return t->spk_mask;
 798         }
 799         return 0;
 800 }
 801
 802 /* from ALSA API channel position to CEA slot */
 803 static int to_cea_slot(int ordered_ca, unsigned char pos)
 804 {
 805         int mask = to_spk_mask(pos);
 806         int i;
 807
 808         if (mask) {
 809                 for (i = 0; i < 8; i++) {
 810                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 811                                 return i;
 812                 }
 813         }
 814
 815         return -1;
 816 }
 817
 818 /* from speaker bit mask to ALSA API channel position */
 819 static int spk_to_chmap(int spk)
 820 {
 821         struct channel_map_table *t = map_tables;
 822         for (; t->map; t++) {
 823                 if (t->spk_mask == spk)
 824                         return t->map;
 825         }
 826         return 0;
 827 }
 828
 829 /* from CEA slot to ALSA API channel position */
 830 static int from_cea_slot(int ordered_ca, unsigned char slot)
 831 {
 832         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 833
 834         return spk_to_chmap(mask);
 835 }
 836
 837 /* get the CA index corresponding to the given ALSA API channel map */
 838 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 839 {
 840         int i, spks = 0, spk_mask = 0;
 841
 842         for (i = 0; i < chs; i++) {
 843                 int mask = to_spk_mask(map[i]);
 844                 if (mask) {
 845                         spk_mask |= mask;
 846                         spks++;
 847                 }
 848         }
 849
 850         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 851                 if ((chs == channel_allocations[i].channels ||
 852                      spks == channel_allocations[i].channels) &&
 853                     (spk_mask & channel_allocations[i].spk_mask) ==
 854                                 channel_allocations[i].spk_mask)
 855                         return channel_allocations[i].ca_index;
 856         }
 857         return -1;
 858 }
 859
 860 /* set up the channel slots for the given ALSA API channel map */
 861 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 862                                              hda_nid_t pin_nid,
 863                                              int chs, unsigned char *map,
 864                                              int ca)
 865 {
 866         struct hdmi_spec *spec = codec->spec;
 867         int ordered_ca = get_channel_allocation_order(ca);
 868         int alsa_pos, hdmi_slot;
 869         int assignments[8] = {[0 ... 7] = 0xf};
 870
 871         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 872
 873                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 874
 875                 if (hdmi_slot < 0)
 876                         continue; /* unassigned channel */
 877
 878                 assignments[hdmi_slot] = alsa_pos;
 879         }
 880
 881         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 882                 int err;
 883
 884                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 885                                                      assignments[hdmi_slot]);
 886                 if (err)
 887                         return -EINVAL;
 888         }
 889         return 0;
 890 }
 891
 892 /* store ALSA API channel map from the current default map */
 893 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 894 {
 895         int i;
 896         int ordered_ca = get_channel_allocation_order(ca);
 897         for (i = 0; i < 8; i++) {
 898                 if (i < channel_allocations[ordered_ca].channels)
 899                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 900                 else
 901                         map[i] = 0;
 902         }
 903 }
 904
 905 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 906                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 907                                        int channels, unsigned char *map,
 908                                        bool chmap_set)
 909 {
 910         if (!non_pcm && chmap_set) {
 911                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 912                                                   channels, map, ca);
 913         } else {
 914                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 915                 hdmi_setup_fake_chmap(map, ca);
 916         }
 917
 918         hdmi_debug_channel_mapping(codec, pin_nid);
 919 }
 920
 921 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 922                                      int asp_slot, int channel)
 923 {
 924         return snd_hda_codec_write(codec, pin_nid, 0,
 925                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 926                                    (channel << 4) | asp_slot);
 927 }
 928
 929 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 930                                      int asp_slot)
 931 {
 932         return (snd_hda_codec_read(codec, pin_nid, 0,
 933                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 934                                    asp_slot) & 0xf0) >> 4;
 935 }
 936
 937 /*
 938  * Audio InfoFrame routines
 939  */
 940
 941 /*
 942  * Enable Audio InfoFrame Transmission
 943  */
 944 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 945                                        hda_nid_t pin_nid)
 946 {
 947         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 948         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 949                                                 AC_DIPXMIT_BEST);
 950 }
 951
 952 /*
 953  * Disable Audio InfoFrame Transmission
 954  */
 955 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 956                                       hda_nid_t pin_nid)
 957 {
 958         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 959         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 960                                                 AC_DIPXMIT_DISABLE);
 961 }
 962
 963 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 964 {
 965 #ifdef CONFIG_SND_DEBUG_VERBOSE
 966         int i;
 967         int size;
 968
 969         size = snd_hdmi_get_eld_size(codec, pin_nid);
 970         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 971
 972         for (i = 0; i < 8; i++) {
 973                 size = snd_hda_codec_read(codec, pin_nid, 0,
 974                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 975                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 976         }
 977 #endif
 978 }
 979
 980 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 981 {
 982 #ifdef BE_PARANOID
 983         int i, j;
 984         int size;
 985         int pi, bi;
 986         for (i = 0; i < 8; i++) {
 987                 size = snd_hda_codec_read(codec, pin_nid, 0,
 988                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 989                 if (size == 0)
 990                         continue;
 991
 992                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 993                 for (j = 1; j < 1000; j++) {
 994                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 995                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 996                         if (pi != i)
 997                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 998                                                 bi, pi, i);
 999                         if (bi == 0) /* byte index wrapped around */
1000                                 break;
1001                 }
1002                 snd_printd(KERN_INFO
1003                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1004                         i, size, j);
1005         }
1006 #endif
1007 }
1008
1009 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1010 {
1011         u8 *bytes = (u8 *)hdmi_ai;
1012         u8 sum = 0;
1013         int i;
1014
1015         hdmi_ai->checksum = 0;
1016
1017         for (i = 0; i < sizeof(*hdmi_ai); i++)
1018                 sum += bytes[i];
1019
1020         hdmi_ai->checksum = -sum;
1021 }
1022
1023 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1024                                       hda_nid_t pin_nid,
1025                                       u8 *dip, int size)
1026 {
1027         int i;
1028
1029         hdmi_debug_dip_size(codec, pin_nid);
1030         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1031
1032         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1033         for (i = 0; i < size; i++)
1034                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1035 }
1036
1037 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1038                                     u8 *dip, int size)
1039 {
1040         u8 val;
1041         int i;
1042
1043         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1044                                                             != AC_DIPXMIT_BEST)
1045                 return false;
1046
1047         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1048         for (i = 0; i < size; i++) {
1049                 val = snd_hda_codec_read(codec, pin_nid, 0,
1050                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1051                 if (val != dip[i])
1052                         return false;
1053         }
1054
1055         return true;
1056 }
1057
1058 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1059                                      hda_nid_t pin_nid,
1060                                      int ca, int active_channels,
1061                                      int conn_type)
1062 {
1063         union audio_infoframe ai;
1064
1065         if (conn_type == 0) { /* HDMI */
1066                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1067
1068                 hdmi_ai->type           = 0x84;
1069                 hdmi_ai->ver            = 0x01;
1070                 hdmi_ai->len            = 0x0a;
1071                 hdmi_ai->CC02_CT47      = active_channels - 1;
1072                 hdmi_ai->CA             = ca;
1073                 hdmi_checksum_audio_infoframe(hdmi_ai);
1074         } else if (conn_type == 1) { /* DisplayPort */
1075                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1076
1077                 dp_ai->type             = 0x84;
1078                 dp_ai->len              = 0x1b;
1079                 dp_ai->ver              = 0x11 << 2;
1080                 dp_ai->CC02_CT47        = active_channels - 1;
1081                 dp_ai->CA               = ca;
1082         } else {
1083                 snd_printd("HDMI: unknown connection type at pin %d\n",
1084                             pin_nid);
1085                 return;
1086         }
1087
1088         /*
1089          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1090          * sizeof(*dp_ai) to avoid partial match/update problems when
1091          * the user switches between HDMI/DP monitors.
1092          */
1093         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1094                                         sizeof(ai))) {
1095                 snd_printdd("hdmi_pin_setup_infoframe: "
1096                             "pin=%d channels=%d ca=0x%02x\n",
1097                             pin_nid,
1098                             active_channels, ca);
1099                 hdmi_stop_infoframe_trans(codec, pin_nid);
1100                 hdmi_fill_audio_infoframe(codec, pin_nid,
1101                                             ai.bytes, sizeof(ai));
1102                 hdmi_start_infoframe_trans(codec, pin_nid);
1103         }
1104 }
1105
1106 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1107                                        struct hdmi_spec_per_pin *per_pin,
1108                                        bool non_pcm)
1109 {
1110         struct hdmi_spec *spec = codec->spec;
1111         hda_nid_t pin_nid = per_pin->pin_nid;
1112         int channels = per_pin->channels;
1113         int active_channels;
1114         struct hdmi_eld *eld;
1115         int ca, ordered_ca;
1116
1117         if (!channels)
1118                 return;
1119
1120         if (is_haswell_plus(codec))
1121                 snd_hda_codec_write(codec, pin_nid, 0,
1122                                             AC_VERB_SET_AMP_GAIN_MUTE,
1123                                             AMP_OUT_UNMUTE);
1124
1125         eld = &per_pin->sink_eld;
1126         if (!eld->monitor_present)
1127                 return;
1128
1129         if (!non_pcm && per_pin->chmap_set)
1130                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1131         else
1132                 ca = hdmi_channel_allocation(eld, channels);
1133         if (ca < 0)
1134                 ca = 0;
1135
1136         ordered_ca = get_channel_allocation_order(ca);
1137         active_channels = channel_allocations[ordered_ca].channels;
1138
1139         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1140
1141         /*
1142          * always configure channel mapping, it may have been changed by the
1143          * user in the meantime
1144          */
1145         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1146                                    channels, per_pin->chmap,
1147                                    per_pin->chmap_set);
1148
1149         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1150                                       eld->info.conn_type);
1151
1152         per_pin->non_pcm = non_pcm;
1153 }
1154
1155 /*
1156  * Unsolicited events
1157  */
1158
1159 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1160
1161 static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1162 {
1163         struct hdmi_spec *spec = codec->spec;
1164         int pin_idx = pin_nid_to_pin_index(spec, jack->nid);
1165         if (pin_idx < 0)
1166                 return;
1167
1168         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1169                 snd_hda_jack_report_sync(codec);
1170 }
1171
1172 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1173 {
1174         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1175         struct hda_jack_tbl *jack;
1176         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1177
1178         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1179         if (!jack)
1180                 return;
1181         jack->jack_dirty = 1;
1182
1183         _snd_printd(SND_PR_VERBOSE,
1184                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1185                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1186                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1187
1188         jack_callback(codec, jack);
1189 }
1190
1191 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1192 {
1193         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1194         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1195         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1196         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1197
1198         printk(KERN_INFO
1199                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1200                 codec->addr,
1201                 tag,
1202                 subtag,
1203                 cp_state,
1204                 cp_ready);
1205
1206         /* TODO */
1207         if (cp_state)
1208                 ;
1209         if (cp_ready)
1210                 ;
1211 }
1212
1213
1214 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1215 {
1216         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1217         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1218
1219         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1220                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1221                 return;
1222         }
1223
1224         if (subtag == 0)
1225                 hdmi_intrinsic_event(codec, res);
1226         else
1227                 hdmi_non_intrinsic_event(codec, res);
1228 }
1229
1230 static void haswell_verify_D0(struct hda_codec *codec,
1231                 hda_nid_t cvt_nid, hda_nid_t nid)
1232 {
1233         int pwr;
1234
1235         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1236          * thus pins could only choose converter 0 for use. Make sure the
1237          * converters are in correct power state */
1238         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1239                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1240
1241         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1242                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1243                                     AC_PWRST_D0);
1244                 msleep(40);
1245                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1246                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1247                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1248         }
1249 }
1250
1251 /*
1252  * Callbacks
1253  */
1254
1255 /* HBR should be Non-PCM, 8 channels */
1256 #define is_hbr_format(format) \
1257         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1258
1259 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1260                               bool hbr)
1261 {
1262         int pinctl, new_pinctl;
1263
1264         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1265                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1266                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1267
1268                 if (pinctl < 0)
1269                         return hbr ? -EINVAL : 0;
1270
1271                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1272                 if (hbr)
1273                         new_pinctl |= AC_PINCTL_EPT_HBR;
1274                 else
1275                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1276
1277                 snd_printdd("hdmi_pin_hbr_setup: "
1278                             "NID=0x%x, %spinctl=0x%x\n",
1279                             pin_nid,
1280                             pinctl == new_pinctl ? "" : "new-",
1281                             new_pinctl);
1282
1283                 if (pinctl != new_pinctl)
1284                         snd_hda_codec_write(codec, pin_nid, 0,
1285                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1286                                             new_pinctl);
1287         } else if (hbr)
1288                 return -EINVAL;
1289
1290         return 0;
1291 }
1292
1293 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1294                               hda_nid_t pin_nid, u32 stream_tag, int format)
1295 {
1296         struct hdmi_spec *spec = codec->spec;
1297         int err;
1298
1299         if (is_haswell_plus(codec))
1300                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1301
1302         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1303
1304         if (err) {
1305                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1306                 return err;
1307         }
1308
1309         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1310         return 0;
1311 }
1312
1313 static int hdmi_choose_cvt(struct hda_codec *codec,
1314                         int pin_idx, int *cvt_id, int *mux_id)
1315 {
1316         struct hdmi_spec *spec = codec->spec;
1317         struct hdmi_spec_per_pin *per_pin;
1318         struct hdmi_spec_per_cvt *per_cvt = NULL;
1319         int cvt_idx, mux_idx = 0;
1320
1321         per_pin = get_pin(spec, pin_idx);
1322
1323         /* Dynamically assign converter to stream */
1324         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1325                 per_cvt = get_cvt(spec, cvt_idx);
1326
1327                 /* Must not already be assigned */
1328                 if (per_cvt->assigned)
1329                         continue;
1330                 /* Must be in pin's mux's list of converters */
1331                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1332                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1333                                 break;
1334                 /* Not in mux list */
1335                 if (mux_idx == per_pin->num_mux_nids)
1336                         continue;
1337                 break;
1338         }
1339
1340         /* No free converters */
1341         if (cvt_idx == spec->num_cvts)
1342                 return -ENODEV;
1343
1344         if (cvt_id)
1345                 *cvt_id = cvt_idx;
1346         if (mux_id)
1347                 *mux_id = mux_idx;
1348
1349         return 0;
1350 }
1351
1352 /* Intel HDMI workaround to fix audio routing issue:
1353  * For some Intel display codecs, pins share the same connection list.
1354  * So a conveter can be selected by multiple pins and playback on any of these
1355  * pins will generate sound on the external display, because audio flows from
1356  * the same converter to the display pipeline. Also muting one pin may make
1357  * other pins have no sound output.
1358  * So this function assures that an assigned converter for a pin is not selected
1359  * by any other pins.
1360  */
1361 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1362                         hda_nid_t pin_nid, int mux_idx)
1363 {
1364         struct hdmi_spec *spec = codec->spec;
1365         hda_nid_t nid, end_nid;
1366         int cvt_idx, curr;
1367         struct hdmi_spec_per_cvt *per_cvt;
1368
1369         /* configure all pins, including "no physical connection" ones */
1370         end_nid = codec->start_nid + codec->num_nodes;
1371         for (nid = codec->start_nid; nid < end_nid; nid++) {
1372                 unsigned int wid_caps = get_wcaps(codec, nid);
1373                 unsigned int wid_type = get_wcaps_type(wid_caps);
1374
1375                 if (wid_type != AC_WID_PIN)
1376                         continue;
1377
1378                 if (nid == pin_nid)
1379                         continue;
1380
1381                 curr = snd_hda_codec_read(codec, nid, 0,
1382                                           AC_VERB_GET_CONNECT_SEL, 0);
1383                 if (curr != mux_idx)
1384                         continue;
1385
1386                 /* choose an unassigned converter. The conveters in the
1387                  * connection list are in the same order as in the codec.
1388                  */
1389                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1390                         per_cvt = get_cvt(spec, cvt_idx);
1391                         if (!per_cvt->assigned) {
1392                                 snd_printdd("choose cvt %d for pin nid %d\n",
1393                                         cvt_idx, nid);
1394                                 snd_hda_codec_write_cache(codec, nid, 0,
1395                                             AC_VERB_SET_CONNECT_SEL,
1396                                             cvt_idx);
1397                                 break;
1398                         }
1399                 }
1400         }
1401 }
1402
1403 /*
1404  * HDA PCM callbacks
1405  */
1406 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1407                          struct hda_codec *codec,
1408                          struct snd_pcm_substream *substream)
1409 {
1410         struct hdmi_spec *spec = codec->spec;
1411         struct snd_pcm_runtime *runtime = substream->runtime;
1412         int pin_idx, cvt_idx, mux_idx = 0;
1413         struct hdmi_spec_per_pin *per_pin;
1414         struct hdmi_eld *eld;
1415         struct hdmi_spec_per_cvt *per_cvt = NULL;
1416         int err;
1417
1418         /* Validate hinfo */
1419         pin_idx = hinfo_to_pin_index(spec, hinfo);
1420         if (snd_BUG_ON(pin_idx < 0))
1421                 return -EINVAL;
1422         per_pin = get_pin(spec, pin_idx);
1423         eld = &per_pin->sink_eld;
1424
1425         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1426         if (err < 0)
1427                 return err;
1428
1429         per_cvt = get_cvt(spec, cvt_idx);
1430         /* Claim converter */
1431         per_cvt->assigned = 1;
1432         per_pin->cvt_nid = per_cvt->cvt_nid;
1433         hinfo->nid = per_cvt->cvt_nid;
1434
1435         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1436                             AC_VERB_SET_CONNECT_SEL,
1437                             mux_idx);
1438
1439         /* configure unused pins to choose other converters */
1440         if (is_haswell_plus(codec) || is_valleyview(codec))
1441                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1442
1443         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1444
1445         /* Initially set the converter's capabilities */
1446         hinfo->channels_min = per_cvt->channels_min;
1447         hinfo->channels_max = per_cvt->channels_max;
1448         hinfo->rates = per_cvt->rates;
1449         hinfo->formats = per_cvt->formats;
1450         hinfo->maxbps = per_cvt->maxbps;
1451
1452         /* Restrict capabilities by ELD if this isn't disabled */
1453         if (!static_hdmi_pcm && eld->eld_valid) {
1454                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1455                 if (hinfo->channels_min > hinfo->channels_max ||
1456                     !hinfo->rates || !hinfo->formats) {
1457                         per_cvt->assigned = 0;
1458                         hinfo->nid = 0;
1459                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1460                         return -ENODEV;
1461                 }
1462         }
1463
1464         /* Store the updated parameters */
1465         runtime->hw.channels_min = hinfo->channels_min;
1466         runtime->hw.channels_max = hinfo->channels_max;
1467         runtime->hw.formats = hinfo->formats;
1468         runtime->hw.rates = hinfo->rates;
1469
1470         snd_pcm_hw_constraint_step(substream->runtime, 0,
1471                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1472         return 0;
1473 }
1474
1475 /*
1476  * HDA/HDMI auto parsing
1477  */
1478 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1479 {
1480         struct hdmi_spec *spec = codec->spec;
1481         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1482         hda_nid_t pin_nid = per_pin->pin_nid;
1483
1484         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1485                 snd_printk(KERN_WARNING
1486                            "HDMI: pin %d wcaps %#x "
1487                            "does not support connection list\n",
1488                            pin_nid, get_wcaps(codec, pin_nid));
1489                 return -EINVAL;
1490         }
1491
1492         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1493                                                         per_pin->mux_nids,
1494                                                         HDA_MAX_CONNECTIONS);
1495
1496         return 0;
1497 }
1498
1499 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1500 {
1501         struct hda_jack_tbl *jack;
1502         struct hda_codec *codec = per_pin->codec;
1503         struct hdmi_spec *spec = codec->spec;
1504         struct hdmi_eld *eld = &spec->temp_eld;
1505         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1506         hda_nid_t pin_nid = per_pin->pin_nid;
1507         /*
1508          * Always execute a GetPinSense verb here, even when called from
1509          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1510          * response's PD bit is not the real PD value, but indicates that
1511          * the real PD value changed. An older version of the HD-audio
1512          * specification worked this way. Hence, we just ignore the data in
1513          * the unsolicited response to avoid custom WARs.
1514          */
1515         int present;
1516         bool update_eld = false;
1517         bool eld_changed = false;
1518         bool ret;
1519
1520         snd_hda_power_up(codec);
1521         present = snd_hda_pin_sense(codec, pin_nid);
1522
1523         mutex_lock(&per_pin->lock);
1524         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1525         if (pin_eld->monitor_present)
1526                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1527         else
1528                 eld->eld_valid = false;
1529
1530         _snd_printd(SND_PR_VERBOSE,
1531                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1532                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1533
1534         if (eld->eld_valid) {
1535                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1536                                                      &eld->eld_size) < 0)
1537                         eld->eld_valid = false;
1538                 else {
1539                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1540                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1541                                                     eld->eld_size) < 0)
1542                                 eld->eld_valid = false;
1543                 }
1544
1545                 if (eld->eld_valid) {
1546                         snd_hdmi_show_eld(&eld->info);
1547                         update_eld = true;
1548                 }
1549                 else if (repoll) {
1550                         queue_delayed_work(codec->bus->workq,
1551                                            &per_pin->work,
1552                                            msecs_to_jiffies(300));
1553                         goto unlock;
1554                 }
1555         }
1556
1557         if (pin_eld->eld_valid && !eld->eld_valid) {
1558                 update_eld = true;
1559                 eld_changed = true;
1560         }
1561         if (update_eld) {
1562                 bool old_eld_valid = pin_eld->eld_valid;
1563                 pin_eld->eld_valid = eld->eld_valid;
1564                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1565                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1566                                      eld->eld_size) != 0;
1567                 if (eld_changed)
1568                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1569                                eld->eld_size);
1570                 pin_eld->eld_size = eld->eld_size;
1571                 pin_eld->info = eld->info;
1572
1573                 /*
1574                  * Re-setup pin and infoframe. This is needed e.g. when
1575                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1576                  * - transcoder can change during stream playback on Haswell
1577                  */
1578                 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1579                         hdmi_setup_audio_infoframe(codec, per_pin,
1580                                                    per_pin->non_pcm);
1581         }
1582
1583         if (eld_changed)
1584                 snd_ctl_notify(codec->bus->card,
1585                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1586                                &per_pin->eld_ctl->id);
1587  unlock:
1588         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1589
1590         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1591         if (jack)
1592                 jack->block_report = !ret;
1593
1594         mutex_unlock(&per_pin->lock);
1595         snd_hda_power_down(codec);
1596         return ret;
1597 }
1598
1599 static void hdmi_repoll_eld(struct work_struct *work)
1600 {
1601         struct hdmi_spec_per_pin *per_pin =
1602         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1603
1604         if (per_pin->repoll_count++ > 6)
1605                 per_pin->repoll_count = 0;
1606
1607         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1608                 snd_hda_jack_report_sync(per_pin->codec);
1609 }
1610
1611 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1612                                              hda_nid_t nid);
1613
1614 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1615 {
1616         struct hdmi_spec *spec = codec->spec;
1617         unsigned int caps, config;
1618         int pin_idx;
1619         struct hdmi_spec_per_pin *per_pin;
1620         int err;
1621
1622         caps = snd_hda_query_pin_caps(codec, pin_nid);
1623         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1624                 return 0;
1625
1626         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1627         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1628                 return 0;
1629
1630         if (is_haswell_plus(codec))
1631                 intel_haswell_fixup_connect_list(codec, pin_nid);
1632
1633         pin_idx = spec->num_pins;
1634         per_pin = snd_array_new(&spec->pins);
1635         if (!per_pin)
1636                 return -ENOMEM;
1637
1638         per_pin->pin_nid = pin_nid;
1639         per_pin->non_pcm = false;
1640
1641         err = hdmi_read_pin_conn(codec, pin_idx);
1642         if (err < 0)
1643                 return err;
1644
1645         spec->num_pins++;
1646
1647         return 0;
1648 }
1649
1650 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1651 {
1652         struct hdmi_spec *spec = codec->spec;
1653         struct hdmi_spec_per_cvt *per_cvt;
1654         unsigned int chans;
1655         int err;
1656
1657         chans = get_wcaps(codec, cvt_nid);
1658         chans = get_wcaps_channels(chans);
1659
1660         per_cvt = snd_array_new(&spec->cvts);
1661         if (!per_cvt)
1662                 return -ENOMEM;
1663
1664         per_cvt->cvt_nid = cvt_nid;
1665         per_cvt->channels_min = 2;
1666         if (chans <= 16) {
1667                 per_cvt->channels_max = chans;
1668                 if (chans > spec->channels_max)
1669                         spec->channels_max = chans;
1670         }
1671
1672         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1673                                           &per_cvt->rates,
1674                                           &per_cvt->formats,
1675                                           &per_cvt->maxbps);
1676         if (err < 0)
1677                 return err;
1678
1679         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1680                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1681         spec->num_cvts++;
1682
1683         return 0;
1684 }
1685
1686 static int hdmi_parse_codec(struct hda_codec *codec)
1687 {
1688         hda_nid_t nid;
1689         int i, nodes;
1690
1691         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1692         if (!nid || nodes < 0) {
1693                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1694                 return -EINVAL;
1695         }
1696
1697         for (i = 0; i < nodes; i++, nid++) {
1698                 unsigned int caps;
1699                 unsigned int type;
1700
1701                 caps = get_wcaps(codec, nid);
1702                 type = get_wcaps_type(caps);
1703
1704                 if (!(caps & AC_WCAP_DIGITAL))
1705                         continue;
1706
1707                 switch (type) {
1708                 case AC_WID_AUD_OUT:
1709                         hdmi_add_cvt(codec, nid);
1710                         break;
1711                 case AC_WID_PIN:
1712                         hdmi_add_pin(codec, nid);
1713                         break;
1714                 }
1715         }
1716
1717         return 0;
1718 }
1719
1720 /*
1721  */
1722 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1723 {
1724         struct hda_spdif_out *spdif;
1725         bool non_pcm;
1726
1727         mutex_lock(&codec->spdif_mutex);
1728         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1729         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1730         mutex_unlock(&codec->spdif_mutex);
1731         return non_pcm;
1732 }
1733
1734
1735 /*
1736  * HDMI callbacks
1737  */
1738
1739 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1740                                            struct hda_codec *codec,
1741                                            unsigned int stream_tag,
1742                                            unsigned int format,
1743                                            struct snd_pcm_substream *substream)
1744 {
1745         hda_nid_t cvt_nid = hinfo->nid;
1746         struct hdmi_spec *spec = codec->spec;
1747         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1748         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1749         hda_nid_t pin_nid = per_pin->pin_nid;
1750         bool non_pcm;
1751         int pinctl;
1752
1753         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1754         mutex_lock(&per_pin->lock);
1755         per_pin->channels = substream->runtime->channels;
1756         per_pin->setup = true;
1757
1758         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1759         mutex_unlock(&per_pin->lock);
1760
1761         if (spec->dyn_pin_out) {
1762                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1763                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1764                 snd_hda_codec_write(codec, pin_nid, 0,
1765                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1766                                     pinctl | PIN_OUT);
1767         }
1768
1769         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1770 }
1771
1772 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1773                                              struct hda_codec *codec,
1774                                              struct snd_pcm_substream *substream)
1775 {
1776         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1777         return 0;
1778 }
1779
1780 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1781                           struct hda_codec *codec,
1782                           struct snd_pcm_substream *substream)
1783 {
1784         struct hdmi_spec *spec = codec->spec;
1785         int cvt_idx, pin_idx;
1786         struct hdmi_spec_per_cvt *per_cvt;
1787         struct hdmi_spec_per_pin *per_pin;
1788         int pinctl;
1789
1790         if (hinfo->nid) {
1791                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1792                 if (snd_BUG_ON(cvt_idx < 0))
1793                         return -EINVAL;
1794                 per_cvt = get_cvt(spec, cvt_idx);
1795
1796                 snd_BUG_ON(!per_cvt->assigned);
1797                 per_cvt->assigned = 0;
1798                 hinfo->nid = 0;
1799
1800                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1801                 if (snd_BUG_ON(pin_idx < 0))
1802                         return -EINVAL;
1803                 per_pin = get_pin(spec, pin_idx);
1804
1805                 if (spec->dyn_pin_out) {
1806                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1807                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1808                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1809                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1810                                             pinctl & ~PIN_OUT);
1811                 }
1812
1813                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1814
1815                 mutex_lock(&per_pin->lock);
1816                 per_pin->chmap_set = false;
1817                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1818
1819                 per_pin->setup = false;
1820                 per_pin->channels = 0;
1821                 mutex_unlock(&per_pin->lock);
1822         }
1823
1824         return 0;
1825 }
1826
1827 static const struct hda_pcm_ops generic_ops = {
1828         .open = hdmi_pcm_open,
1829         .close = hdmi_pcm_close,
1830         .prepare = generic_hdmi_playback_pcm_prepare,
1831         .cleanup = generic_hdmi_playback_pcm_cleanup,
1832 };
1833
1834 /*
1835  * ALSA API channel-map control callbacks
1836  */
1837 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1838                                struct snd_ctl_elem_info *uinfo)
1839 {
1840         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1841         struct hda_codec *codec = info->private_data;
1842         struct hdmi_spec *spec = codec->spec;
1843         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1844         uinfo->count = spec->channels_max;
1845         uinfo->value.integer.min = 0;
1846         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1847         return 0;
1848 }
1849
1850 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1851                                                   int channels)
1852 {
1853         /* If the speaker allocation matches the channel count, it is OK.*/
1854         if (cap->channels != channels)
1855                 return -1;
1856
1857         /* all channels are remappable freely */
1858         return SNDRV_CTL_TLVT_CHMAP_VAR;
1859 }
1860
1861 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1862                                         unsigned int *chmap, int channels)
1863 {
1864         int count = 0;
1865         int c;
1866
1867         for (c = 7; c >= 0; c--) {
1868                 int spk = cap->speakers[c];
1869                 if (!spk)
1870                         continue;
1871
1872                 chmap[count++] = spk_to_chmap(spk);
1873         }
1874
1875         WARN_ON(count != channels);
1876 }
1877
1878 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1879                               unsigned int size, unsigned int __user *tlv)
1880 {
1881         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1882         struct hda_codec *codec = info->private_data;
1883         struct hdmi_spec *spec = codec->spec;
1884         unsigned int __user *dst;
1885         int chs, count = 0;
1886
1887         if (size < 8)
1888                 return -ENOMEM;
1889         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1890                 return -EFAULT;
1891         size -= 8;
1892         dst = tlv + 2;
1893         for (chs = 2; chs <= spec->channels_max; chs++) {
1894                 int i;
1895                 struct cea_channel_speaker_allocation *cap;
1896                 cap = channel_allocations;
1897                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1898                         int chs_bytes = chs * 4;
1899                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1900                         unsigned int tlv_chmap[8];
1901
1902                         if (type < 0)
1903                                 continue;
1904                         if (size < 8)
1905                                 return -ENOMEM;
1906                         if (put_user(type, dst) ||
1907                             put_user(chs_bytes, dst + 1))
1908                                 return -EFAULT;
1909                         dst += 2;
1910                         size -= 8;
1911                         count += 8;
1912                         if (size < chs_bytes)
1913                                 return -ENOMEM;
1914                         size -= chs_bytes;
1915                         count += chs_bytes;
1916                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1917                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1918                                 return -EFAULT;
1919                         dst += chs;
1920                 }
1921         }
1922         if (put_user(count, tlv + 1))
1923                 return -EFAULT;
1924         return 0;
1925 }
1926
1927 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1928                               struct snd_ctl_elem_value *ucontrol)
1929 {
1930         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1931         struct hda_codec *codec = info->private_data;
1932         struct hdmi_spec *spec = codec->spec;
1933         int pin_idx = kcontrol->private_value;
1934         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1935         int i;
1936
1937         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1938                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1939         return 0;
1940 }
1941
1942 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1943                               struct snd_ctl_elem_value *ucontrol)
1944 {
1945         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1946         struct hda_codec *codec = info->private_data;
1947         struct hdmi_spec *spec = codec->spec;
1948         int pin_idx = kcontrol->private_value;
1949         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1950         unsigned int ctl_idx;
1951         struct snd_pcm_substream *substream;
1952         unsigned char chmap[8];
1953         int i, err, ca, prepared = 0;
1954
1955         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1956         substream = snd_pcm_chmap_substream(info, ctl_idx);
1957         if (!substream || !substream->runtime)
1958                 return 0; /* just for avoiding error from alsactl restore */
1959         switch (substream->runtime->status->state) {
1960         case SNDRV_PCM_STATE_OPEN:
1961         case SNDRV_PCM_STATE_SETUP:
1962                 break;
1963         case SNDRV_PCM_STATE_PREPARED:
1964                 prepared = 1;
1965                 break;
1966         default:
1967                 return -EBUSY;
1968         }
1969         memset(chmap, 0, sizeof(chmap));
1970         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1971                 chmap[i] = ucontrol->value.integer.value[i];
1972         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1973                 return 0;
1974         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1975         if (ca < 0)
1976                 return -EINVAL;
1977         if (spec->ops.chmap_validate) {
1978                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1979                 if (err)
1980                         return err;
1981         }
1982         mutex_lock(&per_pin->lock);
1983         per_pin->chmap_set = true;
1984         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1985         if (prepared)
1986                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1987         mutex_unlock(&per_pin->lock);
1988
1989         return 0;
1990 }
1991
1992 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1993 {
1994         struct hdmi_spec *spec = codec->spec;
1995         int pin_idx;
1996
1997         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1998                 struct hda_pcm *info;
1999                 struct hda_pcm_stream *pstr;
2000                 struct hdmi_spec_per_pin *per_pin;
2001
2002                 per_pin = get_pin(spec, pin_idx);
2003                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
2004                 info = snd_array_new(&spec->pcm_rec);
2005                 if (!info)
2006                         return -ENOMEM;
2007                 info->name = per_pin->pcm_name;
2008                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2009                 info->own_chmap = true;
2010
2011                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2012                 pstr->substreams = 1;
2013                 pstr->ops = generic_ops;
2014                 /* other pstr fields are set in open */
2015         }
2016
2017         codec->num_pcms = spec->num_pins;
2018         codec->pcm_info = spec->pcm_rec.list;
2019
2020         return 0;
2021 }
2022
2023 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2024 {
2025         char hdmi_str[32] = "HDMI/DP";
2026         struct hdmi_spec *spec = codec->spec;
2027         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2028         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2029
2030         if (pcmdev > 0)
2031                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2032         if (!is_jack_detectable(codec, per_pin->pin_nid))
2033                 strncat(hdmi_str, " Phantom",
2034                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2035
2036         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2037 }
2038
2039 static int generic_hdmi_build_controls(struct hda_codec *codec)
2040 {
2041         struct hdmi_spec *spec = codec->spec;
2042         int err;
2043         int pin_idx;
2044
2045         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2046                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2047
2048                 err = generic_hdmi_build_jack(codec, pin_idx);
2049                 if (err < 0)
2050                         return err;
2051
2052                 err = snd_hda_create_dig_out_ctls(codec,
2053                                                   per_pin->pin_nid,
2054                                                   per_pin->mux_nids[0],
2055                                                   HDA_PCM_TYPE_HDMI);
2056                 if (err < 0)
2057                         return err;
2058                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2059
2060                 /* add control for ELD Bytes */
2061                 err = hdmi_create_eld_ctl(codec, pin_idx,
2062                                           get_pcm_rec(spec, pin_idx)->device);
2063
2064                 if (err < 0)
2065                         return err;
2066
2067                 hdmi_present_sense(per_pin, 0);
2068         }
2069
2070         /* add channel maps */
2071         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2072                 struct snd_pcm_chmap *chmap;
2073                 struct snd_kcontrol *kctl;
2074                 int i;
2075
2076                 if (!codec->pcm_info[pin_idx].pcm)
2077                         break;
2078                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2079                                              SNDRV_PCM_STREAM_PLAYBACK,
2080                                              NULL, 0, pin_idx, &chmap);
2081                 if (err < 0)
2082                         return err;
2083                 /* override handlers */
2084                 chmap->private_data = codec;
2085                 kctl = chmap->kctl;
2086                 for (i = 0; i < kctl->count; i++)
2087                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2088                 kctl->info = hdmi_chmap_ctl_info;
2089                 kctl->get = hdmi_chmap_ctl_get;
2090                 kctl->put = hdmi_chmap_ctl_put;
2091                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2092         }
2093
2094         return 0;
2095 }
2096
2097 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2098 {
2099         struct hdmi_spec *spec = codec->spec;
2100         int pin_idx;
2101
2102         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2103                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2104
2105                 per_pin->codec = codec;
2106                 mutex_init(&per_pin->lock);
2107                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2108                 eld_proc_new(per_pin, pin_idx);
2109         }
2110         return 0;
2111 }
2112
2113 static int generic_hdmi_init(struct hda_codec *codec)
2114 {
2115         struct hdmi_spec *spec = codec->spec;
2116         int pin_idx;
2117
2118         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2119                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2120                 hda_nid_t pin_nid = per_pin->pin_nid;
2121
2122                 hdmi_init_pin(codec, pin_nid);
2123                 snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2124                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2125         }
2126         return 0;
2127 }
2128
2129 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2130 {
2131         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2132         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2133         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2134 }
2135
2136 static void hdmi_array_free(struct hdmi_spec *spec)
2137 {
2138         snd_array_free(&spec->pins);
2139         snd_array_free(&spec->cvts);
2140         snd_array_free(&spec->pcm_rec);
2141 }
2142
2143 static void generic_hdmi_free(struct hda_codec *codec)
2144 {
2145         struct hdmi_spec *spec = codec->spec;
2146         int pin_idx;
2147
2148         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2149                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2150
2151                 cancel_delayed_work(&per_pin->work);
2152                 eld_proc_free(per_pin);
2153         }
2154
2155         flush_workqueue(codec->bus->workq);
2156         hdmi_array_free(spec);
2157         kfree(spec);
2158 }
2159
2160 #ifdef CONFIG_PM
2161 static int generic_hdmi_resume(struct hda_codec *codec)
2162 {
2163         struct hdmi_spec *spec = codec->spec;
2164         int pin_idx;
2165
2166         generic_hdmi_init(codec);
2167         snd_hda_codec_resume_amp(codec);
2168         snd_hda_codec_resume_cache(codec);
2169
2170         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2171                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2172                 hdmi_present_sense(per_pin, 1);
2173         }
2174         return 0;
2175 }
2176 #endif
2177
2178 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2179         .init                   = generic_hdmi_init,
2180         .free                   = generic_hdmi_free,
2181         .build_pcms             = generic_hdmi_build_pcms,
2182         .build_controls         = generic_hdmi_build_controls,
2183         .unsol_event            = hdmi_unsol_event,
2184 #ifdef CONFIG_PM
2185         .resume                 = generic_hdmi_resume,
2186 #endif
2187 };
2188
2189 static const struct hdmi_ops generic_standard_hdmi_ops = {
2190         .pin_get_eld                            = snd_hdmi_get_eld,
2191         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2192         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2193         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2194         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2195         .setup_stream                           = hdmi_setup_stream,
2196         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2197         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2198 };
2199
2200
2201 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2202                                              hda_nid_t nid)
2203 {
2204         struct hdmi_spec *spec = codec->spec;
2205         hda_nid_t conns[4];
2206         int nconns;
2207
2208         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2209         if (nconns == spec->num_cvts &&
2210             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2211                 return;
2212
2213         /* override pins connection list */
2214         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2215         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2216 }
2217
2218 #define INTEL_VENDOR_NID 0x08
2219 #define INTEL_GET_VENDOR_VERB 0xf81
2220 #define INTEL_SET_VENDOR_VERB 0x781
2221 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2222 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2223
2224 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2225                                           bool update_tree)
2226 {
2227         unsigned int vendor_param;
2228
2229         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2230                                 INTEL_GET_VENDOR_VERB, 0);
2231         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2232                 return;
2233
2234         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2235         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2236                                 INTEL_SET_VENDOR_VERB, vendor_param);
2237         if (vendor_param == -1)
2238                 return;
2239
2240         if (update_tree)
2241                 snd_hda_codec_update_widgets(codec);
2242 }
2243
2244 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2245 {
2246         unsigned int vendor_param;
2247
2248         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2249                                 INTEL_GET_VENDOR_VERB, 0);
2250         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2251                 return;
2252
2253         /* enable DP1.2 mode */
2254         vendor_param |= INTEL_EN_DP12;
2255         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2256                                 INTEL_SET_VENDOR_VERB, vendor_param);
2257 }
2258
2259 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2260  * Otherwise you may get severe h/w communication errors.
2261  */
2262 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2263                                 unsigned int power_state)
2264 {
2265         if (power_state == AC_PWRST_D0) {
2266                 intel_haswell_enable_all_pins(codec, false);
2267                 intel_haswell_fixup_enable_dp12(codec);
2268         }
2269
2270         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2271         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2272 }
2273
2274 static int patch_generic_hdmi(struct hda_codec *codec)
2275 {
2276         struct hdmi_spec *spec;
2277
2278         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2279         if (spec == NULL)
2280                 return -ENOMEM;
2281
2282         spec->ops = generic_standard_hdmi_ops;
2283         codec->spec = spec;
2284         hdmi_array_init(spec, 4);
2285
2286         if (is_haswell_plus(codec)) {
2287                 intel_haswell_enable_all_pins(codec, true);
2288                 intel_haswell_fixup_enable_dp12(codec);
2289         }
2290
2291         if (is_haswell(codec) || is_valleyview(codec)) {
2292                 codec->depop_delay = 0;
2293         }
2294
2295         if (hdmi_parse_codec(codec) < 0) {
2296                 codec->spec = NULL;
2297                 kfree(spec);
2298                 return -EINVAL;
2299         }
2300         codec->patch_ops = generic_hdmi_patch_ops;
2301         if (is_haswell_plus(codec)) {
2302                 codec->patch_ops.set_power_state = haswell_set_power_state;
2303                 codec->dp_mst = true;
2304         }
2305
2306         generic_hdmi_init_per_pins(codec);
2307
2308         init_channel_allocations();
2309
2310         return 0;
2311 }
2312
2313 /*
2314  * Shared non-generic implementations
2315  */
2316
2317 static int simple_playback_build_pcms(struct hda_codec *codec)
2318 {
2319         struct hdmi_spec *spec = codec->spec;
2320         struct hda_pcm *info;
2321         unsigned int chans;
2322         struct hda_pcm_stream *pstr;
2323         struct hdmi_spec_per_cvt *per_cvt;
2324
2325         per_cvt = get_cvt(spec, 0);
2326         chans = get_wcaps(codec, per_cvt->cvt_nid);
2327         chans = get_wcaps_channels(chans);
2328
2329         info = snd_array_new(&spec->pcm_rec);
2330         if (!info)
2331                 return -ENOMEM;
2332         info->name = get_pin(spec, 0)->pcm_name;
2333         sprintf(info->name, "HDMI 0");
2334         info->pcm_type = HDA_PCM_TYPE_HDMI;
2335         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2336         *pstr = spec->pcm_playback;
2337         pstr->nid = per_cvt->cvt_nid;
2338         if (pstr->channels_max <= 2 && chans && chans <= 16)
2339                 pstr->channels_max = chans;
2340
2341         codec->num_pcms = 1;
2342         codec->pcm_info = info;
2343
2344         return 0;
2345 }
2346
2347 /* unsolicited event for jack sensing */
2348 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2349                                     unsigned int res)
2350 {
2351         snd_hda_jack_set_dirty_all(codec);
2352         snd_hda_jack_report_sync(codec);
2353 }
2354
2355 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2356  * as long as spec->pins[] is set correctly
2357  */
2358 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2359
2360 static int simple_playback_build_controls(struct hda_codec *codec)
2361 {
2362         struct hdmi_spec *spec = codec->spec;
2363         struct hdmi_spec_per_cvt *per_cvt;
2364         int err;
2365
2366         per_cvt = get_cvt(spec, 0);
2367         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2368                                           per_cvt->cvt_nid,
2369                                           HDA_PCM_TYPE_HDMI);
2370         if (err < 0)
2371                 return err;
2372         return simple_hdmi_build_jack(codec, 0);
2373 }
2374
2375 static int simple_playback_init(struct hda_codec *codec)
2376 {
2377         struct hdmi_spec *spec = codec->spec;
2378         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2379         hda_nid_t pin = per_pin->pin_nid;
2380
2381         snd_hda_codec_write(codec, pin, 0,
2382                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2383         /* some codecs require to unmute the pin */
2384         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2385                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2386                                     AMP_OUT_UNMUTE);
2387         snd_hda_jack_detect_enable(codec, pin, pin);
2388         return 0;
2389 }
2390
2391 static void simple_playback_free(struct hda_codec *codec)
2392 {
2393         struct hdmi_spec *spec = codec->spec;
2394
2395         hdmi_array_free(spec);
2396         kfree(spec);
2397 }
2398
2399 /*
2400  * Nvidia specific implementations
2401  */
2402
2403 #define Nv_VERB_SET_Channel_Allocation          0xF79
2404 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2405 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2406 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2407
2408 #define nvhdmi_master_con_nid_7x        0x04
2409 #define nvhdmi_master_pin_nid_7x        0x05
2410
2411 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2412         /*front, rear, clfe, rear_surr */
2413         0x6, 0x8, 0xa, 0xc,
2414 };
2415
2416 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2417         /* set audio protect on */
2418         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2419         /* enable digital output on pin widget */
2420         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2421         {} /* terminator */
2422 };
2423
2424 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2425         /* set audio protect on */
2426         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2427         /* enable digital output on pin widget */
2428         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2429         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2430         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2431         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2432         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2433         {} /* terminator */
2434 };
2435
2436 #ifdef LIMITED_RATE_FMT_SUPPORT
2437 /* support only the safe format and rate */
2438 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2439 #define SUPPORTED_MAXBPS        16
2440 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2441 #else
2442 /* support all rates and formats */
2443 #define SUPPORTED_RATES \
2444         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2445         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2446          SNDRV_PCM_RATE_192000)
2447 #define SUPPORTED_MAXBPS        24
2448 #define SUPPORTED_FORMATS \
2449         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2450 #endif
2451
2452 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2453 {
2454         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2455         return 0;
2456 }
2457
2458 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2459 {
2460         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2461         return 0;
2462 }
2463
2464 static unsigned int channels_2_6_8[] = {
2465         2, 6, 8
2466 };
2467
2468 static unsigned int channels_2_8[] = {
2469         2, 8
2470 };
2471
2472 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2473         .count = ARRAY_SIZE(channels_2_6_8),
2474         .list = channels_2_6_8,
2475         .mask = 0,
2476 };
2477
2478 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2479         .count = ARRAY_SIZE(channels_2_8),
2480         .list = channels_2_8,
2481         .mask = 0,
2482 };
2483
2484 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2485                                     struct hda_codec *codec,
2486                                     struct snd_pcm_substream *substream)
2487 {
2488         struct hdmi_spec *spec = codec->spec;
2489         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2490
2491         switch (codec->preset->id) {
2492         case 0x10de0002:
2493         case 0x10de0003:
2494         case 0x10de0005:
2495         case 0x10de0006:
2496                 hw_constraints_channels = &hw_constraints_2_8_channels;
2497                 break;
2498         case 0x10de0007:
2499                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2500                 break;
2501         default:
2502                 break;
2503         }
2504
2505         if (hw_constraints_channels != NULL) {
2506                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2507                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2508                                 hw_constraints_channels);
2509         } else {
2510                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2511                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2512         }
2513
2514         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2515 }
2516
2517 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2518                                      struct hda_codec *codec,
2519                                      struct snd_pcm_substream *substream)
2520 {
2521         struct hdmi_spec *spec = codec->spec;
2522         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2523 }
2524
2525 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2526                                        struct hda_codec *codec,
2527                                        unsigned int stream_tag,
2528                                        unsigned int format,
2529                                        struct snd_pcm_substream *substream)
2530 {
2531         struct hdmi_spec *spec = codec->spec;
2532         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2533                                              stream_tag, format, substream);
2534 }
2535
2536 static const struct hda_pcm_stream simple_pcm_playback = {
2537         .substreams = 1,
2538         .channels_min = 2,
2539         .channels_max = 2,
2540         .ops = {
2541                 .open = simple_playback_pcm_open,
2542                 .close = simple_playback_pcm_close,
2543                 .prepare = simple_playback_pcm_prepare
2544         },
2545 };
2546
2547 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2548         .build_controls = simple_playback_build_controls,
2549         .build_pcms = simple_playback_build_pcms,
2550         .init = simple_playback_init,
2551         .free = simple_playback_free,
2552         .unsol_event = simple_hdmi_unsol_event,
2553 };
2554
2555 static int patch_simple_hdmi(struct hda_codec *codec,
2556                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2557 {
2558         struct hdmi_spec *spec;
2559         struct hdmi_spec_per_cvt *per_cvt;
2560         struct hdmi_spec_per_pin *per_pin;
2561
2562         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2563         if (!spec)
2564                 return -ENOMEM;
2565
2566         codec->spec = spec;
2567         hdmi_array_init(spec, 1);
2568
2569         spec->multiout.num_dacs = 0;  /* no analog */
2570         spec->multiout.max_channels = 2;
2571         spec->multiout.dig_out_nid = cvt_nid;
2572         spec->num_cvts = 1;
2573         spec->num_pins = 1;
2574         per_pin = snd_array_new(&spec->pins);
2575         per_cvt = snd_array_new(&spec->cvts);
2576         if (!per_pin || !per_cvt) {
2577                 simple_playback_free(codec);
2578                 return -ENOMEM;
2579         }
2580         per_cvt->cvt_nid = cvt_nid;
2581         per_pin->pin_nid = pin_nid;
2582         spec->pcm_playback = simple_pcm_playback;
2583
2584         codec->patch_ops = simple_hdmi_patch_ops;
2585
2586         return 0;
2587 }
2588
2589 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2590                                                     int channels)
2591 {
2592         unsigned int chanmask;
2593         int chan = channels ? (channels - 1) : 1;
2594
2595         switch (channels) {
2596         default:
2597         case 0:
2598         case 2:
2599                 chanmask = 0x00;
2600                 break;
2601         case 4:
2602                 chanmask = 0x08;
2603                 break;
2604         case 6:
2605                 chanmask = 0x0b;
2606                 break;
2607         case 8:
2608                 chanmask = 0x13;
2609                 break;
2610         }
2611
2612         /* Set the audio infoframe channel allocation and checksum fields.  The
2613          * channel count is computed implicitly by the hardware. */
2614         snd_hda_codec_write(codec, 0x1, 0,
2615                         Nv_VERB_SET_Channel_Allocation, chanmask);
2616
2617         snd_hda_codec_write(codec, 0x1, 0,
2618                         Nv_VERB_SET_Info_Frame_Checksum,
2619                         (0x71 - chan - chanmask));
2620 }
2621
2622 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2623                                    struct hda_codec *codec,
2624                                    struct snd_pcm_substream *substream)
2625 {
2626         struct hdmi_spec *spec = codec->spec;
2627         int i;
2628
2629         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2630                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2631         for (i = 0; i < 4; i++) {
2632                 /* set the stream id */
2633                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2634                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2635                 /* set the stream format */
2636                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2637                                 AC_VERB_SET_STREAM_FORMAT, 0);
2638         }
2639
2640         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2641          * streams are disabled. */
2642         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2643
2644         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2645 }
2646
2647 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2648                                      struct hda_codec *codec,
2649                                      unsigned int stream_tag,
2650                                      unsigned int format,
2651                                      struct snd_pcm_substream *substream)
2652 {
2653         int chs;
2654         unsigned int dataDCC2, channel_id;
2655         int i;
2656         struct hdmi_spec *spec = codec->spec;
2657         struct hda_spdif_out *spdif;
2658         struct hdmi_spec_per_cvt *per_cvt;
2659
2660         mutex_lock(&codec->spdif_mutex);
2661         per_cvt = get_cvt(spec, 0);
2662         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2663
2664         chs = substream->runtime->channels;
2665
2666         dataDCC2 = 0x2;
2667
2668         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2669         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2670                 snd_hda_codec_write(codec,
2671                                 nvhdmi_master_con_nid_7x,
2672                                 0,
2673                                 AC_VERB_SET_DIGI_CONVERT_1,
2674                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2675
2676         /* set the stream id */
2677         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2678                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2679
2680         /* set the stream format */
2681         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2682                         AC_VERB_SET_STREAM_FORMAT, format);
2683
2684         /* turn on again (if needed) */
2685         /* enable and set the channel status audio/data flag */
2686         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2687                 snd_hda_codec_write(codec,
2688                                 nvhdmi_master_con_nid_7x,
2689                                 0,
2690                                 AC_VERB_SET_DIGI_CONVERT_1,
2691                                 spdif->ctls & 0xff);
2692                 snd_hda_codec_write(codec,
2693                                 nvhdmi_master_con_nid_7x,
2694                                 0,
2695                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2696         }
2697
2698         for (i = 0; i < 4; i++) {
2699                 if (chs == 2)
2700                         channel_id = 0;
2701                 else
2702                         channel_id = i * 2;
2703
2704                 /* turn off SPDIF once;
2705                  *otherwise the IEC958 bits won't be updated
2706                  */
2707                 if (codec->spdif_status_reset &&
2708                 (spdif->ctls & AC_DIG1_ENABLE))
2709                         snd_hda_codec_write(codec,
2710                                 nvhdmi_con_nids_7x[i],
2711                                 0,
2712                                 AC_VERB_SET_DIGI_CONVERT_1,
2713                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2714                 /* set the stream id */
2715                 snd_hda_codec_write(codec,
2716                                 nvhdmi_con_nids_7x[i],
2717                                 0,
2718                                 AC_VERB_SET_CHANNEL_STREAMID,
2719                                 (stream_tag << 4) | channel_id);
2720                 /* set the stream format */
2721                 snd_hda_codec_write(codec,
2722                                 nvhdmi_con_nids_7x[i],
2723                                 0,
2724                                 AC_VERB_SET_STREAM_FORMAT,
2725                                 format);
2726                 /* turn on again (if needed) */
2727                 /* enable and set the channel status audio/data flag */
2728                 if (codec->spdif_status_reset &&
2729                 (spdif->ctls & AC_DIG1_ENABLE)) {
2730                         snd_hda_codec_write(codec,
2731                                         nvhdmi_con_nids_7x[i],
2732                                         0,
2733                                         AC_VERB_SET_DIGI_CONVERT_1,
2734                                         spdif->ctls & 0xff);
2735                         snd_hda_codec_write(codec,
2736                                         nvhdmi_con_nids_7x[i],
2737                                         0,
2738                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2739                 }
2740         }
2741
2742         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2743
2744         mutex_unlock(&codec->spdif_mutex);
2745         return 0;
2746 }
2747
2748 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2749         .substreams = 1,
2750         .channels_min = 2,
2751         .channels_max = 8,
2752         .nid = nvhdmi_master_con_nid_7x,
2753         .rates = SUPPORTED_RATES,
2754         .maxbps = SUPPORTED_MAXBPS,
2755         .formats = SUPPORTED_FORMATS,
2756         .ops = {
2757                 .open = simple_playback_pcm_open,
2758                 .close = nvhdmi_8ch_7x_pcm_close,
2759                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2760         },
2761 };
2762
2763 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2764 {
2765         struct hdmi_spec *spec;
2766         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2767                                     nvhdmi_master_pin_nid_7x);
2768         if (err < 0)
2769                 return err;
2770
2771         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2772         /* override the PCM rates, etc, as the codec doesn't give full list */
2773         spec = codec->spec;
2774         spec->pcm_playback.rates = SUPPORTED_RATES;
2775         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2776         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2777         return 0;
2778 }
2779
2780 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2781 {
2782         struct hdmi_spec *spec = codec->spec;
2783         int err = simple_playback_build_pcms(codec);
2784         if (!err) {
2785                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2786                 info->own_chmap = true;
2787         }
2788         return err;
2789 }
2790
2791 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2792 {
2793         struct hdmi_spec *spec = codec->spec;
2794         struct hda_pcm *info;
2795         struct snd_pcm_chmap *chmap;
2796         int err;
2797
2798         err = simple_playback_build_controls(codec);
2799         if (err < 0)
2800                 return err;
2801
2802         /* add channel maps */
2803         info = get_pcm_rec(spec, 0);
2804         err = snd_pcm_add_chmap_ctls(info->pcm,
2805                                      SNDRV_PCM_STREAM_PLAYBACK,
2806                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2807         if (err < 0)
2808                 return err;
2809         switch (codec->preset->id) {
2810         case 0x10de0002:
2811         case 0x10de0003:
2812         case 0x10de0005:
2813         case 0x10de0006:
2814                 chmap->channel_mask = (1U << 2) | (1U << 8);
2815                 break;
2816         case 0x10de0007:
2817                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2818         }
2819         return 0;
2820 }
2821
2822 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2823 {
2824         struct hdmi_spec *spec;
2825         int err = patch_nvhdmi_2ch(codec);
2826         if (err < 0)
2827                 return err;
2828         spec = codec->spec;
2829         spec->multiout.max_channels = 8;
2830         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2831         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2832         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2833         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2834
2835         /* Initialize the audio infoframe channel mask and checksum to something
2836          * valid */
2837         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2838
2839         return 0;
2840 }
2841
2842 /*
2843  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2844  * - 0x10de0015
2845  * - 0x10de0040
2846  */
2847 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2848                                                     int channels)
2849 {
2850         if (cap->ca_index == 0x00 && channels == 2)
2851                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2852
2853         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2854 }
2855
2856 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2857 {
2858         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2859                 return -EINVAL;
2860
2861         return 0;
2862 }
2863
2864 static int patch_nvhdmi(struct hda_codec *codec)
2865 {
2866         struct hdmi_spec *spec;
2867         int err;
2868
2869         err = patch_generic_hdmi(codec);
2870         if (err)
2871                 return err;
2872
2873         spec = codec->spec;
2874         spec->dyn_pin_out = true;
2875
2876         spec->ops.chmap_cea_alloc_validate_get_type =
2877                 nvhdmi_chmap_cea_alloc_validate_get_type;
2878         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2879
2880         return 0;
2881 }
2882
2883 /*
2884  * ATI/AMD-specific implementations
2885  */
2886
2887 #define is_amdhdmi_rev3_or_later(codec) \
2888         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2889 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2890
2891 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2892 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2893 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2894 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2895 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2896 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2897 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2898 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2899 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2900 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2901 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2902 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2903 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2904 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2905 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2906 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2907 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2908 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2909 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2910 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2911 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2912 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2913 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2914 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2915 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2916
2917 /* AMD specific HDA cvt verbs */
2918 #define ATI_VERB_SET_RAMP_RATE          0x770
2919 #define ATI_VERB_GET_RAMP_RATE          0xf70
2920
2921 #define ATI_OUT_ENABLE 0x1
2922
2923 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2924 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2925
2926 #define ATI_HBR_CAPABLE 0x01
2927 #define ATI_HBR_ENABLE 0x10
2928
2929 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2930                            unsigned char *buf, int *eld_size)
2931 {
2932         /* call hda_eld.c ATI/AMD-specific function */
2933         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2934                                     is_amdhdmi_rev3_or_later(codec));
2935 }
2936
2937 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2938                                         int active_channels, int conn_type)
2939 {
2940         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2941 }
2942
2943 static int atihdmi_paired_swap_fc_lfe(int pos)
2944 {
2945         /*
2946          * ATI/AMD have automatic FC/LFE swap built-in
2947          * when in pairwise mapping mode.
2948          */
2949
2950         switch (pos) {
2951                 /* see channel_allocations[].speakers[] */
2952                 case 2: return 3;
2953                 case 3: return 2;
2954                 default: break;
2955         }
2956
2957         return pos;
2958 }
2959
2960 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2961 {
2962         struct cea_channel_speaker_allocation *cap;
2963         int i, j;
2964
2965         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2966
2967         cap = &channel_allocations[get_channel_allocation_order(ca)];
2968         for (i = 0; i < chs; ++i) {
2969                 int mask = to_spk_mask(map[i]);
2970                 bool ok = false;
2971                 bool companion_ok = false;
2972
2973                 if (!mask)
2974                         continue;
2975
2976                 for (j = 0 + i % 2; j < 8; j += 2) {
2977                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2978                         if (cap->speakers[chan_idx] == mask) {
2979                                 /* channel is in a supported position */
2980                                 ok = true;
2981
2982                                 if (i % 2 == 0 && i + 1 < chs) {
2983                                         /* even channel, check the odd companion */
2984                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2985                                         int comp_mask_req = to_spk_mask(map[i+1]);
2986                                         int comp_mask_act = cap->speakers[comp_chan_idx];
2987
2988                                         if (comp_mask_req == comp_mask_act)
2989                                                 companion_ok = true;
2990                                         else
2991                                                 return -EINVAL;
2992                                 }
2993                                 break;
2994                         }
2995                 }
2996
2997                 if (!ok)
2998                         return -EINVAL;
2999
3000                 if (companion_ok)
3001                         i++; /* companion channel already checked */
3002         }
3003
3004         return 0;
3005 }
3006
3007 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3008                                         int hdmi_slot, int stream_channel)
3009 {
3010         int verb;
3011         int ati_channel_setup = 0;
3012
3013         if (hdmi_slot > 7)
3014                 return -EINVAL;
3015
3016         if (!has_amd_full_remap_support(codec)) {
3017                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3018
3019                 /* In case this is an odd slot but without stream channel, do not
3020                  * disable the slot since the corresponding even slot could have a
3021                  * channel. In case neither have a channel, the slot pair will be
3022                  * disabled when this function is called for the even slot. */
3023                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3024                         return 0;
3025
3026                 hdmi_slot -= hdmi_slot % 2;
3027
3028                 if (stream_channel != 0xf)
3029                         stream_channel -= stream_channel % 2;
3030         }
3031
3032         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3033
3034         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3035
3036         if (stream_channel != 0xf)
3037                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3038
3039         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3040 }
3041
3042 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3043                                         int asp_slot)
3044 {
3045         bool was_odd = false;
3046         int ati_asp_slot = asp_slot;
3047         int verb;
3048         int ati_channel_setup;
3049
3050         if (asp_slot > 7)
3051                 return -EINVAL;
3052
3053         if (!has_amd_full_remap_support(codec)) {
3054                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3055                 if (ati_asp_slot % 2 != 0) {
3056                         ati_asp_slot -= 1;
3057                         was_odd = true;
3058                 }
3059         }
3060
3061         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3062
3063         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3064
3065         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3066                 return 0xf;
3067
3068         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3069 }
3070
3071 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3072                                                             int channels)
3073 {
3074         int c;
3075
3076         /*
3077          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3078          * we need to take that into account (a single channel may take 2
3079          * channel slots if we need to carry a silent channel next to it).
3080          * On Rev3+ AMD codecs this function is not used.
3081          */
3082         int chanpairs = 0;
3083
3084         /* We only produce even-numbered channel count TLVs */
3085         if ((channels % 2) != 0)
3086                 return -1;
3087
3088         for (c = 0; c < 7; c += 2) {
3089                 if (cap->speakers[c] || cap->speakers[c+1])
3090                         chanpairs++;
3091         }
3092
3093         if (chanpairs * 2 != channels)
3094                 return -1;
3095
3096         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3097 }
3098
3099 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3100                                                   unsigned int *chmap, int channels)
3101 {
3102         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3103         int count = 0;
3104         int c;
3105
3106         for (c = 7; c >= 0; c--) {
3107                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3108                 int spk = cap->speakers[chan];
3109                 if (!spk) {
3110                         /* add N/A channel if the companion channel is occupied */
3111                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3112                                 chmap[count++] = SNDRV_CHMAP_NA;
3113
3114                         continue;
3115                 }
3116
3117                 chmap[count++] = spk_to_chmap(spk);
3118         }
3119
3120         WARN_ON(count != channels);
3121 }
3122
3123 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3124                                  bool hbr)
3125 {
3126         int hbr_ctl, hbr_ctl_new;
3127
3128         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3129         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3130                 if (hbr)
3131                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3132                 else
3133                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3134
3135                 snd_printdd("atihdmi_pin_hbr_setup: "
3136                                 "NID=0x%x, %shbr-ctl=0x%x\n",
3137                                 pin_nid,
3138                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3139                                 hbr_ctl_new);
3140
3141                 if (hbr_ctl != hbr_ctl_new)
3142                         snd_hda_codec_write(codec, pin_nid, 0,
3143                                                 ATI_VERB_SET_HBR_CONTROL,
3144                                                 hbr_ctl_new);
3145
3146         } else if (hbr)
3147                 return -EINVAL;
3148
3149         return 0;
3150 }
3151
3152 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3153                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3154 {
3155
3156         if (is_amdhdmi_rev3_or_later(codec)) {
3157                 int ramp_rate = 180; /* default as per AMD spec */
3158                 /* disable ramp-up/down for non-pcm as per AMD spec */
3159                 if (format & AC_FMT_TYPE_NON_PCM)
3160                         ramp_rate = 0;
3161
3162                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3163         }
3164
3165         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3166 }
3167
3168
3169 static int atihdmi_init(struct hda_codec *codec)
3170 {
3171         struct hdmi_spec *spec = codec->spec;
3172         int pin_idx, err;
3173
3174         err = generic_hdmi_init(codec);
3175
3176         if (err)
3177                 return err;
3178
3179         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3180                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3181
3182                 /* make sure downmix information in infoframe is zero */
3183                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3184
3185                 /* enable channel-wise remap mode if supported */
3186                 if (has_amd_full_remap_support(codec))
3187                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3188                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3189                                             ATI_MULTICHANNEL_MODE_SINGLE);
3190         }
3191
3192         return 0;
3193 }
3194
3195 static int patch_atihdmi(struct hda_codec *codec)
3196 {
3197         struct hdmi_spec *spec;
3198         struct hdmi_spec_per_cvt *per_cvt;
3199         int err, cvt_idx;
3200
3201         err = patch_generic_hdmi(codec);
3202
3203         if (err)
3204                 return err;
3205
3206         codec->patch_ops.init = atihdmi_init;
3207
3208         spec = codec->spec;
3209
3210         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3211         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3212         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3213         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3214         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3215         spec->ops.setup_stream = atihdmi_setup_stream;
3216
3217         if (!has_amd_full_remap_support(codec)) {
3218                 /* override to ATI/AMD-specific versions with pairwise mapping */
3219                 spec->ops.chmap_cea_alloc_validate_get_type =
3220                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3221                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3222                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3223         }
3224
3225         /* ATI/AMD converters do not advertise all of their capabilities */
3226         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3227                 per_cvt = get_cvt(spec, cvt_idx);
3228                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3229                 per_cvt->rates |= SUPPORTED_RATES;
3230                 per_cvt->formats |= SUPPORTED_FORMATS;
3231                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3232         }
3233
3234         spec->channels_max = max(spec->channels_max, 8u);
3235
3236         return 0;
3237 }
3238
3239 /* VIA HDMI Implementation */
3240 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3241 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3242
3243 static int patch_via_hdmi(struct hda_codec *codec)
3244 {
3245         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3246 }
3247
3248 /*
3249  * called from hda_codec.c for generic HDMI support
3250  */
3251 int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3252 {
3253         return patch_generic_hdmi(codec);
3254 }
3255 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3256
3257 /*
3258  * patch entries
3259  */
3260 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3261 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3262 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3263 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3264 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3265 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3266 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3267 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3268 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3269 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3270 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3271 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3272 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3273 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3274 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3275 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3276 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3277 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3278 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3279 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3280 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3281 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3282 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3283 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3284 /* 17 is known to be absent */
3285 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3286 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3287 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3288 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3289 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3290 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3291 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3292 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3293 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3294 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3295 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3296 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3297 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3298 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3299 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3300 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3301 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3302 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3303 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3304 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3305 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3306 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3307 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3308 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3309 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3310 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3311 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3312 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3313 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3314 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3315 {} /* terminator */
3316 };
3317
3318 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3319 MODULE_ALIAS("snd-hda-codec-id:10027919");
3320 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3321 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3322 MODULE_ALIAS("snd-hda-codec-id:10951390");
3323 MODULE_ALIAS("snd-hda-codec-id:10951392");
3324 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3325 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3326 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3327 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3328 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3329 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3330 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3331 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3332 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3333 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3334 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3335 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3336 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3337 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3338 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3339 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3340 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3341 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3342 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3343 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3344 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3345 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3346 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3347 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3348 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3349 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3350 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3351 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3352 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3353 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3354 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3355 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3356 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3357 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3358 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3359 MODULE_ALIAS("snd-hda-codec-id:80860054");
3360 MODULE_ALIAS("snd-hda-codec-id:80862801");
3361 MODULE_ALIAS("snd-hda-codec-id:80862802");
3362 MODULE_ALIAS("snd-hda-codec-id:80862803");
3363 MODULE_ALIAS("snd-hda-codec-id:80862804");
3364 MODULE_ALIAS("snd-hda-codec-id:80862805");
3365 MODULE_ALIAS("snd-hda-codec-id:80862806");
3366 MODULE_ALIAS("snd-hda-codec-id:80862807");
3367 MODULE_ALIAS("snd-hda-codec-id:80862808");
3368 MODULE_ALIAS("snd-hda-codec-id:80862880");
3369 MODULE_ALIAS("snd-hda-codec-id:80862882");
3370 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3371
3372 MODULE_LICENSE("GPL");
3373 MODULE_DESCRIPTION("HDMI HD-audio codec");
3374 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3375 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3376 MODULE_ALIAS("snd-hda-codec-atihdmi");
3377
3378 static struct hda_codec_preset_list intel_list = {
3379         .preset = snd_hda_preset_hdmi,
3380         .owner = THIS_MODULE,
3381 };
3382
3383 static int __init patch_hdmi_init(void)
3384 {
3385         return snd_hda_add_codec_preset(&intel_list);
3386 }
3387
3388 static void __exit patch_hdmi_exit(void)
3389 {
3390         snd_hda_delete_codec_preset(&intel_list);
3391 }
3392
3393 module_init(patch_hdmi_init)
3394 module_exit(patch_hdmi_exit)