Pileus Git - ~andy/linux/blob - drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <linux/moduleparam.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio_host.h"
  43 #include "sdio_chip.h"
  44 #include "nvram.h"
  45
  46 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  47
  48 #ifdef DEBUG
  49
  50 #define BRCMF_TRAP_INFO_SIZE    80
  51
  52 #define CBUF_LEN        (128)
  53
  54 /* Device console log buffer state */
  55 #define CONSOLE_BUFFER_MAX      2024
  56
  57 struct rte_log_le {
  58         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  59         __le32 buf_size;
  60         __le32 idx;
  61         char *_buf_compat;      /* Redundant pointer for backward compat. */
  62 };
  63
  64 struct rte_console {
  65         /* Virtual UART
  66          * When there is no UART (e.g. Quickturn),
  67          * the host should write a complete
  68          * input line directly into cbuf and then write
  69          * the length into vcons_in.
  70          * This may also be used when there is a real UART
  71          * (at risk of conflicting with
  72          * the real UART).  vcons_out is currently unused.
  73          */
  74         uint vcons_in;
  75         uint vcons_out;
  76
  77         /* Output (logging) buffer
  78          * Console output is written to a ring buffer log_buf at index log_idx.
  79          * The host may read the output when it sees log_idx advance.
  80          * Output will be lost if the output wraps around faster than the host
  81          * polls.
  82          */
  83         struct rte_log_le log_le;
  84
  85         /* Console input line buffer
  86          * Characters are read one at a time into cbuf
  87          * until <CR> is received, then
  88          * the buffer is processed as a command line.
  89          * Also used for virtual UART.
  90          */
  91         uint cbuf_idx;
  92         char cbuf[CBUF_LEN];
  93 };
  94
  95 #endif                          /* DEBUG */
  96 #include <chipcommon.h>
  97
  98 #include "dhd_bus.h"
  99 #include "dhd_dbg.h"
 100 #include "tracepoint.h"
 101
 102 #define TXQLEN          2048    /* bulk tx queue length */
 103 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 104 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 105 #define PRIOMASK        7
 106
 107 #define TXRETRIES       2       /* # of retries for tx frames */
 108
 109 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 110                                  one scheduling */
 111
 112 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 113                                  one scheduling */
 114
 115 #define BRCMF_DEFAULT_TXGLOM_SIZE       32  /* max tx frames in glom chain */
 116
 117 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 118
 119 #define MEMBLOCK        2048    /* Block size used for downloading
 120                                  of dongle image */
 121 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 122                                  biggest possible glom */
 123
 124 #define BRCMF_FIRSTREAD (1 << 6)
 125
 126
 127 /* SBSDIO_DEVICE_CTL */
 128
 129 /* 1: device will assert busy signal when receiving CMD53 */
 130 #define SBSDIO_DEVCTL_SETBUSY           0x01
 131 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 132 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 133 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 134 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 135 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 136  * sdio bus power cycle to clear (rev 9) */
 137 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 138 /* Force SD->SB reset mapping (rev 11) */
 139 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 140 /*   Determined by CoreControl bit */
 141 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 142 /*   Force backplane reset */
 143 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 144 /*   Force no backplane reset */
 145 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 146
 147 /* direct(mapped) cis space */
 148
 149 /* MAPPED common CIS address */
 150 #define SBSDIO_CIS_BASE_COMMON          0x1000
 151 /* maximum bytes in one CIS */
 152 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 153 /* cis offset addr is < 17 bits */
 154 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 155
 156 /* manfid tuple length, include tuple, link bytes */
 157 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 158
 159 /* intstatus */
 160 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 161 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 162 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 163 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 164 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 165 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 166 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 167 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 168 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 169 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 170 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 171 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 172 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 173 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 174 #define I_PC            (1 << 10)       /* descriptor error */
 175 #define I_PD            (1 << 11)       /* data error */
 176 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 177 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 178 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 179 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 180 #define I_RI            (1 << 16)       /* Receive Interrupt */
 181 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 182 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 183 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 184 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 185 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 186 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 187 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 188 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 189 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 190 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 191 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 192 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 193
 194 /* corecontrol */
 195 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 196 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 197 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 198 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 199 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 200 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 201
 202 /* SDA_FRAMECTRL */
 203 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 204 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 205 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 206 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 207
 208 /*
 209  * Software allocation of To SB Mailbox resources
 210  */
 211
 212 /* tosbmailbox bits corresponding to intstatus bits */
 213 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 214 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 215 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 216 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 217
 218 /* tosbmailboxdata */
 219 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 220
 221 /*
 222  * Software allocation of To Host Mailbox resources
 223  */
 224
 225 /* intstatus bits */
 226 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 227 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 228 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 229 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 230
 231 /* tohostmailboxdata */
 232 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 233 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 234 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 235 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 236
 237 #define HMB_DATA_FCDATA_MASK    0xff000000
 238 #define HMB_DATA_FCDATA_SHIFT   24
 239
 240 #define HMB_DATA_VERSION_MASK   0x00ff0000
 241 #define HMB_DATA_VERSION_SHIFT  16
 242
 243 /*
 244  * Software-defined protocol header
 245  */
 246
 247 /* Current protocol version */
 248 #define SDPCM_PROT_VERSION      4
 249
 250 /*
 251  * Shared structure between dongle and the host.
 252  * The structure contains pointers to trap or assert information.
 253  */
 254 #define SDPCM_SHARED_VERSION       0x0003
 255 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 256 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 257 #define SDPCM_SHARED_ASSERT        0x0200
 258 #define SDPCM_SHARED_TRAP          0x0400
 259
 260 /* Space for header read, limit for data packets */
 261 #define MAX_HDR_READ    (1 << 6)
 262 #define MAX_RX_DATASZ   2048
 263
 264 /* Bump up limit on waiting for HT to account for first startup;
 265  * if the image is doing a CRC calculation before programming the PMU
 266  * for HT availability, it could take a couple hundred ms more, so
 267  * max out at a 1 second (1000000us).
 268  */
 269 #undef PMU_MAX_TRANSITION_DLY
 270 #define PMU_MAX_TRANSITION_DLY 1000000
 271
 272 /* Value for ChipClockCSR during initial setup */
 273 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 274                                         SBSDIO_ALP_AVAIL_REQ)
 275
 276 /* Flags for SDH calls */
 277 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 278
 279 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 280 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 281                                          * when idle
 282                                          */
 283 #define BRCMF_IDLE_INTERVAL     1
 284
 285 #define KSO_WAIT_US 50
 286 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 287
 288 /*
 289  * Conversion of 802.1D priority to precedence level
 290  */
 291 static uint prio2prec(u32 prio)
 292 {
 293         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 294                (prio^2) : prio;
 295 }
 296
 297 #ifdef DEBUG
 298 /* Device console log buffer state */
 299 struct brcmf_console {
 300         uint count;             /* Poll interval msec counter */
 301         uint log_addr;          /* Log struct address (fixed) */
 302         struct rte_log_le log_le;       /* Log struct (host copy) */
 303         uint bufsize;           /* Size of log buffer */
 304         u8 *buf;                /* Log buffer (host copy) */
 305         uint last;              /* Last buffer read index */
 306 };
 307
 308 struct brcmf_trap_info {
 309         __le32          type;
 310         __le32          epc;
 311         __le32          cpsr;
 312         __le32          spsr;
 313         __le32          r0;     /* a1 */
 314         __le32          r1;     /* a2 */
 315         __le32          r2;     /* a3 */
 316         __le32          r3;     /* a4 */
 317         __le32          r4;     /* v1 */
 318         __le32          r5;     /* v2 */
 319         __le32          r6;     /* v3 */
 320         __le32          r7;     /* v4 */
 321         __le32          r8;     /* v5 */
 322         __le32          r9;     /* sb/v6 */
 323         __le32          r10;    /* sl/v7 */
 324         __le32          r11;    /* fp/v8 */
 325         __le32          r12;    /* ip */
 326         __le32          r13;    /* sp */
 327         __le32          r14;    /* lr */
 328         __le32          pc;     /* r15 */
 329 };
 330 #endif                          /* DEBUG */
 331
 332 struct sdpcm_shared {
 333         u32 flags;
 334         u32 trap_addr;
 335         u32 assert_exp_addr;
 336         u32 assert_file_addr;
 337         u32 assert_line;
 338         u32 console_addr;       /* Address of struct rte_console */
 339         u32 msgtrace_addr;
 340         u8 tag[32];
 341         u32 brpt_addr;
 342 };
 343
 344 struct sdpcm_shared_le {
 345         __le32 flags;
 346         __le32 trap_addr;
 347         __le32 assert_exp_addr;
 348         __le32 assert_file_addr;
 349         __le32 assert_line;
 350         __le32 console_addr;    /* Address of struct rte_console */
 351         __le32 msgtrace_addr;
 352         u8 tag[32];
 353         __le32 brpt_addr;
 354 };
 355
 356 /* dongle SDIO bus specific header info */
 357 struct brcmf_sdio_hdrinfo {
 358         u8 seq_num;
 359         u8 channel;
 360         u16 len;
 361         u16 len_left;
 362         u16 len_nxtfrm;
 363         u8 dat_offset;
 364         bool lastfrm;
 365         u16 tail_pad;
 366 };
 367
 368 /* misc chip info needed by some of the routines */
 369 /* Private data for SDIO bus interaction */
 370 struct brcmf_sdio {
 371         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 372         struct brcmf_chip *ci;  /* Chip info struct */
 373
 374         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 375
 376         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 377         atomic_t intstatus;     /* Intstatus bits (events) pending */
 378         atomic_t fcstate;       /* State of dongle flow-control */
 379
 380         uint blocksize;         /* Block size of SDIO transfers */
 381         uint roundup;           /* Max roundup limit */
 382
 383         struct pktq txq;        /* Queue length used for flow-control */
 384         u8 flowcontrol; /* per prio flow control bitmask */
 385         u8 tx_seq;              /* Transmit sequence number (next) */
 386         u8 tx_max;              /* Maximum transmit sequence allowed */
 387
 388         u8 *hdrbuf;             /* buffer for handling rx frame */
 389         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 390         u8 rx_seq;              /* Receive sequence number (expected) */
 391         struct brcmf_sdio_hdrinfo cur_read;
 392                                 /* info of current read frame */
 393         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 394         bool rxpending;         /* Data frame pending in dongle */
 395
 396         uint rxbound;           /* Rx frames to read before resched */
 397         uint txbound;           /* Tx frames to send before resched */
 398         uint txminmax;
 399
 400         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 401         struct sk_buff_head glom; /* Packet list for glommed superframe */
 402         uint glomerr;           /* Glom packet read errors */
 403
 404         u8 *rxbuf;              /* Buffer for receiving control packets */
 405         uint rxblen;            /* Allocated length of rxbuf */
 406         u8 *rxctl;              /* Aligned pointer into rxbuf */
 407         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 408         uint rxlen;             /* Length of valid data in buffer */
 409         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 410
 411         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 412
 413         bool intr;              /* Use interrupts */
 414         bool poll;              /* Use polling */
 415         atomic_t ipend;         /* Device interrupt is pending */
 416         uint spurious;          /* Count of spurious interrupts */
 417         uint pollrate;          /* Ticks between device polls */
 418         uint polltick;          /* Tick counter */
 419
 420 #ifdef DEBUG
 421         uint console_interval;
 422         struct brcmf_console console;   /* Console output polling support */
 423         uint console_addr;      /* Console address from shared struct */
 424 #endif                          /* DEBUG */
 425
 426         uint clkstate;          /* State of sd and backplane clock(s) */
 427         bool activity;          /* Activity flag for clock down */
 428         s32 idletime;           /* Control for activity timeout */
 429         s32 idlecount;  /* Activity timeout counter */
 430         s32 idleclock;  /* How to set bus driver when idle */
 431         bool rxflow_mode;       /* Rx flow control mode */
 432         bool rxflow;            /* Is rx flow control on */
 433         bool alp_only;          /* Don't use HT clock (ALP only) */
 434
 435         u8 *ctrl_frame_buf;
 436         u32 ctrl_frame_len;
 437         bool ctrl_frame_stat;
 438
 439         spinlock_t txqlock;
 440         wait_queue_head_t ctrl_wait;
 441         wait_queue_head_t dcmd_resp_wait;
 442
 443         struct timer_list timer;
 444         struct completion watchdog_wait;
 445         struct task_struct *watchdog_tsk;
 446         bool wd_timer_valid;
 447         uint save_ms;
 448
 449         struct workqueue_struct *brcmf_wq;
 450         struct work_struct datawork;
 451         atomic_t dpc_tskcnt;
 452
 453         bool txoff;             /* Transmit flow-controlled */
 454         struct brcmf_sdio_count sdcnt;
 455         bool sr_enabled; /* SaveRestore enabled */
 456         bool sleeping; /* SDIO bus sleeping */
 457
 458         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 459         bool txglom;            /* host tx glomming enable flag */
 460         u16 head_align;         /* buffer pointer alignment */
 461         u16 sgentry_align;      /* scatter-gather buffer alignment */
 462 };
 463
 464 /* clkstate */
 465 #define CLK_NONE        0
 466 #define CLK_SDONLY      1
 467 #define CLK_PENDING     2
 468 #define CLK_AVAIL       3
 469
 470 #ifdef DEBUG
 471 static int qcount[NUMPRIO];
 472 #endif                          /* DEBUG */
 473
 474 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 475
 476 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 477
 478 /* Retry count for register access failures */
 479 static const uint retry_limit = 2;
 480
 481 /* Limit on rounding up frames */
 482 static const uint max_roundup = 512;
 483
 484 #define ALIGNMENT  4
 485
 486 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
 487 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
 488 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
 489
 490 enum brcmf_sdio_frmtype {
 491         BRCMF_SDIO_FT_NORMAL,
 492         BRCMF_SDIO_FT_SUPER,
 493         BRCMF_SDIO_FT_SUB,
 494 };
 495
 496 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 497 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 498 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 499 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 500 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 501 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 502 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 503 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 504 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 505 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 506 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 507 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 508 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 509 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 510 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 511 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 512 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 513 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 514
 515 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 516 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 517 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 518 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 519 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 520 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 521 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 522 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 523 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 524 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 525 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 526 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 527 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 528 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 529 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 530 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 531 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 532 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 533
 534 struct brcmf_firmware_names {
 535         u32 chipid;
 536         u32 revmsk;
 537         const char *bin;
 538         const char *nv;
 539 };
 540
 541 enum brcmf_firmware_type {
 542         BRCMF_FIRMWARE_BIN,
 543         BRCMF_FIRMWARE_NVRAM
 544 };
 545
 546 #define BRCMF_FIRMWARE_NVRAM(name) \
 547         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 548
 549 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 550         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 551         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 552         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 553         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 554         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 555         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 556         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 557         { BCM43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 558         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
 559 };
 560
 561
 562 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
 563                                                   enum brcmf_firmware_type type)
 564 {
 565         const struct firmware *fw;
 566         const char *name;
 567         int err, i;
 568
 569         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 570                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 571                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 572                         switch (type) {
 573                         case BRCMF_FIRMWARE_BIN:
 574                                 name = brcmf_fwname_data[i].bin;
 575                                 break;
 576                         case BRCMF_FIRMWARE_NVRAM:
 577                                 name = brcmf_fwname_data[i].nv;
 578                                 break;
 579                         default:
 580                                 brcmf_err("invalid firmware type (%d)\n", type);
 581                                 return NULL;
 582                         }
 583                         goto found;
 584                 }
 585         }
 586         brcmf_err("Unknown chipid %d [%d]\n",
 587                   bus->ci->chip, bus->ci->chiprev);
 588         return NULL;
 589
 590 found:
 591         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 592         if ((err) || (!fw)) {
 593                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 594                 return NULL;
 595         }
 596
 597         return fw;
 598 }
 599
 600 static void pkt_align(struct sk_buff *p, int len, int align)
 601 {
 602         uint datalign;
 603         datalign = (unsigned long)(p->data);
 604         datalign = roundup(datalign, (align)) - datalign;
 605         if (datalign)
 606                 skb_pull(p, datalign);
 607         __skb_trim(p, len);
 608 }
 609
 610 /* To check if there's window offered */
 611 static bool data_ok(struct brcmf_sdio *bus)
 612 {
 613         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 614                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 615 }
 616
 617 /*
 618  * Reads a register in the SDIO hardware block. This block occupies a series of
 619  * adresses on the 32 bit backplane bus.
 620  */
 621 static int
 622 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 623 {
 624         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 625         int ret;
 626
 627         *regvar = brcmf_sdiod_regrl(bus->sdiodev,
 628                                     bus->ci->c_inf[idx].base + offset, &ret);
 629
 630         return ret;
 631 }
 632
 633 static int
 634 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 635 {
 636         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 637         int ret;
 638
 639         brcmf_sdiod_regwl(bus->sdiodev,
 640                           bus->ci->c_inf[idx].base + reg_offset,
 641                           regval, &ret);
 642
 643         return ret;
 644 }
 645
 646 static int
 647 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 648 {
 649         u8 wr_val = 0, rd_val, cmp_val, bmask;
 650         int err = 0;
 651         int try_cnt = 0;
 652
 653         brcmf_dbg(TRACE, "Enter\n");
 654
 655         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 656         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 657         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 658                           wr_val, &err);
 659         if (err) {
 660                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 661                 return err;
 662         }
 663
 664         if (on) {
 665                 /* device WAKEUP through KSO:
 666                  * write bit 0 & read back until
 667                  * both bits 0 (kso bit) & 1 (dev on status) are set
 668                  */
 669                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 670                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 671                 bmask = cmp_val;
 672                 usleep_range(2000, 3000);
 673         } else {
 674                 /* Put device to sleep, turn off KSO */
 675                 cmp_val = 0;
 676                 /* only check for bit0, bit1(dev on status) may not
 677                  * get cleared right away
 678                  */
 679                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 680         }
 681
 682         do {
 683                 /* reliable KSO bit set/clr:
 684                  * the sdiod sleep write access is synced to PMU 32khz clk
 685                  * just one write attempt may fail,
 686                  * read it back until it matches written value
 687                  */
 688                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 689                                            &err);
 690                 if (((rd_val & bmask) == cmp_val) && !err)
 691                         break;
 692                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 693                           try_cnt, MAX_KSO_ATTEMPTS, err);
 694                 udelay(KSO_WAIT_US);
 695                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 696                                   wr_val, &err);
 697         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 698
 699         return err;
 700 }
 701
 702 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 703
 704 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 705
 706 /* Turn backplane clock on or off */
 707 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 708 {
 709         int err;
 710         u8 clkctl, clkreq, devctl;
 711         unsigned long timeout;
 712
 713         brcmf_dbg(SDIO, "Enter\n");
 714
 715         clkctl = 0;
 716
 717         if (bus->sr_enabled) {
 718                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 719                 return 0;
 720         }
 721
 722         if (on) {
 723                 /* Request HT Avail */
 724                 clkreq =
 725                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 726
 727                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 728                                   clkreq, &err);
 729                 if (err) {
 730                         brcmf_err("HT Avail request error: %d\n", err);
 731                         return -EBADE;
 732                 }
 733
 734                 /* Check current status */
 735                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 736                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 737                 if (err) {
 738                         brcmf_err("HT Avail read error: %d\n", err);
 739                         return -EBADE;
 740                 }
 741
 742                 /* Go to pending and await interrupt if appropriate */
 743                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 744                         /* Allow only clock-available interrupt */
 745                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 746                                                    SBSDIO_DEVICE_CTL, &err);
 747                         if (err) {
 748                                 brcmf_err("Devctl error setting CA: %d\n",
 749                                           err);
 750                                 return -EBADE;
 751                         }
 752
 753                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 754                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 755                                           devctl, &err);
 756                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 757                         bus->clkstate = CLK_PENDING;
 758
 759                         return 0;
 760                 } else if (bus->clkstate == CLK_PENDING) {
 761                         /* Cancel CA-only interrupt filter */
 762                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 763                                                    SBSDIO_DEVICE_CTL, &err);
 764                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 765                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 766                                           devctl, &err);
 767                 }
 768
 769                 /* Otherwise, wait here (polling) for HT Avail */
 770                 timeout = jiffies +
 771                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 772                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 773                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 774                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 775                                                    &err);
 776                         if (time_after(jiffies, timeout))
 777                                 break;
 778                         else
 779                                 usleep_range(5000, 10000);
 780                 }
 781                 if (err) {
 782                         brcmf_err("HT Avail request error: %d\n", err);
 783                         return -EBADE;
 784                 }
 785                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 786                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 787                                   PMU_MAX_TRANSITION_DLY, clkctl);
 788                         return -EBADE;
 789                 }
 790
 791                 /* Mark clock available */
 792                 bus->clkstate = CLK_AVAIL;
 793                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 794
 795 #if defined(DEBUG)
 796                 if (!bus->alp_only) {
 797                         if (SBSDIO_ALPONLY(clkctl))
 798                                 brcmf_err("HT Clock should be on\n");
 799                 }
 800 #endif                          /* defined (DEBUG) */
 801
 802                 bus->activity = true;
 803         } else {
 804                 clkreq = 0;
 805
 806                 if (bus->clkstate == CLK_PENDING) {
 807                         /* Cancel CA-only interrupt filter */
 808                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 809                                                    SBSDIO_DEVICE_CTL, &err);
 810                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 811                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 812                                           devctl, &err);
 813                 }
 814
 815                 bus->clkstate = CLK_SDONLY;
 816                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 817                                   clkreq, &err);
 818                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 819                 if (err) {
 820                         brcmf_err("Failed access turning clock off: %d\n",
 821                                   err);
 822                         return -EBADE;
 823                 }
 824         }
 825         return 0;
 826 }
 827
 828 /* Change idle/active SD state */
 829 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 830 {
 831         brcmf_dbg(SDIO, "Enter\n");
 832
 833         if (on)
 834                 bus->clkstate = CLK_SDONLY;
 835         else
 836                 bus->clkstate = CLK_NONE;
 837
 838         return 0;
 839 }
 840
 841 /* Transition SD and backplane clock readiness */
 842 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 843 {
 844 #ifdef DEBUG
 845         uint oldstate = bus->clkstate;
 846 #endif                          /* DEBUG */
 847
 848         brcmf_dbg(SDIO, "Enter\n");
 849
 850         /* Early exit if we're already there */
 851         if (bus->clkstate == target) {
 852                 if (target == CLK_AVAIL) {
 853                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 854                         bus->activity = true;
 855                 }
 856                 return 0;
 857         }
 858
 859         switch (target) {
 860         case CLK_AVAIL:
 861                 /* Make sure SD clock is available */
 862                 if (bus->clkstate == CLK_NONE)
 863                         brcmf_sdio_sdclk(bus, true);
 864                 /* Now request HT Avail on the backplane */
 865                 brcmf_sdio_htclk(bus, true, pendok);
 866                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 867                 bus->activity = true;
 868                 break;
 869
 870         case CLK_SDONLY:
 871                 /* Remove HT request, or bring up SD clock */
 872                 if (bus->clkstate == CLK_NONE)
 873                         brcmf_sdio_sdclk(bus, true);
 874                 else if (bus->clkstate == CLK_AVAIL)
 875                         brcmf_sdio_htclk(bus, false, false);
 876                 else
 877                         brcmf_err("request for %d -> %d\n",
 878                                   bus->clkstate, target);
 879                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 880                 break;
 881
 882         case CLK_NONE:
 883                 /* Make sure to remove HT request */
 884                 if (bus->clkstate == CLK_AVAIL)
 885                         brcmf_sdio_htclk(bus, false, false);
 886                 /* Now remove the SD clock */
 887                 brcmf_sdio_sdclk(bus, false);
 888                 brcmf_sdio_wd_timer(bus, 0);
 889                 break;
 890         }
 891 #ifdef DEBUG
 892         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 893 #endif                          /* DEBUG */
 894
 895         return 0;
 896 }
 897
 898 static int
 899 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 900 {
 901         int err = 0;
 902         brcmf_dbg(TRACE, "Enter\n");
 903         brcmf_dbg(SDIO, "request %s currently %s\n",
 904                   (sleep ? "SLEEP" : "WAKE"),
 905                   (bus->sleeping ? "SLEEP" : "WAKE"));
 906
 907         /* If SR is enabled control bus state with KSO */
 908         if (bus->sr_enabled) {
 909                 /* Done if we're already in the requested state */
 910                 if (sleep == bus->sleeping)
 911                         goto end;
 912
 913                 /* Going to sleep */
 914                 if (sleep) {
 915                         /* Don't sleep if something is pending */
 916                         if (atomic_read(&bus->intstatus) ||
 917                             atomic_read(&bus->ipend) > 0 ||
 918                             (!atomic_read(&bus->fcstate) &&
 919                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 920                             data_ok(bus)))
 921                                  return -EBUSY;
 922                         err = brcmf_sdio_kso_control(bus, false);
 923                         /* disable watchdog */
 924                         if (!err)
 925                                 brcmf_sdio_wd_timer(bus, 0);
 926                 } else {
 927                         bus->idlecount = 0;
 928                         err = brcmf_sdio_kso_control(bus, true);
 929                 }
 930                 if (!err) {
 931                         /* Change state */
 932                         bus->sleeping = sleep;
 933                         brcmf_dbg(SDIO, "new state %s\n",
 934                                   (sleep ? "SLEEP" : "WAKE"));
 935                 } else {
 936                         brcmf_err("error while changing bus sleep state %d\n",
 937                                   err);
 938                         return err;
 939                 }
 940         }
 941
 942 end:
 943         /* control clocks */
 944         if (sleep) {
 945                 if (!bus->sr_enabled)
 946                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 947         } else {
 948                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 949         }
 950
 951         return err;
 952
 953 }
 954
 955 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
 956 {
 957         u32 intstatus = 0;
 958         u32 hmb_data;
 959         u8 fcbits;
 960         int ret;
 961
 962         brcmf_dbg(SDIO, "Enter\n");
 963
 964         /* Read mailbox data and ack that we did so */
 965         ret = r_sdreg32(bus, &hmb_data,
 966                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 967
 968         if (ret == 0)
 969                 w_sdreg32(bus, SMB_INT_ACK,
 970                           offsetof(struct sdpcmd_regs, tosbmailbox));
 971         bus->sdcnt.f1regdata += 2;
 972
 973         /* Dongle recomposed rx frames, accept them again */
 974         if (hmb_data & HMB_DATA_NAKHANDLED) {
 975                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 976                           bus->rx_seq);
 977                 if (!bus->rxskip)
 978                         brcmf_err("unexpected NAKHANDLED!\n");
 979
 980                 bus->rxskip = false;
 981                 intstatus |= I_HMB_FRAME_IND;
 982         }
 983
 984         /*
 985          * DEVREADY does not occur with gSPI.
 986          */
 987         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 988                 bus->sdpcm_ver =
 989                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 990                     HMB_DATA_VERSION_SHIFT;
 991                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 992                         brcmf_err("Version mismatch, dongle reports %d, "
 993                                   "expecting %d\n",
 994                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 995                 else
 996                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 997                                   bus->sdpcm_ver);
 998         }
 999
1000         /*
1001          * Flow Control has been moved into the RX headers and this out of band
1002          * method isn't used any more.
1003          * remaining backward compatible with older dongles.
1004          */
1005         if (hmb_data & HMB_DATA_FC) {
1006                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1007                                                         HMB_DATA_FCDATA_SHIFT;
1008
1009                 if (fcbits & ~bus->flowcontrol)
1010                         bus->sdcnt.fc_xoff++;
1011
1012                 if (bus->flowcontrol & ~fcbits)
1013                         bus->sdcnt.fc_xon++;
1014
1015                 bus->sdcnt.fc_rcvd++;
1016                 bus->flowcontrol = fcbits;
1017         }
1018
1019         /* Shouldn't be any others */
1020         if (hmb_data & ~(HMB_DATA_DEVREADY |
1021                          HMB_DATA_NAKHANDLED |
1022                          HMB_DATA_FC |
1023                          HMB_DATA_FWREADY |
1024                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1025                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1026                           hmb_data);
1027
1028         return intstatus;
1029 }
1030
1031 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1032 {
1033         uint retries = 0;
1034         u16 lastrbc;
1035         u8 hi, lo;
1036         int err;
1037
1038         brcmf_err("%sterminate frame%s\n",
1039                   abort ? "abort command, " : "",
1040                   rtx ? ", send NAK" : "");
1041
1042         if (abort)
1043                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1044
1045         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1046                           SFC_RF_TERM, &err);
1047         bus->sdcnt.f1regdata++;
1048
1049         /* Wait until the packet has been flushed (device/FIFO stable) */
1050         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1051                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1052                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1053                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1054                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1055                 bus->sdcnt.f1regdata += 2;
1056
1057                 if ((hi == 0) && (lo == 0))
1058                         break;
1059
1060                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1061                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1062                                   lastrbc, (hi << 8) + lo);
1063                 }
1064                 lastrbc = (hi << 8) + lo;
1065         }
1066
1067         if (!retries)
1068                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1069         else
1070                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1071
1072         if (rtx) {
1073                 bus->sdcnt.rxrtx++;
1074                 err = w_sdreg32(bus, SMB_NAK,
1075                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1076
1077                 bus->sdcnt.f1regdata++;
1078                 if (err == 0)
1079                         bus->rxskip = true;
1080         }
1081
1082         /* Clear partial in any case */
1083         bus->cur_read.len = 0;
1084 }
1085
1086 /* return total length of buffer chain */
1087 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1088 {
1089         struct sk_buff *p;
1090         uint total;
1091
1092         total = 0;
1093         skb_queue_walk(&bus->glom, p)
1094                 total += p->len;
1095         return total;
1096 }
1097
1098 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1099 {
1100         struct sk_buff *cur, *next;
1101
1102         skb_queue_walk_safe(&bus->glom, cur, next) {
1103                 skb_unlink(cur, &bus->glom);
1104                 brcmu_pkt_buf_free_skb(cur);
1105         }
1106 }
1107
1108 /**
1109  * brcmfmac sdio bus specific header
1110  * This is the lowest layer header wrapped on the packets transmitted between
1111  * host and WiFi dongle which contains information needed for SDIO core and
1112  * firmware
1113  *
1114  * It consists of 3 parts: hardware header, hardware extension header and
1115  * software header
1116  * hardware header (frame tag) - 4 bytes
1117  * Byte 0~1: Frame length
1118  * Byte 2~3: Checksum, bit-wise inverse of frame length
1119  * hardware extension header - 8 bytes
1120  * Tx glom mode only, N/A for Rx or normal Tx
1121  * Byte 0~1: Packet length excluding hw frame tag
1122  * Byte 2: Reserved
1123  * Byte 3: Frame flags, bit 0: last frame indication
1124  * Byte 4~5: Reserved
1125  * Byte 6~7: Tail padding length
1126  * software header - 8 bytes
1127  * Byte 0: Rx/Tx sequence number
1128  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1129  * Byte 2: Length of next data frame, reserved for Tx
1130  * Byte 3: Data offset
1131  * Byte 4: Flow control bits, reserved for Tx
1132  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1133  * Byte 6~7: Reserved
1134  */
1135 #define SDPCM_HWHDR_LEN                 4
1136 #define SDPCM_HWEXT_LEN                 8
1137 #define SDPCM_SWHDR_LEN                 8
1138 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1139 /* software header */
1140 #define SDPCM_SEQ_MASK                  0x000000ff
1141 #define SDPCM_SEQ_WRAP                  256
1142 #define SDPCM_CHANNEL_MASK              0x00000f00
1143 #define SDPCM_CHANNEL_SHIFT             8
1144 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1145 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1146 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1147 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1148 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1149 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1150 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1151 #define SDPCM_NEXTLEN_SHIFT             16
1152 #define SDPCM_DOFFSET_MASK              0xff000000
1153 #define SDPCM_DOFFSET_SHIFT             24
1154 #define SDPCM_FCMASK_MASK               0x000000ff
1155 #define SDPCM_WINDOW_MASK               0x0000ff00
1156 #define SDPCM_WINDOW_SHIFT              8
1157
1158 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1159 {
1160         u32 hdrvalue;
1161         hdrvalue = *(u32 *)swheader;
1162         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1163 }
1164
1165 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1166                               struct brcmf_sdio_hdrinfo *rd,
1167                               enum brcmf_sdio_frmtype type)
1168 {
1169         u16 len, checksum;
1170         u8 rx_seq, fc, tx_seq_max;
1171         u32 swheader;
1172
1173         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1174
1175         /* hw header */
1176         len = get_unaligned_le16(header);
1177         checksum = get_unaligned_le16(header + sizeof(u16));
1178         /* All zero means no more to read */
1179         if (!(len | checksum)) {
1180                 bus->rxpending = false;
1181                 return -ENODATA;
1182         }
1183         if ((u16)(~(len ^ checksum))) {
1184                 brcmf_err("HW header checksum error\n");
1185                 bus->sdcnt.rx_badhdr++;
1186                 brcmf_sdio_rxfail(bus, false, false);
1187                 return -EIO;
1188         }
1189         if (len < SDPCM_HDRLEN) {
1190                 brcmf_err("HW header length error\n");
1191                 return -EPROTO;
1192         }
1193         if (type == BRCMF_SDIO_FT_SUPER &&
1194             (roundup(len, bus->blocksize) != rd->len)) {
1195                 brcmf_err("HW superframe header length error\n");
1196                 return -EPROTO;
1197         }
1198         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1199                 brcmf_err("HW subframe header length error\n");
1200                 return -EPROTO;
1201         }
1202         rd->len = len;
1203
1204         /* software header */
1205         header += SDPCM_HWHDR_LEN;
1206         swheader = le32_to_cpu(*(__le32 *)header);
1207         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1208                 brcmf_err("Glom descriptor found in superframe head\n");
1209                 rd->len = 0;
1210                 return -EINVAL;
1211         }
1212         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1213         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1214         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1215             type != BRCMF_SDIO_FT_SUPER) {
1216                 brcmf_err("HW header length too long\n");
1217                 bus->sdcnt.rx_toolong++;
1218                 brcmf_sdio_rxfail(bus, false, false);
1219                 rd->len = 0;
1220                 return -EPROTO;
1221         }
1222         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1223                 brcmf_err("Wrong channel for superframe\n");
1224                 rd->len = 0;
1225                 return -EINVAL;
1226         }
1227         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1228             rd->channel != SDPCM_EVENT_CHANNEL) {
1229                 brcmf_err("Wrong channel for subframe\n");
1230                 rd->len = 0;
1231                 return -EINVAL;
1232         }
1233         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1234         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1235                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1236                 bus->sdcnt.rx_badhdr++;
1237                 brcmf_sdio_rxfail(bus, false, false);
1238                 rd->len = 0;
1239                 return -ENXIO;
1240         }
1241         if (rd->seq_num != rx_seq) {
1242                 brcmf_err("seq %d: sequence number error, expect %d\n",
1243                           rx_seq, rd->seq_num);
1244                 bus->sdcnt.rx_badseq++;
1245                 rd->seq_num = rx_seq;
1246         }
1247         /* no need to check the reset for subframe */
1248         if (type == BRCMF_SDIO_FT_SUB)
1249                 return 0;
1250         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1251         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1252                 /* only warm for NON glom packet */
1253                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1254                         brcmf_err("seq %d: next length error\n", rx_seq);
1255                 rd->len_nxtfrm = 0;
1256         }
1257         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1258         fc = swheader & SDPCM_FCMASK_MASK;
1259         if (bus->flowcontrol != fc) {
1260                 if (~bus->flowcontrol & fc)
1261                         bus->sdcnt.fc_xoff++;
1262                 if (bus->flowcontrol & ~fc)
1263                         bus->sdcnt.fc_xon++;
1264                 bus->sdcnt.fc_rcvd++;
1265                 bus->flowcontrol = fc;
1266         }
1267         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1268         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1269                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1270                 tx_seq_max = bus->tx_seq + 2;
1271         }
1272         bus->tx_max = tx_seq_max;
1273
1274         return 0;
1275 }
1276
1277 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1278 {
1279         *(__le16 *)header = cpu_to_le16(frm_length);
1280         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1281 }
1282
1283 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1284                               struct brcmf_sdio_hdrinfo *hd_info)
1285 {
1286         u32 hdrval;
1287         u8 hdr_offset;
1288
1289         brcmf_sdio_update_hwhdr(header, hd_info->len);
1290         hdr_offset = SDPCM_HWHDR_LEN;
1291
1292         if (bus->txglom) {
1293                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1294                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1295                 hdrval = (u16)hd_info->tail_pad << 16;
1296                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1297                 hdr_offset += SDPCM_HWEXT_LEN;
1298         }
1299
1300         hdrval = hd_info->seq_num;
1301         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1302                   SDPCM_CHANNEL_MASK;
1303         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1304                   SDPCM_DOFFSET_MASK;
1305         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1306         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1307         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1308 }
1309
1310 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1311 {
1312         u16 dlen, totlen;
1313         u8 *dptr, num = 0;
1314         u16 sublen;
1315         struct sk_buff *pfirst, *pnext;
1316
1317         int errcode;
1318         u8 doff, sfdoff;
1319
1320         struct brcmf_sdio_hdrinfo rd_new;
1321
1322         /* If packets, issue read(s) and send up packet chain */
1323         /* Return sequence numbers consumed? */
1324
1325         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1326                   bus->glomd, skb_peek(&bus->glom));
1327
1328         /* If there's a descriptor, generate the packet chain */
1329         if (bus->glomd) {
1330                 pfirst = pnext = NULL;
1331                 dlen = (u16) (bus->glomd->len);
1332                 dptr = bus->glomd->data;
1333                 if (!dlen || (dlen & 1)) {
1334                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1335                                   dlen);
1336                         dlen = 0;
1337                 }
1338
1339                 for (totlen = num = 0; dlen; num++) {
1340                         /* Get (and move past) next length */
1341                         sublen = get_unaligned_le16(dptr);
1342                         dlen -= sizeof(u16);
1343                         dptr += sizeof(u16);
1344                         if ((sublen < SDPCM_HDRLEN) ||
1345                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1346                                 brcmf_err("descriptor len %d bad: %d\n",
1347                                           num, sublen);
1348                                 pnext = NULL;
1349                                 break;
1350                         }
1351                         if (sublen % bus->sgentry_align) {
1352                                 brcmf_err("sublen %d not multiple of %d\n",
1353                                           sublen, bus->sgentry_align);
1354                         }
1355                         totlen += sublen;
1356
1357                         /* For last frame, adjust read len so total
1358                                  is a block multiple */
1359                         if (!dlen) {
1360                                 sublen +=
1361                                     (roundup(totlen, bus->blocksize) - totlen);
1362                                 totlen = roundup(totlen, bus->blocksize);
1363                         }
1364
1365                         /* Allocate/chain packet for next subframe */
1366                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1367                         if (pnext == NULL) {
1368                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1369                                           num, sublen);
1370                                 break;
1371                         }
1372                         skb_queue_tail(&bus->glom, pnext);
1373
1374                         /* Adhere to start alignment requirements */
1375                         pkt_align(pnext, sublen, bus->sgentry_align);
1376                 }
1377
1378                 /* If all allocations succeeded, save packet chain
1379                          in bus structure */
1380                 if (pnext) {
1381                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1382                                   totlen, num);
1383                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1384                             totlen != bus->cur_read.len) {
1385                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1386                                           bus->cur_read.len, totlen, rxseq);
1387                         }
1388                         pfirst = pnext = NULL;
1389                 } else {
1390                         brcmf_sdio_free_glom(bus);
1391                         num = 0;
1392                 }
1393
1394                 /* Done with descriptor packet */
1395                 brcmu_pkt_buf_free_skb(bus->glomd);
1396                 bus->glomd = NULL;
1397                 bus->cur_read.len = 0;
1398         }
1399
1400         /* Ok -- either we just generated a packet chain,
1401                  or had one from before */
1402         if (!skb_queue_empty(&bus->glom)) {
1403                 if (BRCMF_GLOM_ON()) {
1404                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1405                         skb_queue_walk(&bus->glom, pnext) {
1406                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1407                                           pnext, (u8 *) (pnext->data),
1408                                           pnext->len, pnext->len);
1409                         }
1410                 }
1411
1412                 pfirst = skb_peek(&bus->glom);
1413                 dlen = (u16) brcmf_sdio_glom_len(bus);
1414
1415                 /* Do an SDIO read for the superframe.  Configurable iovar to
1416                  * read directly into the chained packet, or allocate a large
1417                  * packet and and copy into the chain.
1418                  */
1419                 sdio_claim_host(bus->sdiodev->func[1]);
1420                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1421                                                  &bus->glom, dlen);
1422                 sdio_release_host(bus->sdiodev->func[1]);
1423                 bus->sdcnt.f2rxdata++;
1424
1425                 /* On failure, kill the superframe, allow a couple retries */
1426                 if (errcode < 0) {
1427                         brcmf_err("glom read of %d bytes failed: %d\n",
1428                                   dlen, errcode);
1429
1430                         sdio_claim_host(bus->sdiodev->func[1]);
1431                         if (bus->glomerr++ < 3) {
1432                                 brcmf_sdio_rxfail(bus, true, true);
1433                         } else {
1434                                 bus->glomerr = 0;
1435                                 brcmf_sdio_rxfail(bus, true, false);
1436                                 bus->sdcnt.rxglomfail++;
1437                                 brcmf_sdio_free_glom(bus);
1438                         }
1439                         sdio_release_host(bus->sdiodev->func[1]);
1440                         return 0;
1441                 }
1442
1443                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1444                                    pfirst->data, min_t(int, pfirst->len, 48),
1445                                    "SUPERFRAME:\n");
1446
1447                 rd_new.seq_num = rxseq;
1448                 rd_new.len = dlen;
1449                 sdio_claim_host(bus->sdiodev->func[1]);
1450                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1451                                              BRCMF_SDIO_FT_SUPER);
1452                 sdio_release_host(bus->sdiodev->func[1]);
1453                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1454
1455                 /* Remove superframe header, remember offset */
1456                 skb_pull(pfirst, rd_new.dat_offset);
1457                 sfdoff = rd_new.dat_offset;
1458                 num = 0;
1459
1460                 /* Validate all the subframe headers */
1461                 skb_queue_walk(&bus->glom, pnext) {
1462                         /* leave when invalid subframe is found */
1463                         if (errcode)
1464                                 break;
1465
1466                         rd_new.len = pnext->len;
1467                         rd_new.seq_num = rxseq++;
1468                         sdio_claim_host(bus->sdiodev->func[1]);
1469                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1470                                                      BRCMF_SDIO_FT_SUB);
1471                         sdio_release_host(bus->sdiodev->func[1]);
1472                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1473                                            pnext->data, 32, "subframe:\n");
1474
1475                         num++;
1476                 }
1477
1478                 if (errcode) {
1479                         /* Terminate frame on error, request
1480                                  a couple retries */
1481                         sdio_claim_host(bus->sdiodev->func[1]);
1482                         if (bus->glomerr++ < 3) {
1483                                 /* Restore superframe header space */
1484                                 skb_push(pfirst, sfdoff);
1485                                 brcmf_sdio_rxfail(bus, true, true);
1486                         } else {
1487                                 bus->glomerr = 0;
1488                                 brcmf_sdio_rxfail(bus, true, false);
1489                                 bus->sdcnt.rxglomfail++;
1490                                 brcmf_sdio_free_glom(bus);
1491                         }
1492                         sdio_release_host(bus->sdiodev->func[1]);
1493                         bus->cur_read.len = 0;
1494                         return 0;
1495                 }
1496
1497                 /* Basic SD framing looks ok - process each packet (header) */
1498
1499                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1500                         dptr = (u8 *) (pfirst->data);
1501                         sublen = get_unaligned_le16(dptr);
1502                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1503
1504                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1505                                            dptr, pfirst->len,
1506                                            "Rx Subframe Data:\n");
1507
1508                         __skb_trim(pfirst, sublen);
1509                         skb_pull(pfirst, doff);
1510
1511                         if (pfirst->len == 0) {
1512                                 skb_unlink(pfirst, &bus->glom);
1513                                 brcmu_pkt_buf_free_skb(pfirst);
1514                                 continue;
1515                         }
1516
1517                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1518                                            pfirst->data,
1519                                            min_t(int, pfirst->len, 32),
1520                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1521                                            bus->glom.qlen, pfirst, pfirst->data,
1522                                            pfirst->len, pfirst->next,
1523                                            pfirst->prev);
1524                         skb_unlink(pfirst, &bus->glom);
1525                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1526                         bus->sdcnt.rxglompkts++;
1527                 }
1528
1529                 bus->sdcnt.rxglomframes++;
1530         }
1531         return num;
1532 }
1533
1534 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1535                                      bool *pending)
1536 {
1537         DECLARE_WAITQUEUE(wait, current);
1538         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1539
1540         /* Wait until control frame is available */
1541         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1542         set_current_state(TASK_INTERRUPTIBLE);
1543
1544         while (!(*condition) && (!signal_pending(current) && timeout))
1545                 timeout = schedule_timeout(timeout);
1546
1547         if (signal_pending(current))
1548                 *pending = true;
1549
1550         set_current_state(TASK_RUNNING);
1551         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1552
1553         return timeout;
1554 }
1555
1556 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1557 {
1558         if (waitqueue_active(&bus->dcmd_resp_wait))
1559                 wake_up_interruptible(&bus->dcmd_resp_wait);
1560
1561         return 0;
1562 }
1563 static void
1564 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1565 {
1566         uint rdlen, pad;
1567         u8 *buf = NULL, *rbuf;
1568         int sdret;
1569
1570         brcmf_dbg(TRACE, "Enter\n");
1571
1572         if (bus->rxblen)
1573                 buf = vzalloc(bus->rxblen);
1574         if (!buf)
1575                 goto done;
1576
1577         rbuf = bus->rxbuf;
1578         pad = ((unsigned long)rbuf % bus->head_align);
1579         if (pad)
1580                 rbuf += (bus->head_align - pad);
1581
1582         /* Copy the already-read portion over */
1583         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1584         if (len <= BRCMF_FIRSTREAD)
1585                 goto gotpkt;
1586
1587         /* Raise rdlen to next SDIO block to avoid tail command */
1588         rdlen = len - BRCMF_FIRSTREAD;
1589         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1590                 pad = bus->blocksize - (rdlen % bus->blocksize);
1591                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1592                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1593                         rdlen += pad;
1594         } else if (rdlen % bus->head_align) {
1595                 rdlen += bus->head_align - (rdlen % bus->head_align);
1596         }
1597
1598         /* Drop if the read is too big or it exceeds our maximum */
1599         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1600                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1601                           rdlen, bus->sdiodev->bus_if->maxctl);
1602                 brcmf_sdio_rxfail(bus, false, false);
1603                 goto done;
1604         }
1605
1606         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1607                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1608                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1609                 bus->sdcnt.rx_toolong++;
1610                 brcmf_sdio_rxfail(bus, false, false);
1611                 goto done;
1612         }
1613
1614         /* Read remain of frame body */
1615         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1616         bus->sdcnt.f2rxdata++;
1617
1618         /* Control frame failures need retransmission */
1619         if (sdret < 0) {
1620                 brcmf_err("read %d control bytes failed: %d\n",
1621                           rdlen, sdret);
1622                 bus->sdcnt.rxc_errors++;
1623                 brcmf_sdio_rxfail(bus, true, true);
1624                 goto done;
1625         } else
1626                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1627
1628 gotpkt:
1629
1630         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1631                            buf, len, "RxCtrl:\n");
1632
1633         /* Point to valid data and indicate its length */
1634         spin_lock_bh(&bus->rxctl_lock);
1635         if (bus->rxctl) {
1636                 brcmf_err("last control frame is being processed.\n");
1637                 spin_unlock_bh(&bus->rxctl_lock);
1638                 vfree(buf);
1639                 goto done;
1640         }
1641         bus->rxctl = buf + doff;
1642         bus->rxctl_orig = buf;
1643         bus->rxlen = len - doff;
1644         spin_unlock_bh(&bus->rxctl_lock);
1645
1646 done:
1647         /* Awake any waiters */
1648         brcmf_sdio_dcmd_resp_wake(bus);
1649 }
1650
1651 /* Pad read to blocksize for efficiency */
1652 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1653 {
1654         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1655                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1656                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1657                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1658                         *rdlen += *pad;
1659         } else if (*rdlen % bus->head_align) {
1660                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1661         }
1662 }
1663
1664 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1665 {
1666         struct sk_buff *pkt;            /* Packet for event or data frames */
1667         u16 pad;                /* Number of pad bytes to read */
1668         uint rxleft = 0;        /* Remaining number of frames allowed */
1669         int ret;                /* Return code from calls */
1670         uint rxcount = 0;       /* Total frames read */
1671         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1672         u8 head_read = 0;
1673
1674         brcmf_dbg(TRACE, "Enter\n");
1675
1676         /* Not finished unless we encounter no more frames indication */
1677         bus->rxpending = true;
1678
1679         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1680              !bus->rxskip && rxleft && brcmf_bus_ready(bus->sdiodev->bus_if);
1681              rd->seq_num++, rxleft--) {
1682
1683                 /* Handle glomming separately */
1684                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1685                         u8 cnt;
1686                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1687                                   bus->glomd, skb_peek(&bus->glom));
1688                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1689                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1690                         rd->seq_num += cnt - 1;
1691                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1692                         continue;
1693                 }
1694
1695                 rd->len_left = rd->len;
1696                 /* read header first for unknow frame length */
1697                 sdio_claim_host(bus->sdiodev->func[1]);
1698                 if (!rd->len) {
1699                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1700                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1701                         bus->sdcnt.f2rxhdrs++;
1702                         if (ret < 0) {
1703                                 brcmf_err("RXHEADER FAILED: %d\n",
1704                                           ret);
1705                                 bus->sdcnt.rx_hdrfail++;
1706                                 brcmf_sdio_rxfail(bus, true, true);
1707                                 sdio_release_host(bus->sdiodev->func[1]);
1708                                 continue;
1709                         }
1710
1711                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1712                                            bus->rxhdr, SDPCM_HDRLEN,
1713                                            "RxHdr:\n");
1714
1715                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1716                                                BRCMF_SDIO_FT_NORMAL)) {
1717                                 sdio_release_host(bus->sdiodev->func[1]);
1718                                 if (!bus->rxpending)
1719                                         break;
1720                                 else
1721                                         continue;
1722                         }
1723
1724                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1725                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1726                                                         rd->len,
1727                                                         rd->dat_offset);
1728                                 /* prepare the descriptor for the next read */
1729                                 rd->len = rd->len_nxtfrm << 4;
1730                                 rd->len_nxtfrm = 0;
1731                                 /* treat all packet as event if we don't know */
1732                                 rd->channel = SDPCM_EVENT_CHANNEL;
1733                                 sdio_release_host(bus->sdiodev->func[1]);
1734                                 continue;
1735                         }
1736                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1737                                        rd->len - BRCMF_FIRSTREAD : 0;
1738                         head_read = BRCMF_FIRSTREAD;
1739                 }
1740
1741                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1742
1743                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1744                                             bus->head_align);
1745                 if (!pkt) {
1746                         /* Give up on data, request rtx of events */
1747                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1748                         brcmf_sdio_rxfail(bus, false,
1749                                             RETRYCHAN(rd->channel));
1750                         sdio_release_host(bus->sdiodev->func[1]);
1751                         continue;
1752                 }
1753                 skb_pull(pkt, head_read);
1754                 pkt_align(pkt, rd->len_left, bus->head_align);
1755
1756                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1757                 bus->sdcnt.f2rxdata++;
1758                 sdio_release_host(bus->sdiodev->func[1]);
1759
1760                 if (ret < 0) {
1761                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1762                                   rd->len, rd->channel, ret);
1763                         brcmu_pkt_buf_free_skb(pkt);
1764                         sdio_claim_host(bus->sdiodev->func[1]);
1765                         brcmf_sdio_rxfail(bus, true,
1766                                             RETRYCHAN(rd->channel));
1767                         sdio_release_host(bus->sdiodev->func[1]);
1768                         continue;
1769                 }
1770
1771                 if (head_read) {
1772                         skb_push(pkt, head_read);
1773                         memcpy(pkt->data, bus->rxhdr, head_read);
1774                         head_read = 0;
1775                 } else {
1776                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1777                         rd_new.seq_num = rd->seq_num;
1778                         sdio_claim_host(bus->sdiodev->func[1]);
1779                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1780                                                BRCMF_SDIO_FT_NORMAL)) {
1781                                 rd->len = 0;
1782                                 brcmu_pkt_buf_free_skb(pkt);
1783                         }
1784                         bus->sdcnt.rx_readahead_cnt++;
1785                         if (rd->len != roundup(rd_new.len, 16)) {
1786                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1787                                           rd->len,
1788                                           roundup(rd_new.len, 16) >> 4);
1789                                 rd->len = 0;
1790                                 brcmf_sdio_rxfail(bus, true, true);
1791                                 sdio_release_host(bus->sdiodev->func[1]);
1792                                 brcmu_pkt_buf_free_skb(pkt);
1793                                 continue;
1794                         }
1795                         sdio_release_host(bus->sdiodev->func[1]);
1796                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1797                         rd->channel = rd_new.channel;
1798                         rd->dat_offset = rd_new.dat_offset;
1799
1800                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1801                                              BRCMF_DATA_ON()) &&
1802                                            BRCMF_HDRS_ON(),
1803                                            bus->rxhdr, SDPCM_HDRLEN,
1804                                            "RxHdr:\n");
1805
1806                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1807                                 brcmf_err("readahead on control packet %d?\n",
1808                                           rd_new.seq_num);
1809                                 /* Force retry w/normal header read */
1810                                 rd->len = 0;
1811                                 sdio_claim_host(bus->sdiodev->func[1]);
1812                                 brcmf_sdio_rxfail(bus, false, true);
1813                                 sdio_release_host(bus->sdiodev->func[1]);
1814                                 brcmu_pkt_buf_free_skb(pkt);
1815                                 continue;
1816                         }
1817                 }
1818
1819                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1820                                    pkt->data, rd->len, "Rx Data:\n");
1821
1822                 /* Save superframe descriptor and allocate packet frame */
1823                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1824                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1825                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1826                                           rd->len);
1827                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1828                                                    pkt->data, rd->len,
1829                                                    "Glom Data:\n");
1830                                 __skb_trim(pkt, rd->len);
1831                                 skb_pull(pkt, SDPCM_HDRLEN);
1832                                 bus->glomd = pkt;
1833                         } else {
1834                                 brcmf_err("%s: glom superframe w/o "
1835                                           "descriptor!\n", __func__);
1836                                 sdio_claim_host(bus->sdiodev->func[1]);
1837                                 brcmf_sdio_rxfail(bus, false, false);
1838                                 sdio_release_host(bus->sdiodev->func[1]);
1839                         }
1840                         /* prepare the descriptor for the next read */
1841                         rd->len = rd->len_nxtfrm << 4;
1842                         rd->len_nxtfrm = 0;
1843                         /* treat all packet as event if we don't know */
1844                         rd->channel = SDPCM_EVENT_CHANNEL;
1845                         continue;
1846                 }
1847
1848                 /* Fill in packet len and prio, deliver upward */
1849                 __skb_trim(pkt, rd->len);
1850                 skb_pull(pkt, rd->dat_offset);
1851
1852                 /* prepare the descriptor for the next read */
1853                 rd->len = rd->len_nxtfrm << 4;
1854                 rd->len_nxtfrm = 0;
1855                 /* treat all packet as event if we don't know */
1856                 rd->channel = SDPCM_EVENT_CHANNEL;
1857
1858                 if (pkt->len == 0) {
1859                         brcmu_pkt_buf_free_skb(pkt);
1860                         continue;
1861                 }
1862
1863                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1864         }
1865
1866         rxcount = maxframes - rxleft;
1867         /* Message if we hit the limit */
1868         if (!rxleft)
1869                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1870         else
1871                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1872         /* Back off rxseq if awaiting rtx, update rx_seq */
1873         if (bus->rxskip)
1874                 rd->seq_num--;
1875         bus->rx_seq = rd->seq_num;
1876
1877         return rxcount;
1878 }
1879
1880 static void
1881 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
1882 {
1883         if (waitqueue_active(&bus->ctrl_wait))
1884                 wake_up_interruptible(&bus->ctrl_wait);
1885         return;
1886 }
1887
1888 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1889 {
1890         u16 head_pad;
1891         u8 *dat_buf;
1892
1893         dat_buf = (u8 *)(pkt->data);
1894
1895         /* Check head padding */
1896         head_pad = ((unsigned long)dat_buf % bus->head_align);
1897         if (head_pad) {
1898                 if (skb_headroom(pkt) < head_pad) {
1899                         bus->sdiodev->bus_if->tx_realloc++;
1900                         head_pad = 0;
1901                         if (skb_cow(pkt, head_pad))
1902                                 return -ENOMEM;
1903                 }
1904                 skb_push(pkt, head_pad);
1905                 dat_buf = (u8 *)(pkt->data);
1906                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1907         }
1908         return head_pad;
1909 }
1910
1911 /**
1912  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1913  * bus layer usage.
1914  */
1915 /* flag marking a dummy skb added for DMA alignment requirement */
1916 #define ALIGN_SKB_FLAG          0x8000
1917 /* bit mask of data length chopped from the previous packet */
1918 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1919
1920 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1921                                     struct sk_buff_head *pktq,
1922                                     struct sk_buff *pkt, u16 total_len)
1923 {
1924         struct brcmf_sdio_dev *sdiodev;
1925         struct sk_buff *pkt_pad;
1926         u16 tail_pad, tail_chop, chain_pad;
1927         unsigned int blksize;
1928         bool lastfrm;
1929         int ntail, ret;
1930
1931         sdiodev = bus->sdiodev;
1932         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1933         /* sg entry alignment should be a divisor of block size */
1934         WARN_ON(blksize % bus->sgentry_align);
1935
1936         /* Check tail padding */
1937         lastfrm = skb_queue_is_last(pktq, pkt);
1938         tail_pad = 0;
1939         tail_chop = pkt->len % bus->sgentry_align;
1940         if (tail_chop)
1941                 tail_pad = bus->sgentry_align - tail_chop;
1942         chain_pad = (total_len + tail_pad) % blksize;
1943         if (lastfrm && chain_pad)
1944                 tail_pad += blksize - chain_pad;
1945         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1946                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
1947                                                 bus->head_align);
1948                 if (pkt_pad == NULL)
1949                         return -ENOMEM;
1950                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1951                 if (unlikely(ret < 0))
1952                         return ret;
1953                 memcpy(pkt_pad->data,
1954                        pkt->data + pkt->len - tail_chop,
1955                        tail_chop);
1956                 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1957                 skb_trim(pkt, pkt->len - tail_chop);
1958                 skb_trim(pkt_pad, tail_pad + tail_chop);
1959                 __skb_queue_after(pktq, pkt, pkt_pad);
1960         } else {
1961                 ntail = pkt->data_len + tail_pad -
1962                         (pkt->end - pkt->tail);
1963                 if (skb_cloned(pkt) || ntail > 0)
1964                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1965                                 return -ENOMEM;
1966                 if (skb_linearize(pkt))
1967                         return -ENOMEM;
1968                 __skb_put(pkt, tail_pad);
1969         }
1970
1971         return tail_pad;
1972 }
1973
1974 /**
1975  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1976  * @bus: brcmf_sdio structure pointer
1977  * @pktq: packet list pointer
1978  * @chan: virtual channel to transmit the packet
1979  *
1980  * Processes to be applied to the packet
1981  *      - Align data buffer pointer
1982  *      - Align data buffer length
1983  *      - Prepare header
1984  * Return: negative value if there is error
1985  */
1986 static int
1987 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1988                       uint chan)
1989 {
1990         u16 head_pad, total_len;
1991         struct sk_buff *pkt_next;
1992         u8 txseq;
1993         int ret;
1994         struct brcmf_sdio_hdrinfo hd_info = {0};
1995
1996         txseq = bus->tx_seq;
1997         total_len = 0;
1998         skb_queue_walk(pktq, pkt_next) {
1999                 /* alignment packet inserted in previous
2000                  * loop cycle can be skipped as it is
2001                  * already properly aligned and does not
2002                  * need an sdpcm header.
2003                  */
2004                 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2005                         continue;
2006
2007                 /* align packet data pointer */
2008                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2009                 if (ret < 0)
2010                         return ret;
2011                 head_pad = (u16)ret;
2012                 if (head_pad)
2013                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2014
2015                 total_len += pkt_next->len;
2016
2017                 hd_info.len = pkt_next->len;
2018                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2019                 if (bus->txglom && pktq->qlen > 1) {
2020                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2021                                                        pkt_next, total_len);
2022                         if (ret < 0)
2023                                 return ret;
2024                         hd_info.tail_pad = (u16)ret;
2025                         total_len += (u16)ret;
2026                 }
2027
2028                 hd_info.channel = chan;
2029                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2030                 hd_info.seq_num = txseq++;
2031
2032                 /* Now fill the header */
2033                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2034
2035                 if (BRCMF_BYTES_ON() &&
2036                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2037                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2038                         brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2039                                            "Tx Frame:\n");
2040                 else if (BRCMF_HDRS_ON())
2041                         brcmf_dbg_hex_dump(true, pkt_next,
2042                                            head_pad + bus->tx_hdrlen,
2043                                            "Tx Header:\n");
2044         }
2045         /* Hardware length tag of the first packet should be total
2046          * length of the chain (including padding)
2047          */
2048         if (bus->txglom)
2049                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2050         return 0;
2051 }
2052
2053 /**
2054  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2055  * @bus: brcmf_sdio structure pointer
2056  * @pktq: packet list pointer
2057  *
2058  * Processes to be applied to the packet
2059  *      - Remove head padding
2060  *      - Remove tail padding
2061  */
2062 static void
2063 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2064 {
2065         u8 *hdr;
2066         u32 dat_offset;
2067         u16 tail_pad;
2068         u32 dummy_flags, chop_len;
2069         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2070
2071         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2072                 dummy_flags = *(u32 *)(pkt_next->cb);
2073                 if (dummy_flags & ALIGN_SKB_FLAG) {
2074                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2075                         if (chop_len) {
2076                                 pkt_prev = pkt_next->prev;
2077                                 skb_put(pkt_prev, chop_len);
2078                         }
2079                         __skb_unlink(pkt_next, pktq);
2080                         brcmu_pkt_buf_free_skb(pkt_next);
2081                 } else {
2082                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2083                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2084                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2085                                      SDPCM_DOFFSET_SHIFT;
2086                         skb_pull(pkt_next, dat_offset);
2087                         if (bus->txglom) {
2088                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2089                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2090                         }
2091                 }
2092         }
2093 }
2094
2095 /* Writes a HW/SW header into the packet and sends it. */
2096 /* Assumes: (a) header space already there, (b) caller holds lock */
2097 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2098                             uint chan)
2099 {
2100         int ret;
2101         int i;
2102         struct sk_buff *pkt_next, *tmp;
2103
2104         brcmf_dbg(TRACE, "Enter\n");
2105
2106         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2107         if (ret)
2108                 goto done;
2109
2110         sdio_claim_host(bus->sdiodev->func[1]);
2111         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2112         bus->sdcnt.f2txdata++;
2113
2114         if (ret < 0) {
2115                 /* On failure, abort the command and terminate the frame */
2116                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2117                           ret);
2118                 bus->sdcnt.tx_sderrs++;
2119
2120                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2121                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2122                                   SFC_WF_TERM, NULL);
2123                 bus->sdcnt.f1regdata++;
2124
2125                 for (i = 0; i < 3; i++) {
2126                         u8 hi, lo;
2127                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2128                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2129                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2130                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2131                         bus->sdcnt.f1regdata += 2;
2132                         if ((hi == 0) && (lo == 0))
2133                                 break;
2134                 }
2135         }
2136         sdio_release_host(bus->sdiodev->func[1]);
2137
2138 done:
2139         brcmf_sdio_txpkt_postp(bus, pktq);
2140         if (ret == 0)
2141                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2142         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2143                 __skb_unlink(pkt_next, pktq);
2144                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2145         }
2146         return ret;
2147 }
2148
2149 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2150 {
2151         struct sk_buff *pkt;
2152         struct sk_buff_head pktq;
2153         u32 intstatus = 0;
2154         int ret = 0, prec_out, i;
2155         uint cnt = 0;
2156         u8 tx_prec_map, pkt_num;
2157
2158         brcmf_dbg(TRACE, "Enter\n");
2159
2160         tx_prec_map = ~bus->flowcontrol;
2161
2162         /* Send frames until the limit or some other event */
2163         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2164                 pkt_num = 1;
2165                 __skb_queue_head_init(&pktq);
2166                 if (bus->txglom)
2167                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2168                                         brcmf_sdio_txglomsz);
2169                 pkt_num = min_t(u32, pkt_num,
2170                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2171                 spin_lock_bh(&bus->txqlock);
2172                 for (i = 0; i < pkt_num; i++) {
2173                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2174                                               &prec_out);
2175                         if (pkt == NULL)
2176                                 break;
2177                         __skb_queue_tail(&pktq, pkt);
2178                 }
2179                 spin_unlock_bh(&bus->txqlock);
2180                 if (i == 0)
2181                         break;
2182
2183                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2184                 cnt += i;
2185
2186                 /* In poll mode, need to check for other events */
2187                 if (!bus->intr && cnt) {
2188                         /* Check device status, signal pending interrupt */
2189                         sdio_claim_host(bus->sdiodev->func[1]);
2190                         ret = r_sdreg32(bus, &intstatus,
2191                                         offsetof(struct sdpcmd_regs,
2192                                                  intstatus));
2193                         sdio_release_host(bus->sdiodev->func[1]);
2194                         bus->sdcnt.f2txdata++;
2195                         if (ret != 0)
2196                                 break;
2197                         if (intstatus & bus->hostintmask)
2198                                 atomic_set(&bus->ipend, 1);
2199                 }
2200         }
2201
2202         /* Deflow-control stack if needed */
2203         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2204             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2205                 bus->txoff = false;
2206                 brcmf_txflowblock(bus->sdiodev->dev, false);
2207         }
2208
2209         return cnt;
2210 }
2211
2212 static void brcmf_sdio_bus_stop(struct device *dev)
2213 {
2214         u32 local_hostintmask;
2215         u8 saveclk;
2216         int err;
2217         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2218         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2219         struct brcmf_sdio *bus = sdiodev->bus;
2220
2221         brcmf_dbg(TRACE, "Enter\n");
2222
2223         if (bus->watchdog_tsk) {
2224                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2225                 kthread_stop(bus->watchdog_tsk);
2226                 bus->watchdog_tsk = NULL;
2227         }
2228
2229         if (bus_if->state == BRCMF_BUS_DOWN) {
2230                 sdio_claim_host(sdiodev->func[1]);
2231
2232                 /* Enable clock for device interrupts */
2233                 brcmf_sdio_bus_sleep(bus, false, false);
2234
2235                 /* Disable and clear interrupts at the chip level also */
2236                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2237                 local_hostintmask = bus->hostintmask;
2238                 bus->hostintmask = 0;
2239
2240                 /* Force backplane clocks to assure F2 interrupt propagates */
2241                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2242                                             &err);
2243                 if (!err)
2244                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2245                                           (saveclk | SBSDIO_FORCE_HT), &err);
2246                 if (err)
2247                         brcmf_err("Failed to force clock for F2: err %d\n",
2248                                   err);
2249
2250                 /* Turn off the bus (F2), free any pending packets */
2251                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2252                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2253
2254                 /* Clear any pending interrupts now that F2 is disabled */
2255                 w_sdreg32(bus, local_hostintmask,
2256                           offsetof(struct sdpcmd_regs, intstatus));
2257
2258                 sdio_release_host(sdiodev->func[1]);
2259         }
2260         /* Clear the data packet queues */
2261         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2262
2263         /* Clear any held glomming stuff */
2264         if (bus->glomd)
2265                 brcmu_pkt_buf_free_skb(bus->glomd);
2266         brcmf_sdio_free_glom(bus);
2267
2268         /* Clear rx control and wake any waiters */
2269         spin_lock_bh(&bus->rxctl_lock);
2270         bus->rxlen = 0;
2271         spin_unlock_bh(&bus->rxctl_lock);
2272         brcmf_sdio_dcmd_resp_wake(bus);
2273
2274         /* Reset some F2 state stuff */
2275         bus->rxskip = false;
2276         bus->tx_seq = bus->rx_seq = 0;
2277 }
2278
2279 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2280 {
2281         unsigned long flags;
2282
2283         if (bus->sdiodev->oob_irq_requested) {
2284                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2285                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2286                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2287                         bus->sdiodev->irq_en = true;
2288                 }
2289                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2290         }
2291 }
2292
2293 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2294 {
2295         u8 idx;
2296         u32 addr;
2297         unsigned long val;
2298         int n, ret;
2299
2300         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2301         addr = bus->ci->c_inf[idx].base +
2302                offsetof(struct sdpcmd_regs, intstatus);
2303
2304         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2305         bus->sdcnt.f1regdata++;
2306         if (ret != 0)
2307                 val = 0;
2308
2309         val &= bus->hostintmask;
2310         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2311
2312         /* Clear interrupts */
2313         if (val) {
2314                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2315                 bus->sdcnt.f1regdata++;
2316         }
2317
2318         if (ret) {
2319                 atomic_set(&bus->intstatus, 0);
2320         } else if (val) {
2321                 for_each_set_bit(n, &val, 32)
2322                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2323         }
2324
2325         return ret;
2326 }
2327
2328 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2329 {
2330         u32 newstatus = 0;
2331         unsigned long intstatus;
2332         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2333         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2334         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2335         int err = 0, n;
2336
2337         brcmf_dbg(TRACE, "Enter\n");
2338
2339         sdio_claim_host(bus->sdiodev->func[1]);
2340
2341         /* If waiting for HTAVAIL, check status */
2342         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2343                 u8 clkctl, devctl = 0;
2344
2345 #ifdef DEBUG
2346                 /* Check for inconsistent device control */
2347                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2348                                            SBSDIO_DEVICE_CTL, &err);
2349 #endif                          /* DEBUG */
2350
2351                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2352                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2353                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2354
2355                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2356                           devctl, clkctl);
2357
2358                 if (SBSDIO_HTAV(clkctl)) {
2359                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2360                                                    SBSDIO_DEVICE_CTL, &err);
2361                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2362                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2363                                           devctl, &err);
2364                         bus->clkstate = CLK_AVAIL;
2365                 }
2366         }
2367
2368         /* Make sure backplane clock is on */
2369         brcmf_sdio_bus_sleep(bus, false, true);
2370
2371         /* Pending interrupt indicates new device status */
2372         if (atomic_read(&bus->ipend) > 0) {
2373                 atomic_set(&bus->ipend, 0);
2374                 err = brcmf_sdio_intr_rstatus(bus);
2375         }
2376
2377         /* Start with leftover status bits */
2378         intstatus = atomic_xchg(&bus->intstatus, 0);
2379
2380         /* Handle flow-control change: read new state in case our ack
2381          * crossed another change interrupt.  If change still set, assume
2382          * FC ON for safety, let next loop through do the debounce.
2383          */
2384         if (intstatus & I_HMB_FC_CHANGE) {
2385                 intstatus &= ~I_HMB_FC_CHANGE;
2386                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2387                                 offsetof(struct sdpcmd_regs, intstatus));
2388
2389                 err = r_sdreg32(bus, &newstatus,
2390                                 offsetof(struct sdpcmd_regs, intstatus));
2391                 bus->sdcnt.f1regdata += 2;
2392                 atomic_set(&bus->fcstate,
2393                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2394                 intstatus |= (newstatus & bus->hostintmask);
2395         }
2396
2397         /* Handle host mailbox indication */
2398         if (intstatus & I_HMB_HOST_INT) {
2399                 intstatus &= ~I_HMB_HOST_INT;
2400                 intstatus |= brcmf_sdio_hostmail(bus);
2401         }
2402
2403         sdio_release_host(bus->sdiodev->func[1]);
2404
2405         /* Generally don't ask for these, can get CRC errors... */
2406         if (intstatus & I_WR_OOSYNC) {
2407                 brcmf_err("Dongle reports WR_OOSYNC\n");
2408                 intstatus &= ~I_WR_OOSYNC;
2409         }
2410
2411         if (intstatus & I_RD_OOSYNC) {
2412                 brcmf_err("Dongle reports RD_OOSYNC\n");
2413                 intstatus &= ~I_RD_OOSYNC;
2414         }
2415
2416         if (intstatus & I_SBINT) {
2417                 brcmf_err("Dongle reports SBINT\n");
2418                 intstatus &= ~I_SBINT;
2419         }
2420
2421         /* Would be active due to wake-wlan in gSPI */
2422         if (intstatus & I_CHIPACTIVE) {
2423                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2424                 intstatus &= ~I_CHIPACTIVE;
2425         }
2426
2427         /* Ignore frame indications if rxskip is set */
2428         if (bus->rxskip)
2429                 intstatus &= ~I_HMB_FRAME_IND;
2430
2431         /* On frame indication, read available frames */
2432         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2433                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2434                 if (!bus->rxpending)
2435                         intstatus &= ~I_HMB_FRAME_IND;
2436                 rxlimit -= min(framecnt, rxlimit);
2437         }
2438
2439         /* Keep still-pending events for next scheduling */
2440         if (intstatus) {
2441                 for_each_set_bit(n, &intstatus, 32)
2442                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2443         }
2444
2445         brcmf_sdio_clrintr(bus);
2446
2447         if (data_ok(bus) && bus->ctrl_frame_stat &&
2448                 (bus->clkstate == CLK_AVAIL)) {
2449                 int i;
2450
2451                 sdio_claim_host(bus->sdiodev->func[1]);
2452                 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->ctrl_frame_buf,
2453                                            (u32)bus->ctrl_frame_len);
2454
2455                 if (err < 0) {
2456                         /* On failure, abort the command and
2457                                 terminate the frame */
2458                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2459                                   err);
2460                         bus->sdcnt.tx_sderrs++;
2461
2462                         brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2463
2464                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2465                                           SFC_WF_TERM, &err);
2466                         bus->sdcnt.f1regdata++;
2467
2468                         for (i = 0; i < 3; i++) {
2469                                 u8 hi, lo;
2470                                 hi = brcmf_sdiod_regrb(bus->sdiodev,
2471                                                        SBSDIO_FUNC1_WFRAMEBCHI,
2472                                                        &err);
2473                                 lo = brcmf_sdiod_regrb(bus->sdiodev,
2474                                                        SBSDIO_FUNC1_WFRAMEBCLO,
2475                                                        &err);
2476                                 bus->sdcnt.f1regdata += 2;
2477                                 if ((hi == 0) && (lo == 0))
2478                                         break;
2479                         }
2480
2481                 } else {
2482                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2483                 }
2484                 sdio_release_host(bus->sdiodev->func[1]);
2485                 bus->ctrl_frame_stat = false;
2486                 brcmf_sdio_wait_event_wakeup(bus);
2487         }
2488         /* Send queued frames (limit 1 if rx may still be pending) */
2489         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2490                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2491                  && data_ok(bus)) {
2492                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2493                                             txlimit;
2494                 framecnt = brcmf_sdio_sendfromq(bus, framecnt);
2495                 txlimit -= framecnt;
2496         }
2497
2498         if (!brcmf_bus_ready(bus->sdiodev->bus_if) || (err != 0)) {
2499                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2500                 atomic_set(&bus->intstatus, 0);
2501         } else if (atomic_read(&bus->intstatus) ||
2502                    atomic_read(&bus->ipend) > 0 ||
2503                    (!atomic_read(&bus->fcstate) &&
2504                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2505                     data_ok(bus)) || PKT_AVAILABLE()) {
2506                 atomic_inc(&bus->dpc_tskcnt);
2507         }
2508
2509         /* If we're done for now, turn off clock request. */
2510         if ((bus->clkstate != CLK_PENDING)
2511             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2512                 bus->activity = false;
2513                 brcmf_dbg(SDIO, "idle state\n");
2514                 sdio_claim_host(bus->sdiodev->func[1]);
2515                 brcmf_sdio_bus_sleep(bus, true, false);
2516                 sdio_release_host(bus->sdiodev->func[1]);
2517         }
2518 }
2519
2520 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2521 {
2522         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2523         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2524         struct brcmf_sdio *bus = sdiodev->bus;
2525
2526         return &bus->txq;
2527 }
2528
2529 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2530 {
2531         int ret = -EBADE;
2532         uint datalen, prec;
2533         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2534         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2535         struct brcmf_sdio *bus = sdiodev->bus;
2536         ulong flags;
2537
2538         brcmf_dbg(TRACE, "Enter\n");
2539
2540         datalen = pkt->len;
2541
2542         /* Add space for the header */
2543         skb_push(pkt, bus->tx_hdrlen);
2544         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2545
2546         prec = prio2prec((pkt->priority & PRIOMASK));
2547
2548         /* Check for existing queue, current flow-control,
2549                          pending event, or pending clock */
2550         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2551         bus->sdcnt.fcqueued++;
2552
2553         /* Priority based enq */
2554         spin_lock_irqsave(&bus->txqlock, flags);
2555         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2556                 skb_pull(pkt, bus->tx_hdrlen);
2557                 brcmf_err("out of bus->txq !!!\n");
2558                 ret = -ENOSR;
2559         } else {
2560                 ret = 0;
2561         }
2562
2563         if (pktq_len(&bus->txq) >= TXHI) {
2564                 bus->txoff = true;
2565                 brcmf_txflowblock(bus->sdiodev->dev, true);
2566         }
2567         spin_unlock_irqrestore(&bus->txqlock, flags);
2568
2569 #ifdef DEBUG
2570         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2571                 qcount[prec] = pktq_plen(&bus->txq, prec);
2572 #endif
2573
2574         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2575                 atomic_inc(&bus->dpc_tskcnt);
2576                 queue_work(bus->brcmf_wq, &bus->datawork);
2577         }
2578
2579         return ret;
2580 }
2581
2582 #ifdef DEBUG
2583 #define CONSOLE_LINE_MAX        192
2584
2585 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2586 {
2587         struct brcmf_console *c = &bus->console;
2588         u8 line[CONSOLE_LINE_MAX], ch;
2589         u32 n, idx, addr;
2590         int rv;
2591
2592         /* Don't do anything until FWREADY updates console address */
2593         if (bus->console_addr == 0)
2594                 return 0;
2595
2596         /* Read console log struct */
2597         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2598         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2599                                sizeof(c->log_le));
2600         if (rv < 0)
2601                 return rv;
2602
2603         /* Allocate console buffer (one time only) */
2604         if (c->buf == NULL) {
2605                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2606                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2607                 if (c->buf == NULL)
2608                         return -ENOMEM;
2609         }
2610
2611         idx = le32_to_cpu(c->log_le.idx);
2612
2613         /* Protect against corrupt value */
2614         if (idx > c->bufsize)
2615                 return -EBADE;
2616
2617         /* Skip reading the console buffer if the index pointer
2618          has not moved */
2619         if (idx == c->last)
2620                 return 0;
2621
2622         /* Read the console buffer */
2623         addr = le32_to_cpu(c->log_le.buf);
2624         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2625         if (rv < 0)
2626                 return rv;
2627
2628         while (c->last != idx) {
2629                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2630                         if (c->last == idx) {
2631                                 /* This would output a partial line.
2632                                  * Instead, back up
2633                                  * the buffer pointer and output this
2634                                  * line next time around.
2635                                  */
2636                                 if (c->last >= n)
2637                                         c->last -= n;
2638                                 else
2639                                         c->last = c->bufsize - n;
2640                                 goto break2;
2641                         }
2642                         ch = c->buf[c->last];
2643                         c->last = (c->last + 1) % c->bufsize;
2644                         if (ch == '\n')
2645                                 break;
2646                         line[n] = ch;
2647                 }
2648
2649                 if (n > 0) {
2650                         if (line[n - 1] == '\r')
2651                                 n--;
2652                         line[n] = 0;
2653                         pr_debug("CONSOLE: %s\n", line);
2654                 }
2655         }
2656 break2:
2657
2658         return 0;
2659 }
2660 #endif                          /* DEBUG */
2661
2662 static int brcmf_sdio_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2663 {
2664         int i;
2665         int ret;
2666
2667         bus->ctrl_frame_stat = false;
2668         ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2669
2670         if (ret < 0) {
2671                 /* On failure, abort the command and terminate the frame */
2672                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2673                           ret);
2674                 bus->sdcnt.tx_sderrs++;
2675
2676                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2677
2678                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2679                                   SFC_WF_TERM, NULL);
2680                 bus->sdcnt.f1regdata++;
2681
2682                 for (i = 0; i < 3; i++) {
2683                         u8 hi, lo;
2684                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2685                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2686                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2687                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2688                         bus->sdcnt.f1regdata += 2;
2689                         if (hi == 0 && lo == 0)
2690                                 break;
2691                 }
2692                 return ret;
2693         }
2694
2695         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2696
2697         return ret;
2698 }
2699
2700 static int
2701 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2702 {
2703         u8 *frame;
2704         u16 len, pad;
2705         uint retries = 0;
2706         u8 doff = 0;
2707         int ret = -1;
2708         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2709         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2710         struct brcmf_sdio *bus = sdiodev->bus;
2711         struct brcmf_sdio_hdrinfo hd_info = {0};
2712
2713         brcmf_dbg(TRACE, "Enter\n");
2714
2715         /* Back the pointer to make a room for bus header */
2716         frame = msg - bus->tx_hdrlen;
2717         len = (msglen += bus->tx_hdrlen);
2718
2719         /* Add alignment padding (optional for ctl frames) */
2720         doff = ((unsigned long)frame % bus->head_align);
2721         if (doff) {
2722                 frame -= doff;
2723                 len += doff;
2724                 msglen += doff;
2725                 memset(frame, 0, doff + bus->tx_hdrlen);
2726         }
2727         /* precondition: doff < bus->head_align */
2728         doff += bus->tx_hdrlen;
2729
2730         /* Round send length to next SDIO block */
2731         pad = 0;
2732         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2733                 pad = bus->blocksize - (len % bus->blocksize);
2734                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2735                         pad = 0;
2736         } else if (len % bus->head_align) {
2737                 pad = bus->head_align - (len % bus->head_align);
2738         }
2739         len += pad;
2740
2741         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2742
2743         /* Make sure backplane clock is on */
2744         sdio_claim_host(bus->sdiodev->func[1]);
2745         brcmf_sdio_bus_sleep(bus, false, false);
2746         sdio_release_host(bus->sdiodev->func[1]);
2747
2748         hd_info.len = (u16)msglen;
2749         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2750         hd_info.dat_offset = doff;
2751         hd_info.seq_num = bus->tx_seq;
2752         hd_info.lastfrm = true;
2753         hd_info.tail_pad = pad;
2754         brcmf_sdio_hdpack(bus, frame, &hd_info);
2755
2756         if (bus->txglom)
2757                 brcmf_sdio_update_hwhdr(frame, len);
2758
2759         if (!data_ok(bus)) {
2760                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2761                           bus->tx_max, bus->tx_seq);
2762                 bus->ctrl_frame_stat = true;
2763                 /* Send from dpc */
2764                 bus->ctrl_frame_buf = frame;
2765                 bus->ctrl_frame_len = len;
2766
2767                 wait_event_interruptible_timeout(bus->ctrl_wait,
2768                                                  !bus->ctrl_frame_stat,
2769                                                  msecs_to_jiffies(2000));
2770
2771                 if (!bus->ctrl_frame_stat) {
2772                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2773                         ret = 0;
2774                 } else {
2775                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2776                         ret = -1;
2777                 }
2778         }
2779
2780         if (ret == -1) {
2781                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2782                                    frame, len, "Tx Frame:\n");
2783                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2784                                    BRCMF_HDRS_ON(),
2785                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2786
2787                 do {
2788                         sdio_claim_host(bus->sdiodev->func[1]);
2789                         ret = brcmf_sdio_tx_frame(bus, frame, len);
2790                         sdio_release_host(bus->sdiodev->func[1]);
2791                 } while (ret < 0 && retries++ < TXRETRIES);
2792         }
2793
2794         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2795             atomic_read(&bus->dpc_tskcnt) == 0) {
2796                 bus->activity = false;
2797                 sdio_claim_host(bus->sdiodev->func[1]);
2798                 brcmf_dbg(INFO, "idle\n");
2799                 brcmf_sdio_clkctl(bus, CLK_NONE, true);
2800                 sdio_release_host(bus->sdiodev->func[1]);
2801         }
2802
2803         if (ret)
2804                 bus->sdcnt.tx_ctlerrs++;
2805         else
2806                 bus->sdcnt.tx_ctlpkts++;
2807
2808         return ret ? -EIO : 0;
2809 }
2810
2811 #ifdef DEBUG
2812 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2813 {
2814         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2815 }
2816
2817 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2818                                  struct sdpcm_shared *sh)
2819 {
2820         u32 addr;
2821         int rv;
2822         u32 shaddr = 0;
2823         struct sdpcm_shared_le sh_le;
2824         __le32 addr_le;
2825
2826         shaddr = bus->ci->rambase + bus->ramsize - 4;
2827
2828         /*
2829          * Read last word in socram to determine
2830          * address of sdpcm_shared structure
2831          */
2832         sdio_claim_host(bus->sdiodev->func[1]);
2833         brcmf_sdio_bus_sleep(bus, false, false);
2834         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2835         sdio_release_host(bus->sdiodev->func[1]);
2836         if (rv < 0)
2837                 return rv;
2838
2839         addr = le32_to_cpu(addr_le);
2840
2841         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2842
2843         /*
2844          * Check if addr is valid.
2845          * NVRAM length at the end of memory should have been overwritten.
2846          */
2847         if (!brcmf_sdio_valid_shared_address(addr)) {
2848                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2849                                   addr);
2850                         return -EINVAL;
2851         }
2852
2853         /* Read hndrte_shared structure */
2854         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2855                                sizeof(struct sdpcm_shared_le));
2856         if (rv < 0)
2857                 return rv;
2858
2859         /* Endianness */
2860         sh->flags = le32_to_cpu(sh_le.flags);
2861         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2862         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2863         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2864         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2865         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2866         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2867
2868         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2869                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2870                           SDPCM_SHARED_VERSION,
2871                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2872                 return -EPROTO;
2873         }
2874
2875         return 0;
2876 }
2877
2878 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2879                                    struct sdpcm_shared *sh, char __user *data,
2880                                    size_t count)
2881 {
2882         u32 addr, console_ptr, console_size, console_index;
2883         char *conbuf = NULL;
2884         __le32 sh_val;
2885         int rv;
2886         loff_t pos = 0;
2887         int nbytes = 0;
2888
2889         /* obtain console information from device memory */
2890         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2891         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2892                                (u8 *)&sh_val, sizeof(u32));
2893         if (rv < 0)
2894                 return rv;
2895         console_ptr = le32_to_cpu(sh_val);
2896
2897         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2898         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2899                                (u8 *)&sh_val, sizeof(u32));
2900         if (rv < 0)
2901                 return rv;
2902         console_size = le32_to_cpu(sh_val);
2903
2904         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2905         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2906                                (u8 *)&sh_val, sizeof(u32));
2907         if (rv < 0)
2908                 return rv;
2909         console_index = le32_to_cpu(sh_val);
2910
2911         /* allocate buffer for console data */
2912         if (console_size <= CONSOLE_BUFFER_MAX)
2913                 conbuf = vzalloc(console_size+1);
2914
2915         if (!conbuf)
2916                 return -ENOMEM;
2917
2918         /* obtain the console data from device */
2919         conbuf[console_size] = '\0';
2920         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2921                                console_size);
2922         if (rv < 0)
2923                 goto done;
2924
2925         rv = simple_read_from_buffer(data, count, &pos,
2926                                      conbuf + console_index,
2927                                      console_size - console_index);
2928         if (rv < 0)
2929                 goto done;
2930
2931         nbytes = rv;
2932         if (console_index > 0) {
2933                 pos = 0;
2934                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2935                                              conbuf, console_index - 1);
2936                 if (rv < 0)
2937                         goto done;
2938                 rv += nbytes;
2939         }
2940 done:
2941         vfree(conbuf);
2942         return rv;
2943 }
2944
2945 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2946                                 char __user *data, size_t count)
2947 {
2948         int error, res;
2949         char buf[350];
2950         struct brcmf_trap_info tr;
2951         loff_t pos = 0;
2952
2953         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2954                 brcmf_dbg(INFO, "no trap in firmware\n");
2955                 return 0;
2956         }
2957
2958         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2959                                   sizeof(struct brcmf_trap_info));
2960         if (error < 0)
2961                 return error;
2962
2963         res = scnprintf(buf, sizeof(buf),
2964                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
2965                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2966                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2967                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2968                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2969                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2970                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2971                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2972                         le32_to_cpu(tr.pc), sh->trap_addr,
2973                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2974                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2975                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2976                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2977
2978         return simple_read_from_buffer(data, count, &pos, buf, res);
2979 }
2980
2981 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2982                                   struct sdpcm_shared *sh, char __user *data,
2983                                   size_t count)
2984 {
2985         int error = 0;
2986         char buf[200];
2987         char file[80] = "?";
2988         char expr[80] = "<???>";
2989         int res;
2990         loff_t pos = 0;
2991
2992         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2993                 brcmf_dbg(INFO, "firmware not built with -assert\n");
2994                 return 0;
2995         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2996                 brcmf_dbg(INFO, "no assert in dongle\n");
2997                 return 0;
2998         }
2999
3000         sdio_claim_host(bus->sdiodev->func[1]);
3001         if (sh->assert_file_addr != 0) {
3002                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3003                                           sh->assert_file_addr, (u8 *)file, 80);
3004                 if (error < 0)
3005                         return error;
3006         }
3007         if (sh->assert_exp_addr != 0) {
3008                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3009                                           sh->assert_exp_addr, (u8 *)expr, 80);
3010                 if (error < 0)
3011                         return error;
3012         }
3013         sdio_release_host(bus->sdiodev->func[1]);
3014
3015         res = scnprintf(buf, sizeof(buf),
3016                         "dongle assert: %s:%d: assert(%s)\n",
3017                         file, sh->assert_line, expr);
3018         return simple_read_from_buffer(data, count, &pos, buf, res);
3019 }
3020
3021 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3022 {
3023         int error;
3024         struct sdpcm_shared sh;
3025
3026         error = brcmf_sdio_readshared(bus, &sh);
3027
3028         if (error < 0)
3029                 return error;
3030
3031         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3032                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3033         else if (sh.flags & SDPCM_SHARED_ASSERT)
3034                 brcmf_err("assertion in dongle\n");
3035
3036         if (sh.flags & SDPCM_SHARED_TRAP)
3037                 brcmf_err("firmware trap in dongle\n");
3038
3039         return 0;
3040 }
3041
3042 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3043                                 size_t count, loff_t *ppos)
3044 {
3045         int error = 0;
3046         struct sdpcm_shared sh;
3047         int nbytes = 0;
3048         loff_t pos = *ppos;
3049
3050         if (pos != 0)
3051                 return 0;
3052
3053         error = brcmf_sdio_readshared(bus, &sh);
3054         if (error < 0)
3055                 goto done;
3056
3057         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3058         if (error < 0)
3059                 goto done;
3060         nbytes = error;
3061
3062         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3063         if (error < 0)
3064                 goto done;
3065         nbytes += error;
3066
3067         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3068         if (error < 0)
3069                 goto done;
3070         nbytes += error;
3071
3072         error = nbytes;
3073         *ppos += nbytes;
3074 done:
3075         return error;
3076 }
3077
3078 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3079                                         size_t count, loff_t *ppos)
3080 {
3081         struct brcmf_sdio *bus = f->private_data;
3082         int res;
3083
3084         res = brcmf_sdio_died_dump(bus, data, count, ppos);
3085         if (res > 0)
3086                 *ppos += res;
3087         return (ssize_t)res;
3088 }
3089
3090 static const struct file_operations brcmf_sdio_forensic_ops = {
3091         .owner = THIS_MODULE,
3092         .open = simple_open,
3093         .read = brcmf_sdio_forensic_read
3094 };
3095
3096 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3097 {
3098         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3099         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3100
3101         if (IS_ERR_OR_NULL(dentry))
3102                 return;
3103
3104         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3105                             &brcmf_sdio_forensic_ops);
3106         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3107 }
3108 #else
3109 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3110 {
3111         return 0;
3112 }
3113
3114 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3115 {
3116 }
3117 #endif /* DEBUG */
3118
3119 static int
3120 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3121 {
3122         int timeleft;
3123         uint rxlen = 0;
3124         bool pending;
3125         u8 *buf;
3126         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3127         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3128         struct brcmf_sdio *bus = sdiodev->bus;
3129
3130         brcmf_dbg(TRACE, "Enter\n");
3131
3132         /* Wait until control frame is available */
3133         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3134
3135         spin_lock_bh(&bus->rxctl_lock);
3136         rxlen = bus->rxlen;
3137         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3138         bus->rxctl = NULL;
3139         buf = bus->rxctl_orig;
3140         bus->rxctl_orig = NULL;
3141         bus->rxlen = 0;
3142         spin_unlock_bh(&bus->rxctl_lock);
3143         vfree(buf);
3144
3145         if (rxlen) {
3146                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3147                           rxlen, msglen);
3148         } else if (timeleft == 0) {
3149                 brcmf_err("resumed on timeout\n");
3150                 brcmf_sdio_checkdied(bus);
3151         } else if (pending) {
3152                 brcmf_dbg(CTL, "cancelled\n");
3153                 return -ERESTARTSYS;
3154         } else {
3155                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3156                 brcmf_sdio_checkdied(bus);
3157         }
3158
3159         if (rxlen)
3160                 bus->sdcnt.rx_ctlpkts++;
3161         else
3162                 bus->sdcnt.rx_ctlerrs++;
3163
3164         return rxlen ? (int)rxlen : -ETIMEDOUT;
3165 }
3166
3167 #ifdef DEBUG
3168 static bool
3169 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3170                         u8 *ram_data, uint ram_sz)
3171 {
3172         char *ram_cmp;
3173         int err;
3174         bool ret = true;
3175         int address;
3176         int offset;
3177         int len;
3178
3179         /* read back and verify */
3180         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3181                   ram_sz);
3182         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3183         /* do not proceed while no memory but  */
3184         if (!ram_cmp)
3185                 return true;
3186
3187         address = ram_addr;
3188         offset = 0;
3189         while (offset < ram_sz) {
3190                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3191                       ram_sz - offset;
3192                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3193                 if (err) {
3194                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3195                                   err, len, address);
3196                         ret = false;
3197                         break;
3198                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3199                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3200                                   offset, len);
3201                         ret = false;
3202                         break;
3203                 }
3204                 offset += len;
3205                 address += len;
3206         }
3207
3208         kfree(ram_cmp);
3209
3210         return ret;
3211 }
3212 #else   /* DEBUG */
3213 static bool
3214 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3215                         u8 *ram_data, uint ram_sz)
3216 {
3217         return true;
3218 }
3219 #endif  /* DEBUG */
3220
3221 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3222                                          const struct firmware *fw)
3223 {
3224         int err;
3225         int offset;
3226         int address;
3227         int len;
3228
3229         brcmf_dbg(TRACE, "Enter\n");
3230
3231         err = 0;
3232         offset = 0;
3233         address = bus->ci->rambase;
3234         while (offset < fw->size) {
3235                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3236                       fw->size - offset;
3237                 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3238                                         (u8 *)&fw->data[offset], len);
3239                 if (err) {
3240                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3241                                   err, len, address);
3242                         return err;
3243                 }
3244                 offset += len;
3245                 address += len;
3246         }
3247         if (!err)
3248                 if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3249                                              (u8 *)fw->data, fw->size))
3250                         err = -EIO;
3251
3252         return err;
3253 }
3254
3255 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3256                                      const struct firmware *nv)
3257 {
3258         void *vars;
3259         u32 varsz;
3260         int address;
3261         int err;
3262
3263         brcmf_dbg(TRACE, "Enter\n");
3264
3265         vars = brcmf_nvram_strip(nv, &varsz);
3266
3267         if (vars == NULL)
3268                 return -EINVAL;
3269
3270         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3271         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3272         if (err)
3273                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3274                           err, varsz, address);
3275         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3276                 err = -EIO;
3277
3278         brcmf_nvram_free(vars);
3279
3280         return err;
3281 }
3282
3283 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3284 {
3285         int bcmerror = -EFAULT;
3286         const struct firmware *fw;
3287         u32 rstvec;
3288
3289         sdio_claim_host(bus->sdiodev->func[1]);
3290         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3291
3292         /* Keep arm in reset */
3293         brcmf_sdio_chip_enter_download(bus->sdiodev, bus->ci);
3294
3295         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3296         if (fw == NULL) {
3297                 bcmerror = -ENOENT;
3298                 goto err;
3299         }
3300
3301         rstvec = get_unaligned_le32(fw->data);
3302         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3303
3304         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3305         release_firmware(fw);
3306         if (bcmerror) {
3307                 brcmf_err("dongle image file download failed\n");
3308                 goto err;
3309         }
3310
3311         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3312         if (fw == NULL) {
3313                 bcmerror = -ENOENT;
3314                 goto err;
3315         }
3316
3317         bcmerror = brcmf_sdio_download_nvram(bus, fw);
3318         release_firmware(fw);
3319         if (bcmerror) {
3320                 brcmf_err("dongle nvram file download failed\n");
3321                 goto err;
3322         }
3323
3324         /* Take arm out of reset */
3325         if (!brcmf_sdio_chip_exit_download(bus->sdiodev, bus->ci, rstvec)) {
3326                 brcmf_err("error getting out of ARM core reset\n");
3327                 goto err;
3328         }
3329
3330         /* Allow HT Clock now that the ARM is running. */
3331         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_LOAD);
3332         bcmerror = 0;
3333
3334 err:
3335         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3336         sdio_release_host(bus->sdiodev->func[1]);
3337         return bcmerror;
3338 }
3339
3340 static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus)
3341 {
3342         u32 addr, reg, pmu_cc3_mask = ~0;
3343         int err;
3344
3345         brcmf_dbg(TRACE, "Enter\n");
3346
3347         /* old chips with PMU version less than 17 don't support save restore */
3348         if (bus->ci->pmurev < 17)
3349                 return false;
3350
3351         switch (bus->ci->chip) {
3352         case BCM43241_CHIP_ID:
3353         case BCM4335_CHIP_ID:
3354         case BCM4339_CHIP_ID:
3355                 /* read PMU chipcontrol register 3 */
3356                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3357                 brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3358                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3359                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3360                 return (reg & pmu_cc3_mask) != 0;
3361         default:
3362                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, pmucapabilities_ext);
3363                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, &err);
3364                 if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0)
3365                         return false;
3366
3367                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, retention_ctl);
3368                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3369                 return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
3370                                PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
3371         }
3372 }
3373
3374 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3375 {
3376         int err = 0;
3377         u8 val;
3378
3379         brcmf_dbg(TRACE, "Enter\n");
3380
3381         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3382         if (err) {
3383                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3384                 return;
3385         }
3386
3387         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3388         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3389         if (err) {
3390                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3391                 return;
3392         }
3393
3394         /* Add CMD14 Support */
3395         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3396                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3397                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3398                           &err);
3399         if (err) {
3400                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3401                 return;
3402         }
3403
3404         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3405                           SBSDIO_FORCE_HT, &err);
3406         if (err) {
3407                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3408                 return;
3409         }
3410
3411         /* set flag */
3412         bus->sr_enabled = true;
3413         brcmf_dbg(INFO, "SR enabled\n");
3414 }
3415
3416 /* enable KSO bit */
3417 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3418 {
3419         u8 val;
3420         int err = 0;
3421
3422         brcmf_dbg(TRACE, "Enter\n");
3423
3424         /* KSO bit added in SDIO core rev 12 */
3425         if (bus->ci->c_inf[1].rev < 12)
3426                 return 0;
3427
3428         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3429         if (err) {
3430                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3431                 return err;
3432         }
3433
3434         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3435                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3436                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3437                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3438                                   val, &err);
3439                 if (err) {
3440                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3441                         return err;
3442                 }
3443         }
3444
3445         return 0;
3446 }
3447
3448
3449 static int brcmf_sdio_bus_preinit(struct device *dev)
3450 {
3451         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3452         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3453         struct brcmf_sdio *bus = sdiodev->bus;
3454         uint pad_size;
3455         u32 value;
3456         u8 idx;
3457         int err;
3458
3459         /* the commands below use the terms tx and rx from
3460          * a device perspective, ie. bus:txglom affects the
3461          * bus transfers from device to host.
3462          */
3463         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3464         if (bus->ci->c_inf[idx].rev < 12) {
3465                 /* for sdio core rev < 12, disable txgloming */
3466                 value = 0;
3467                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3468                                            sizeof(u32));
3469         } else {
3470                 /* otherwise, set txglomalign */
3471                 value = 4;
3472                 if (sdiodev->pdata)
3473                         value = sdiodev->pdata->sd_sgentry_align;
3474                 /* SDIO ADMA requires at least 32 bit alignment */
3475                 value = max_t(u32, value, 4);
3476                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3477                                            sizeof(u32));
3478         }
3479
3480         if (err < 0)
3481                 goto done;
3482
3483         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3484         if (sdiodev->sg_support) {
3485                 bus->txglom = false;
3486                 value = 1;
3487                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3488                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3489                                            &value, sizeof(u32));
3490                 if (err < 0) {
3491                         /* bus:rxglom is allowed to fail */
3492                         err = 0;
3493                 } else {
3494                         bus->txglom = true;
3495                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3496                 }
3497         }
3498         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3499
3500 done:
3501         return err;
3502 }
3503
3504 static int brcmf_sdio_bus_init(struct device *dev)
3505 {
3506         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3507         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3508         struct brcmf_sdio *bus = sdiodev->bus;
3509         int err, ret = 0;
3510         u8 saveclk;
3511
3512         brcmf_dbg(TRACE, "Enter\n");
3513
3514         /* try to download image and nvram to the dongle */
3515         if (bus_if->state == BRCMF_BUS_DOWN) {
3516                 bus->alp_only = true;
3517                 err = brcmf_sdio_download_firmware(bus);
3518                 if (err)
3519                         return err;
3520                 bus->alp_only = false;
3521         }
3522
3523         if (!bus->sdiodev->bus_if->drvr)
3524                 return 0;
3525
3526         /* Start the watchdog timer */
3527         bus->sdcnt.tickcnt = 0;
3528         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3529
3530         sdio_claim_host(bus->sdiodev->func[1]);
3531
3532         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3533         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3534         if (bus->clkstate != CLK_AVAIL)
3535                 goto exit;
3536
3537         /* Force clocks on backplane to be sure F2 interrupt propagates */
3538         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3539                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3540         if (!err) {
3541                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3542                                   (saveclk | SBSDIO_FORCE_HT), &err);
3543         }
3544         if (err) {
3545                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3546                 goto exit;
3547         }
3548
3549         /* Enable function 2 (frame transfers) */
3550         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3551                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3552         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3553
3554
3555         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3556
3557         /* If F2 successfully enabled, set core and enable interrupts */
3558         if (!err) {
3559                 /* Set up the interrupt mask and enable interrupts */
3560                 bus->hostintmask = HOSTINTMASK;
3561                 w_sdreg32(bus, bus->hostintmask,
3562                           offsetof(struct sdpcmd_regs, hostintmask));
3563
3564                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3565         } else {
3566                 /* Disable F2 again */
3567                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3568                 ret = -ENODEV;
3569         }
3570
3571         if (brcmf_sdio_sr_capable(bus)) {
3572                 brcmf_sdio_sr_init(bus);
3573         } else {
3574                 /* Restore previous clock setting */
3575                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3576                                   saveclk, &err);
3577         }
3578
3579         if (ret == 0) {
3580                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3581                 if (ret != 0)
3582                         brcmf_err("intr register failed:%d\n", ret);
3583         }
3584
3585         /* If we didn't come up, turn off backplane clock */
3586         if (ret != 0)
3587                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3588
3589 exit:
3590         sdio_release_host(bus->sdiodev->func[1]);
3591
3592         return ret;
3593 }
3594
3595 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3596 {
3597         brcmf_dbg(TRACE, "Enter\n");
3598
3599         if (!bus) {
3600                 brcmf_err("bus is null pointer, exiting\n");
3601                 return;
3602         }
3603
3604         if (!brcmf_bus_ready(bus->sdiodev->bus_if)) {
3605                 brcmf_err("bus is down. we have nothing to do\n");
3606                 return;
3607         }
3608         /* Count the interrupt call */
3609         bus->sdcnt.intrcount++;
3610         if (in_interrupt())
3611                 atomic_set(&bus->ipend, 1);
3612         else
3613                 if (brcmf_sdio_intr_rstatus(bus)) {
3614                         brcmf_err("failed backplane access\n");
3615                 }
3616
3617         /* Disable additional interrupts (is this needed now)? */
3618         if (!bus->intr)
3619                 brcmf_err("isr w/o interrupt configured!\n");
3620
3621         atomic_inc(&bus->dpc_tskcnt);
3622         queue_work(bus->brcmf_wq, &bus->datawork);
3623 }
3624
3625 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3626 {
3627 #ifdef DEBUG
3628         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3629 #endif  /* DEBUG */
3630
3631         brcmf_dbg(TIMER, "Enter\n");
3632
3633         /* Poll period: check device if appropriate. */
3634         if (!bus->sr_enabled &&
3635             bus->poll && (++bus->polltick >= bus->pollrate)) {
3636                 u32 intstatus = 0;
3637
3638                 /* Reset poll tick */
3639                 bus->polltick = 0;
3640
3641                 /* Check device if no interrupts */
3642                 if (!bus->intr ||
3643                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3644
3645                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3646                                 u8 devpend;
3647
3648                                 sdio_claim_host(bus->sdiodev->func[1]);
3649                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3650                                                             SDIO_CCCR_INTx,
3651                                                             NULL);
3652                                 sdio_release_host(bus->sdiodev->func[1]);
3653                                 intstatus =
3654                                     devpend & (INTR_STATUS_FUNC1 |
3655                                                INTR_STATUS_FUNC2);
3656                         }
3657
3658                         /* If there is something, make like the ISR and
3659                                  schedule the DPC */
3660                         if (intstatus) {
3661                                 bus->sdcnt.pollcnt++;
3662                                 atomic_set(&bus->ipend, 1);
3663
3664                                 atomic_inc(&bus->dpc_tskcnt);
3665                                 queue_work(bus->brcmf_wq, &bus->datawork);
3666                         }
3667                 }
3668
3669                 /* Update interrupt tracking */
3670                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3671         }
3672 #ifdef DEBUG
3673         /* Poll for console output periodically */
3674         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3675             bus->console_interval != 0) {
3676                 bus->console.count += BRCMF_WD_POLL_MS;
3677                 if (bus->console.count >= bus->console_interval) {
3678                         bus->console.count -= bus->console_interval;
3679                         sdio_claim_host(bus->sdiodev->func[1]);
3680                         /* Make sure backplane clock is on */
3681                         brcmf_sdio_bus_sleep(bus, false, false);
3682                         if (brcmf_sdio_readconsole(bus) < 0)
3683                                 /* stop on error */
3684                                 bus->console_interval = 0;
3685                         sdio_release_host(bus->sdiodev->func[1]);
3686                 }
3687         }
3688 #endif                          /* DEBUG */
3689
3690         /* On idle timeout clear activity flag and/or turn off clock */
3691         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3692                 if (++bus->idlecount >= bus->idletime) {
3693                         bus->idlecount = 0;
3694                         if (bus->activity) {
3695                                 bus->activity = false;
3696                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3697                         } else {
3698                                 brcmf_dbg(SDIO, "idle\n");
3699                                 sdio_claim_host(bus->sdiodev->func[1]);
3700                                 brcmf_sdio_bus_sleep(bus, true, false);
3701                                 sdio_release_host(bus->sdiodev->func[1]);
3702                         }
3703                 }
3704         }
3705
3706         return (atomic_read(&bus->ipend) > 0);
3707 }
3708
3709 static void brcmf_sdio_dataworker(struct work_struct *work)
3710 {
3711         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3712                                               datawork);
3713
3714         while (atomic_read(&bus->dpc_tskcnt)) {
3715                 brcmf_sdio_dpc(bus);
3716                 atomic_dec(&bus->dpc_tskcnt);
3717         }
3718 }
3719
3720 static bool
3721 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3722 {
3723         u8 clkctl = 0;
3724         int err = 0;
3725         int reg_addr;
3726         u32 reg_val;
3727         u32 drivestrength;
3728
3729         sdio_claim_host(bus->sdiodev->func[1]);
3730
3731         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3732                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3733
3734         /*
3735          * Force PLL off until brcmf_sdio_chip_attach()
3736          * programs PLL control regs
3737          */
3738
3739         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3740                           BRCMF_INIT_CLKCTL1, &err);
3741         if (!err)
3742                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3743                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3744
3745         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3746                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3747                           err, BRCMF_INIT_CLKCTL1, clkctl);
3748                 goto fail;
3749         }
3750
3751         /* SDIO register access works so moving
3752          * state from UNKNOWN to DOWN.
3753          */
3754         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_DOWN);
3755
3756         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3757                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3758                 goto fail;
3759         }
3760
3761         if (brcmf_sdio_kso_init(bus)) {
3762                 brcmf_err("error enabling KSO\n");
3763                 goto fail;
3764         }
3765
3766         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3767                 drivestrength = bus->sdiodev->pdata->drive_strength;
3768         else
3769                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3770         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3771
3772         /* Get info on the SOCRAM cores... */
3773         bus->ramsize = bus->ci->ramsize;
3774         if (!(bus->ramsize)) {
3775                 brcmf_err("failed to find SOCRAM memory!\n");
3776                 goto fail;
3777         }
3778
3779         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3780         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3781                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3782         if (err)
3783                 goto fail;
3784
3785         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3786
3787         brcmf_sdiod_regwb(bus->sdiodev,
3788                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3789         if (err)
3790                 goto fail;
3791
3792         /* set PMUControl so a backplane reset does PMU state reload */
3793         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3794                                pmucontrol);
3795         reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3796                                     reg_addr,
3797                                     &err);
3798         if (err)
3799                 goto fail;
3800
3801         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3802
3803         brcmf_sdiod_regwl(bus->sdiodev,
3804                           reg_addr,
3805                           reg_val,
3806                           &err);
3807         if (err)
3808                 goto fail;
3809
3810
3811         sdio_release_host(bus->sdiodev->func[1]);
3812
3813         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3814
3815         /* allocate header buffer */
3816         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3817         if (!bus->hdrbuf)
3818                 return false;
3819         /* Locate an appropriately-aligned portion of hdrbuf */
3820         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3821                                     bus->head_align);
3822
3823         /* Set the poll and/or interrupt flags */
3824         bus->intr = true;
3825         bus->poll = false;
3826         if (bus->poll)
3827                 bus->pollrate = 1;
3828
3829         return true;
3830
3831 fail:
3832         sdio_release_host(bus->sdiodev->func[1]);
3833         return false;
3834 }
3835
3836 static int
3837 brcmf_sdio_watchdog_thread(void *data)
3838 {
3839         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3840
3841         allow_signal(SIGTERM);
3842         /* Run until signal received */
3843         while (1) {
3844                 if (kthread_should_stop())
3845                         break;
3846                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3847                         brcmf_sdio_bus_watchdog(bus);
3848                         /* Count the tick for reference */
3849                         bus->sdcnt.tickcnt++;
3850                 } else
3851                         break;
3852         }
3853         return 0;
3854 }
3855
3856 static void
3857 brcmf_sdio_watchdog(unsigned long data)
3858 {
3859         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3860
3861         if (bus->watchdog_tsk) {
3862                 complete(&bus->watchdog_wait);
3863                 /* Reschedule the watchdog */
3864                 if (bus->wd_timer_valid)
3865                         mod_timer(&bus->timer,
3866                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3867         }
3868 }
3869
3870 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3871         .stop = brcmf_sdio_bus_stop,
3872         .preinit = brcmf_sdio_bus_preinit,
3873         .init = brcmf_sdio_bus_init,
3874         .txdata = brcmf_sdio_bus_txdata,
3875         .txctl = brcmf_sdio_bus_txctl,
3876         .rxctl = brcmf_sdio_bus_rxctl,
3877         .gettxq = brcmf_sdio_bus_gettxq,
3878 };
3879
3880 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
3881 {
3882         int ret;
3883         struct brcmf_sdio *bus;
3884
3885         brcmf_dbg(TRACE, "Enter\n");
3886
3887         /* Allocate private bus interface state */
3888         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3889         if (!bus)
3890                 goto fail;
3891
3892         bus->sdiodev = sdiodev;
3893         sdiodev->bus = bus;
3894         skb_queue_head_init(&bus->glom);
3895         bus->txbound = BRCMF_TXBOUND;
3896         bus->rxbound = BRCMF_RXBOUND;
3897         bus->txminmax = BRCMF_TXMINMAX;
3898         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3899
3900         /* platform specific configuration:
3901          *   alignments must be at least 4 bytes for ADMA
3902          */
3903         bus->head_align = ALIGNMENT;
3904         bus->sgentry_align = ALIGNMENT;
3905         if (sdiodev->pdata) {
3906                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
3907                         bus->head_align = sdiodev->pdata->sd_head_align;
3908                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
3909                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
3910         }
3911
3912         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3913         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3914         if (bus->brcmf_wq == NULL) {
3915                 brcmf_err("insufficient memory to create txworkqueue\n");
3916                 goto fail;
3917         }
3918
3919         /* attempt to attach to the dongle */
3920         if (!(brcmf_sdio_probe_attach(bus))) {
3921                 brcmf_err("brcmf_sdio_probe_attach failed\n");
3922                 goto fail;
3923         }
3924
3925         spin_lock_init(&bus->rxctl_lock);
3926         spin_lock_init(&bus->txqlock);
3927         init_waitqueue_head(&bus->ctrl_wait);
3928         init_waitqueue_head(&bus->dcmd_resp_wait);
3929
3930         /* Set up the watchdog timer */
3931         init_timer(&bus->timer);
3932         bus->timer.data = (unsigned long)bus;
3933         bus->timer.function = brcmf_sdio_watchdog;
3934
3935         /* Initialize watchdog thread */
3936         init_completion(&bus->watchdog_wait);
3937         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
3938                                         bus, "brcmf_watchdog");
3939         if (IS_ERR(bus->watchdog_tsk)) {
3940                 pr_warn("brcmf_watchdog thread failed to start\n");
3941                 bus->watchdog_tsk = NULL;
3942         }
3943         /* Initialize DPC thread */
3944         atomic_set(&bus->dpc_tskcnt, 0);
3945
3946         /* Assign bus interface call back */
3947         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3948         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3949         bus->sdiodev->bus_if->chip = bus->ci->chip;
3950         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
3951
3952         /* default sdio bus header length for tx packet */
3953         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3954
3955         /* Attach to the common layer, reserve hdr space */
3956         ret = brcmf_attach(bus->sdiodev->dev);
3957         if (ret != 0) {
3958                 brcmf_err("brcmf_attach failed\n");
3959                 goto fail;
3960         }
3961
3962         /* Allocate buffers */
3963         if (bus->sdiodev->bus_if->maxctl) {
3964                 bus->rxblen =
3965                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3966                             ALIGNMENT) + bus->head_align;
3967                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3968                 if (!(bus->rxbuf)) {
3969                         brcmf_err("rxbuf allocation failed\n");
3970                         goto fail;
3971                 }
3972         }
3973
3974         sdio_claim_host(bus->sdiodev->func[1]);
3975
3976         /* Disable F2 to clear any intermediate frame state on the dongle */
3977         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3978
3979         bus->rxflow = false;
3980
3981         /* Done with backplane-dependent accesses, can drop clock... */
3982         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3983
3984         sdio_release_host(bus->sdiodev->func[1]);
3985
3986         /* ...and initialize clock/power states */
3987         bus->clkstate = CLK_SDONLY;
3988         bus->idletime = BRCMF_IDLE_INTERVAL;
3989         bus->idleclock = BRCMF_IDLE_ACTIVE;
3990
3991         /* Query the F2 block size, set roundup accordingly */
3992         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3993         bus->roundup = min(max_roundup, bus->blocksize);
3994
3995         /* SR state */
3996         bus->sleeping = false;
3997         bus->sr_enabled = false;
3998
3999         brcmf_sdio_debugfs_create(bus);
4000         brcmf_dbg(INFO, "completed!!\n");
4001
4002         /* if firmware path present try to download and bring up bus */
4003         ret = brcmf_bus_start(bus->sdiodev->dev);
4004         if (ret != 0) {
4005                 brcmf_err("dongle is not responding\n");
4006                 goto fail;
4007         }
4008
4009         return bus;
4010
4011 fail:
4012         brcmf_sdio_remove(bus);
4013         return NULL;
4014 }
4015
4016 /* Detach and free everything */
4017 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4018 {
4019         brcmf_dbg(TRACE, "Enter\n");
4020
4021         if (bus) {
4022                 /* De-register interrupt handler */
4023                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4024
4025                 cancel_work_sync(&bus->datawork);
4026                 if (bus->brcmf_wq)
4027                         destroy_workqueue(bus->brcmf_wq);
4028
4029                 if (bus->sdiodev->bus_if->drvr) {
4030                         brcmf_detach(bus->sdiodev->dev);
4031                 }
4032
4033                 if (bus->ci) {
4034                         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
4035                                 sdio_claim_host(bus->sdiodev->func[1]);
4036                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4037                                 /* Leave the device in state where it is
4038                                  * 'quiet'. This is done by putting it in
4039                                  * download_state which essentially resets
4040                                  * all necessary cores.
4041                                  */
4042                                 msleep(20);
4043                                 brcmf_sdio_chip_enter_download(bus->sdiodev,
4044                                                                bus->ci);
4045                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4046                                 sdio_release_host(bus->sdiodev->func[1]);
4047                         }
4048                         brcmf_sdio_chip_detach(&bus->ci);
4049                 }
4050
4051                 kfree(bus->rxbuf);
4052                 kfree(bus->hdrbuf);
4053                 kfree(bus);
4054         }
4055
4056         brcmf_dbg(TRACE, "Disconnected\n");
4057 }
4058
4059 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4060 {
4061         /* Totally stop the timer */
4062         if (!wdtick && bus->wd_timer_valid) {
4063                 del_timer_sync(&bus->timer);
4064                 bus->wd_timer_valid = false;
4065                 bus->save_ms = wdtick;
4066                 return;
4067         }
4068
4069         /* don't start the wd until fw is loaded */
4070         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4071                 return;
4072
4073         if (wdtick) {
4074                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4075                         if (bus->wd_timer_valid)
4076                                 /* Stop timer and restart at new value */
4077                                 del_timer_sync(&bus->timer);
4078
4079                         /* Create timer again when watchdog period is
4080                            dynamically changed or in the first instance
4081                          */
4082                         bus->timer.expires =
4083                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4084                         add_timer(&bus->timer);
4085
4086                 } else {
4087                         /* Re arm the timer, at last watchdog period */
4088                         mod_timer(&bus->timer,
4089                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4090                 }
4091
4092                 bus->wd_timer_valid = true;
4093                 bus->save_ms = wdtick;
4094         }
4095 }