2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
38 switch (mpdudensity) {
44 /* Our lower layer calculations limit our precision to
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
64 spin_lock_bh(&txq->axq_lock);
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
69 spin_unlock_bh(&txq->axq_lock);
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
85 void ath_ps_full_sleep(unsigned long data)
87 struct ath_softc *sc = (struct ath_softc *) data;
88 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
91 spin_lock(&common->cc_lock);
92 ath_hw_cycle_counters_update(common);
93 spin_unlock(&common->cc_lock);
95 ath9k_hw_setrxabort(sc->sc_ah, 1);
96 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
98 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
101 void ath9k_ps_wakeup(struct ath_softc *sc)
103 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
105 enum ath9k_power_mode power_mode;
107 spin_lock_irqsave(&sc->sc_pm_lock, flags);
108 if (++sc->ps_usecount != 1)
111 del_timer_sync(&sc->sleep_timer);
112 power_mode = sc->sc_ah->power_mode;
113 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
116 * While the hardware is asleep, the cycle counters contain no
117 * useful data. Better clear them now so that they don't mess up
118 * survey data results.
120 if (power_mode != ATH9K_PM_AWAKE) {
121 spin_lock(&common->cc_lock);
122 ath_hw_cycle_counters_update(common);
123 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
124 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
125 spin_unlock(&common->cc_lock);
129 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
132 void ath9k_ps_restore(struct ath_softc *sc)
134 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
135 enum ath9k_power_mode mode;
138 spin_lock_irqsave(&sc->sc_pm_lock, flags);
139 if (--sc->ps_usecount != 0)
143 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
147 if (sc->ps_enabled &&
148 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
150 PS_WAIT_FOR_PSPOLL_DATA |
153 mode = ATH9K_PM_NETWORK_SLEEP;
154 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
155 ath9k_btcoex_stop_gen_timer(sc);
160 spin_lock(&common->cc_lock);
161 ath_hw_cycle_counters_update(common);
162 spin_unlock(&common->cc_lock);
164 ath9k_hw_setpower(sc->sc_ah, mode);
167 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
170 static void __ath_cancel_work(struct ath_softc *sc)
172 cancel_work_sync(&sc->paprd_work);
173 cancel_work_sync(&sc->hw_check_work);
174 cancel_delayed_work_sync(&sc->tx_complete_work);
175 cancel_delayed_work_sync(&sc->hw_pll_work);
177 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
178 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
179 cancel_work_sync(&sc->mci_work);
183 void ath_cancel_work(struct ath_softc *sc)
185 __ath_cancel_work(sc);
186 cancel_work_sync(&sc->hw_reset_work);
189 void ath_restart_work(struct ath_softc *sc)
191 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
193 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
194 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
195 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
197 ath_start_rx_poll(sc, 3);
201 static bool ath_prepare_reset(struct ath_softc *sc)
203 struct ath_hw *ah = sc->sc_ah;
206 ieee80211_stop_queues(sc->hw);
208 sc->hw_busy_count = 0;
210 del_timer_sync(&sc->rx_poll_timer);
212 ath9k_hw_disable_interrupts(ah);
214 if (!ath_drain_all_txq(sc))
217 if (!ath_stoprecv(sc))
223 static bool ath_complete_reset(struct ath_softc *sc, bool start)
225 struct ath_hw *ah = sc->sc_ah;
226 struct ath_common *common = ath9k_hw_common(ah);
230 if (ath_startrecv(sc) != 0) {
231 ath_err(common, "Unable to restart recv logic\n");
235 ath9k_cmn_update_txpow(ah, sc->curtxpow,
236 sc->config.txpowlimit, &sc->curtxpow);
238 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
239 ath9k_hw_set_interrupts(ah);
240 ath9k_hw_enable_interrupts(ah);
242 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
243 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
246 if (ah->opmode == NL80211_IFTYPE_STATION &&
247 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
248 spin_lock_irqsave(&sc->sc_pm_lock, flags);
249 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
250 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
252 ath9k_set_beacon(sc);
255 ath_restart_work(sc);
257 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
258 if (!ATH_TXQ_SETUP(sc, i))
261 spin_lock_bh(&sc->tx.txq[i].axq_lock);
262 ath_txq_schedule(sc, &sc->tx.txq[i]);
263 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
267 ieee80211_wake_queues(sc->hw);
272 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
274 struct ath_hw *ah = sc->sc_ah;
275 struct ath_common *common = ath9k_hw_common(ah);
276 struct ath9k_hw_cal_data *caldata = NULL;
280 __ath_cancel_work(sc);
282 tasklet_disable(&sc->intr_tq);
283 spin_lock_bh(&sc->sc_pcu_lock);
285 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
287 caldata = &sc->caldata;
295 if (!ath_prepare_reset(sc))
298 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
299 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
301 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
304 "Unable to reset channel, reset status %d\n", r);
306 ath9k_hw_enable_interrupts(ah);
307 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
312 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
313 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
314 ath9k_mci_set_txpower(sc, true, false);
316 if (!ath_complete_reset(sc, true))
320 spin_unlock_bh(&sc->sc_pcu_lock);
321 tasklet_enable(&sc->intr_tq);
328 * Set/change channels. If the channel is really being changed, it's done
329 * by reseting the chip. To accomplish this we must first cleanup any pending
330 * DMA, then restart stuff.
332 static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef)
334 struct ath_hw *ah = sc->sc_ah;
335 struct ath_common *common = ath9k_hw_common(ah);
336 struct ieee80211_hw *hw = sc->hw;
337 struct ath9k_channel *hchan;
338 struct ieee80211_channel *chan = chandef->chan;
341 int pos = chan->hw_value;
345 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
348 offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL);
351 old_pos = ah->curchan - &ah->channels[0];
353 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
354 chan->center_freq, chandef->width);
356 /* update survey stats for the old channel before switching */
357 spin_lock_irqsave(&common->cc_lock, flags);
358 ath_update_survey_stats(sc);
359 spin_unlock_irqrestore(&common->cc_lock, flags);
361 ath9k_cmn_get_channel(hw, ah, chandef);
364 * If the operating channel changes, change the survey in-use flags
366 * Reset the survey data for the new channel, unless we're switching
367 * back to the operating channel from an off-channel operation.
369 if (!offchannel && sc->cur_survey != &sc->survey[pos]) {
371 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
373 sc->cur_survey = &sc->survey[pos];
375 memset(sc->cur_survey, 0, sizeof(struct survey_info));
376 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
377 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
378 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
381 hchan = &sc->sc_ah->channels[pos];
382 r = ath_reset_internal(sc, hchan);
387 * The most recent snapshot of channel->noisefloor for the old
388 * channel is only available after the hardware reset. Copy it to
389 * the survey stats now.
392 ath_update_survey_nf(sc, old_pos);
395 * Enable radar pulse detection if on a DFS channel. Spectral
396 * scanning and radar detection can not be used concurrently.
398 if (hw->conf.radar_enabled) {
401 /* set HW specific DFS configuration */
402 ath9k_hw_set_radar_params(ah);
403 rxfilter = ath9k_hw_getrxfilter(ah);
404 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
405 ATH9K_RX_FILTER_PHYERR;
406 ath9k_hw_setrxfilter(ah, rxfilter);
407 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
410 /* perform spectral scan if requested. */
411 if (test_bit(SC_OP_SCANNING, &sc->sc_flags) &&
412 sc->spectral_mode == SPECTRAL_CHANSCAN)
413 ath9k_spectral_scan_trigger(hw);
419 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
420 struct ieee80211_vif *vif)
423 an = (struct ath_node *)sta->drv_priv;
429 ath_tx_node_init(sc, an);
431 if (sta->ht_cap.ht_supported) {
432 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
433 sta->ht_cap.ampdu_factor);
434 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
438 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
440 struct ath_node *an = (struct ath_node *)sta->drv_priv;
441 ath_tx_node_cleanup(sc, an);
444 void ath9k_tasklet(unsigned long data)
446 struct ath_softc *sc = (struct ath_softc *)data;
447 struct ath_hw *ah = sc->sc_ah;
448 struct ath_common *common = ath9k_hw_common(ah);
449 enum ath_reset_type type;
451 u32 status = sc->intrstatus;
455 spin_lock(&sc->sc_pcu_lock);
457 if ((status & ATH9K_INT_FATAL) ||
458 (status & ATH9K_INT_BB_WATCHDOG)) {
460 if (status & ATH9K_INT_FATAL)
461 type = RESET_TYPE_FATAL_INT;
463 type = RESET_TYPE_BB_WATCHDOG;
465 ath9k_queue_reset(sc, type);
468 * Increment the ref. counter here so that
469 * interrupts are enabled in the reset routine.
471 atomic_inc(&ah->intr_ref_cnt);
472 ath_dbg(common, ANY, "FATAL: Skipping interrupts\n");
476 spin_lock_irqsave(&sc->sc_pm_lock, flags);
477 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
479 * TSF sync does not look correct; remain awake to sync with
482 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
483 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
485 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
487 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
488 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
491 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
493 if (status & rxmask) {
494 /* Check for high priority Rx first */
495 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
496 (status & ATH9K_INT_RXHP))
497 ath_rx_tasklet(sc, 0, true);
499 ath_rx_tasklet(sc, 0, false);
502 if (status & ATH9K_INT_TX) {
503 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
504 ath_tx_edma_tasklet(sc);
508 wake_up(&sc->tx_wait);
511 if (status & ATH9K_INT_GENTIMER)
512 ath_gen_timer_isr(sc->sc_ah);
514 ath9k_btcoex_handle_interrupt(sc, status);
516 /* re-enable hardware interrupt */
517 ath9k_hw_enable_interrupts(ah);
519 spin_unlock(&sc->sc_pcu_lock);
520 ath9k_ps_restore(sc);
523 irqreturn_t ath_isr(int irq, void *dev)
525 #define SCHED_INTR ( \
527 ATH9K_INT_BB_WATCHDOG | \
537 ATH9K_INT_GENTIMER | \
540 struct ath_softc *sc = dev;
541 struct ath_hw *ah = sc->sc_ah;
542 struct ath_common *common = ath9k_hw_common(ah);
543 enum ath9k_int status;
548 * The hardware is not ready/present, don't
549 * touch anything. Note this can happen early
550 * on if the IRQ is shared.
552 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
555 /* shared irq, not for us */
557 if (!ath9k_hw_intrpend(ah))
560 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
561 ath9k_hw_kill_interrupts(ah);
566 * Figure out the reason(s) for the interrupt. Note
567 * that the hal returns a pseudo-ISR that may include
568 * bits we haven't explicitly enabled so we mask the
569 * value to insure we only process bits we requested.
571 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
572 ath9k_debug_sync_cause(sc, sync_cause);
573 status &= ah->imask; /* discard unasked-for bits */
576 * If there are no status bits set, then this interrupt was not
577 * for me (should have been caught above).
582 /* Cache the status */
583 sc->intrstatus = status;
585 if (status & SCHED_INTR)
589 * If a FATAL or RXORN interrupt is received, we have to reset the
592 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
593 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
596 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
597 (status & ATH9K_INT_BB_WATCHDOG)) {
599 spin_lock(&common->cc_lock);
600 ath_hw_cycle_counters_update(common);
601 ar9003_hw_bb_watchdog_dbg_info(ah);
602 spin_unlock(&common->cc_lock);
607 #ifdef CONFIG_ATH9K_WOW
608 if (status & ATH9K_INT_BMISS) {
609 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
610 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
611 atomic_inc(&sc->wow_got_bmiss_intr);
612 atomic_dec(&sc->wow_sleep_proc_intr);
618 if (status & ATH9K_INT_SWBA)
619 tasklet_schedule(&sc->bcon_tasklet);
621 if (status & ATH9K_INT_TXURN)
622 ath9k_hw_updatetxtriglevel(ah, true);
624 if (status & ATH9K_INT_RXEOL) {
625 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
626 ath9k_hw_set_interrupts(ah);
629 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
630 if (status & ATH9K_INT_TIM_TIMER) {
631 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
633 /* Clear RxAbort bit so that we can
635 ath9k_setpower(sc, ATH9K_PM_AWAKE);
636 spin_lock(&sc->sc_pm_lock);
637 ath9k_hw_setrxabort(sc->sc_ah, 0);
638 sc->ps_flags |= PS_WAIT_FOR_BEACON;
639 spin_unlock(&sc->sc_pm_lock);
644 ath_debug_stat_interrupt(sc, status);
647 /* turn off every interrupt */
648 ath9k_hw_disable_interrupts(ah);
649 tasklet_schedule(&sc->intr_tq);
657 int ath_reset(struct ath_softc *sc)
662 r = ath_reset_internal(sc, NULL);
663 ath9k_ps_restore(sc);
668 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
670 #ifdef CONFIG_ATH9K_DEBUGFS
671 RESET_STAT_INC(sc, type);
673 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
674 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
677 void ath_reset_work(struct work_struct *work)
679 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
684 /**********************/
685 /* mac80211 callbacks */
686 /**********************/
688 static int ath9k_start(struct ieee80211_hw *hw)
690 struct ath_softc *sc = hw->priv;
691 struct ath_hw *ah = sc->sc_ah;
692 struct ath_common *common = ath9k_hw_common(ah);
693 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
694 struct ath9k_channel *init_channel;
697 ath_dbg(common, CONFIG,
698 "Starting driver with initial channel: %d MHz\n",
699 curchan->center_freq);
702 mutex_lock(&sc->mutex);
704 init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
706 /* Reset SERDES registers */
707 ath9k_hw_configpcipowersave(ah, false);
710 * The basic interface to setting the hardware in a good
711 * state is ``reset''. On return the hardware is known to
712 * be powered up and with interrupts disabled. This must
713 * be followed by initialization of the appropriate bits
714 * and then setup of the interrupt mask.
716 spin_lock_bh(&sc->sc_pcu_lock);
718 atomic_set(&ah->intr_ref_cnt, -1);
720 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
723 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
724 r, curchan->center_freq);
725 ah->reset_power_on = false;
728 /* Setup our intr mask. */
729 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
730 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
733 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
734 ah->imask |= ATH9K_INT_RXHP |
736 ATH9K_INT_BB_WATCHDOG;
738 ah->imask |= ATH9K_INT_RX;
740 ah->imask |= ATH9K_INT_GTT;
742 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
743 ah->imask |= ATH9K_INT_CST;
747 clear_bit(SC_OP_INVALID, &sc->sc_flags);
748 sc->sc_ah->is_monitoring = false;
750 if (!ath_complete_reset(sc, false))
751 ah->reset_power_on = false;
753 if (ah->led_pin >= 0) {
754 ath9k_hw_cfg_output(ah, ah->led_pin,
755 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
756 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
760 * Reset key cache to sane defaults (all entries cleared) instead of
761 * semi-random values after suspend/resume.
763 ath9k_cmn_init_crypto(sc->sc_ah);
765 ath9k_hw_reset_tsf(ah);
767 spin_unlock_bh(&sc->sc_pcu_lock);
769 mutex_unlock(&sc->mutex);
771 ath9k_ps_restore(sc);
776 static void ath9k_tx(struct ieee80211_hw *hw,
777 struct ieee80211_tx_control *control,
780 struct ath_softc *sc = hw->priv;
781 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
782 struct ath_tx_control txctl;
783 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
786 if (sc->ps_enabled) {
788 * mac80211 does not set PM field for normal data frames, so we
789 * need to update that based on the current PS mode.
791 if (ieee80211_is_data(hdr->frame_control) &&
792 !ieee80211_is_nullfunc(hdr->frame_control) &&
793 !ieee80211_has_pm(hdr->frame_control)) {
795 "Add PM=1 for a TX frame while in PS mode\n");
796 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
800 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
802 * We are using PS-Poll and mac80211 can request TX while in
803 * power save mode. Need to wake up hardware for the TX to be
804 * completed and if needed, also for RX of buffered frames.
807 spin_lock_irqsave(&sc->sc_pm_lock, flags);
808 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
809 ath9k_hw_setrxabort(sc->sc_ah, 0);
810 if (ieee80211_is_pspoll(hdr->frame_control)) {
812 "Sending PS-Poll to pick a buffered frame\n");
813 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
815 ath_dbg(common, PS, "Wake up to complete TX\n");
816 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
819 * The actual restore operation will happen only after
820 * the ps_flags bit is cleared. We are just dropping
821 * the ps_usecount here.
823 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
824 ath9k_ps_restore(sc);
828 * Cannot tx while the hardware is in full sleep, it first needs a full
829 * chip reset to recover from that
831 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
832 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
836 memset(&txctl, 0, sizeof(struct ath_tx_control));
837 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
838 txctl.sta = control->sta;
840 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
842 if (ath_tx_start(hw, skb, &txctl) != 0) {
843 ath_dbg(common, XMIT, "TX failed\n");
844 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
850 ieee80211_free_txskb(hw, skb);
853 static void ath9k_stop(struct ieee80211_hw *hw)
855 struct ath_softc *sc = hw->priv;
856 struct ath_hw *ah = sc->sc_ah;
857 struct ath_common *common = ath9k_hw_common(ah);
860 mutex_lock(&sc->mutex);
863 del_timer_sync(&sc->rx_poll_timer);
865 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
866 ath_dbg(common, ANY, "Device not present\n");
867 mutex_unlock(&sc->mutex);
871 /* Ensure HW is awake when we try to shut it down. */
874 spin_lock_bh(&sc->sc_pcu_lock);
876 /* prevent tasklets to enable interrupts once we disable them */
877 ah->imask &= ~ATH9K_INT_GLOBAL;
879 /* make sure h/w will not generate any interrupt
880 * before setting the invalid flag. */
881 ath9k_hw_disable_interrupts(ah);
883 spin_unlock_bh(&sc->sc_pcu_lock);
885 /* we can now sync irq and kill any running tasklets, since we already
886 * disabled interrupts and not holding a spin lock */
887 synchronize_irq(sc->irq);
888 tasklet_kill(&sc->intr_tq);
889 tasklet_kill(&sc->bcon_tasklet);
891 prev_idle = sc->ps_idle;
894 spin_lock_bh(&sc->sc_pcu_lock);
896 if (ah->led_pin >= 0) {
897 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
898 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
901 ath_prepare_reset(sc);
904 dev_kfree_skb_any(sc->rx.frag);
909 ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
911 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
912 ath9k_hw_phy_disable(ah);
914 ath9k_hw_configpcipowersave(ah, true);
916 spin_unlock_bh(&sc->sc_pcu_lock);
918 ath9k_ps_restore(sc);
920 set_bit(SC_OP_INVALID, &sc->sc_flags);
921 sc->ps_idle = prev_idle;
923 mutex_unlock(&sc->mutex);
925 ath_dbg(common, CONFIG, "Driver halt\n");
928 static bool ath9k_uses_beacons(int type)
931 case NL80211_IFTYPE_AP:
932 case NL80211_IFTYPE_ADHOC:
933 case NL80211_IFTYPE_MESH_POINT:
940 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
942 struct ath9k_vif_iter_data *iter_data = data;
945 if (iter_data->has_hw_macaddr) {
946 for (i = 0; i < ETH_ALEN; i++)
947 iter_data->mask[i] &=
948 ~(iter_data->hw_macaddr[i] ^ mac[i]);
950 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
951 iter_data->has_hw_macaddr = true;
955 case NL80211_IFTYPE_AP:
958 case NL80211_IFTYPE_STATION:
959 iter_data->nstations++;
961 case NL80211_IFTYPE_ADHOC:
962 iter_data->nadhocs++;
964 case NL80211_IFTYPE_MESH_POINT:
965 iter_data->nmeshes++;
967 case NL80211_IFTYPE_WDS:
975 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
977 struct ath_softc *sc = data;
978 struct ath_vif *avp = (void *)vif->drv_priv;
980 if (vif->type != NL80211_IFTYPE_STATION)
983 if (avp->primary_sta_vif)
984 ath9k_set_assoc_state(sc, vif);
987 /* Called with sc->mutex held. */
988 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
989 struct ieee80211_vif *vif,
990 struct ath9k_vif_iter_data *iter_data)
992 struct ath_softc *sc = hw->priv;
993 struct ath_hw *ah = sc->sc_ah;
994 struct ath_common *common = ath9k_hw_common(ah);
997 * Pick the MAC address of the first interface as the new hardware
998 * MAC address. The hardware will use it together with the BSSID mask
999 * when matching addresses.
1001 memset(iter_data, 0, sizeof(*iter_data));
1002 memset(&iter_data->mask, 0xff, ETH_ALEN);
1005 ath9k_vif_iter(iter_data, vif->addr, vif);
1007 /* Get list of all active MAC addresses */
1008 ieee80211_iterate_active_interfaces_atomic(
1009 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1010 ath9k_vif_iter, iter_data);
1012 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
1015 /* Called with sc->mutex held. */
1016 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1017 struct ieee80211_vif *vif)
1019 struct ath_softc *sc = hw->priv;
1020 struct ath_hw *ah = sc->sc_ah;
1021 struct ath_common *common = ath9k_hw_common(ah);
1022 struct ath9k_vif_iter_data iter_data;
1023 enum nl80211_iftype old_opmode = ah->opmode;
1025 ath9k_calculate_iter_data(hw, vif, &iter_data);
1027 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1028 ath_hw_setbssidmask(common);
1030 if (iter_data.naps > 0) {
1031 ath9k_hw_set_tsfadjust(ah, true);
1032 ah->opmode = NL80211_IFTYPE_AP;
1034 ath9k_hw_set_tsfadjust(ah, false);
1036 if (iter_data.nmeshes)
1037 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1038 else if (iter_data.nwds)
1039 ah->opmode = NL80211_IFTYPE_AP;
1040 else if (iter_data.nadhocs)
1041 ah->opmode = NL80211_IFTYPE_ADHOC;
1043 ah->opmode = NL80211_IFTYPE_STATION;
1046 ath9k_hw_setopmode(ah);
1048 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1049 ah->imask |= ATH9K_INT_TSFOOR;
1051 ah->imask &= ~ATH9K_INT_TSFOOR;
1053 ath9k_hw_set_interrupts(ah);
1056 * If we are changing the opmode to STATION,
1057 * a beacon sync needs to be done.
1059 if (ah->opmode == NL80211_IFTYPE_STATION &&
1060 old_opmode == NL80211_IFTYPE_AP &&
1061 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
1062 ieee80211_iterate_active_interfaces_atomic(
1063 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1064 ath9k_sta_vif_iter, sc);
1068 static int ath9k_add_interface(struct ieee80211_hw *hw,
1069 struct ieee80211_vif *vif)
1071 struct ath_softc *sc = hw->priv;
1072 struct ath_hw *ah = sc->sc_ah;
1073 struct ath_common *common = ath9k_hw_common(ah);
1074 struct ath_vif *avp = (void *)vif->drv_priv;
1075 struct ath_node *an = &avp->mcast_node;
1077 mutex_lock(&sc->mutex);
1079 if (config_enabled(CONFIG_ATH9K_TX99)) {
1080 if (sc->nvifs >= 1) {
1081 mutex_unlock(&sc->mutex);
1087 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1090 ath9k_ps_wakeup(sc);
1091 ath9k_calculate_summary_state(hw, vif);
1092 ath9k_ps_restore(sc);
1094 if (ath9k_uses_beacons(vif->type))
1095 ath9k_beacon_assign_slot(sc, vif);
1100 an->no_ps_filter = true;
1101 ath_tx_node_init(sc, an);
1103 mutex_unlock(&sc->mutex);
1107 static int ath9k_change_interface(struct ieee80211_hw *hw,
1108 struct ieee80211_vif *vif,
1109 enum nl80211_iftype new_type,
1112 struct ath_softc *sc = hw->priv;
1113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1115 mutex_lock(&sc->mutex);
1117 if (config_enabled(CONFIG_ATH9K_TX99)) {
1118 mutex_unlock(&sc->mutex);
1122 ath_dbg(common, CONFIG, "Change Interface\n");
1124 if (ath9k_uses_beacons(vif->type))
1125 ath9k_beacon_remove_slot(sc, vif);
1127 vif->type = new_type;
1130 ath9k_ps_wakeup(sc);
1131 ath9k_calculate_summary_state(hw, vif);
1132 ath9k_ps_restore(sc);
1134 if (ath9k_uses_beacons(vif->type))
1135 ath9k_beacon_assign_slot(sc, vif);
1137 mutex_unlock(&sc->mutex);
1141 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1142 struct ieee80211_vif *vif)
1144 struct ath_softc *sc = hw->priv;
1145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1146 struct ath_vif *avp = (void *)vif->drv_priv;
1148 ath_dbg(common, CONFIG, "Detach Interface\n");
1150 mutex_lock(&sc->mutex);
1153 sc->tx99_vif = NULL;
1155 if (ath9k_uses_beacons(vif->type))
1156 ath9k_beacon_remove_slot(sc, vif);
1158 if (sc->csa_vif == vif)
1161 ath9k_ps_wakeup(sc);
1162 ath9k_calculate_summary_state(hw, NULL);
1163 ath9k_ps_restore(sc);
1165 ath_tx_node_cleanup(sc, &avp->mcast_node);
1167 mutex_unlock(&sc->mutex);
1170 static void ath9k_enable_ps(struct ath_softc *sc)
1172 struct ath_hw *ah = sc->sc_ah;
1173 struct ath_common *common = ath9k_hw_common(ah);
1175 if (config_enabled(CONFIG_ATH9K_TX99))
1178 sc->ps_enabled = true;
1179 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1180 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1181 ah->imask |= ATH9K_INT_TIM_TIMER;
1182 ath9k_hw_set_interrupts(ah);
1184 ath9k_hw_setrxabort(ah, 1);
1186 ath_dbg(common, PS, "PowerSave enabled\n");
1189 static void ath9k_disable_ps(struct ath_softc *sc)
1191 struct ath_hw *ah = sc->sc_ah;
1192 struct ath_common *common = ath9k_hw_common(ah);
1194 if (config_enabled(CONFIG_ATH9K_TX99))
1197 sc->ps_enabled = false;
1198 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1199 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1200 ath9k_hw_setrxabort(ah, 0);
1201 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1203 PS_WAIT_FOR_PSPOLL_DATA |
1204 PS_WAIT_FOR_TX_ACK);
1205 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1206 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1207 ath9k_hw_set_interrupts(ah);
1210 ath_dbg(common, PS, "PowerSave disabled\n");
1213 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1215 struct ath_softc *sc = hw->priv;
1216 struct ath_hw *ah = sc->sc_ah;
1217 struct ath_common *common = ath9k_hw_common(ah);
1220 if (config_enabled(CONFIG_ATH9K_TX99))
1223 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1224 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1228 ath9k_ps_wakeup(sc);
1229 rxfilter = ath9k_hw_getrxfilter(ah);
1230 ath9k_hw_setrxfilter(ah, rxfilter |
1231 ATH9K_RX_FILTER_PHYRADAR |
1232 ATH9K_RX_FILTER_PHYERR);
1234 /* TODO: usually this should not be neccesary, but for some reason
1235 * (or in some mode?) the trigger must be called after the
1236 * configuration, otherwise the register will have its values reset
1237 * (on my ar9220 to value 0x01002310)
1239 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1240 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1241 ath9k_ps_restore(sc);
1244 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1245 enum spectral_mode spectral_mode)
1247 struct ath_softc *sc = hw->priv;
1248 struct ath_hw *ah = sc->sc_ah;
1249 struct ath_common *common = ath9k_hw_common(ah);
1251 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1252 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1256 switch (spectral_mode) {
1257 case SPECTRAL_DISABLED:
1258 sc->spec_config.enabled = 0;
1260 case SPECTRAL_BACKGROUND:
1261 /* send endless samples.
1262 * TODO: is this really useful for "background"?
1264 sc->spec_config.endless = 1;
1265 sc->spec_config.enabled = 1;
1267 case SPECTRAL_CHANSCAN:
1268 case SPECTRAL_MANUAL:
1269 sc->spec_config.endless = 0;
1270 sc->spec_config.enabled = 1;
1276 ath9k_ps_wakeup(sc);
1277 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1278 ath9k_ps_restore(sc);
1280 sc->spectral_mode = spectral_mode;
1285 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1287 struct ath_softc *sc = hw->priv;
1288 struct ath_hw *ah = sc->sc_ah;
1289 struct ath_common *common = ath9k_hw_common(ah);
1290 struct ieee80211_conf *conf = &hw->conf;
1291 bool reset_channel = false;
1293 ath9k_ps_wakeup(sc);
1294 mutex_lock(&sc->mutex);
1296 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1297 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1299 ath_cancel_work(sc);
1300 ath9k_stop_btcoex(sc);
1302 ath9k_start_btcoex(sc);
1304 * The chip needs a reset to properly wake up from
1307 reset_channel = ah->chip_fullsleep;
1312 * We just prepare to enable PS. We have to wait until our AP has
1313 * ACK'd our null data frame to disable RX otherwise we'll ignore
1314 * those ACKs and end up retransmitting the same null data frames.
1315 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1317 if (changed & IEEE80211_CONF_CHANGE_PS) {
1318 unsigned long flags;
1319 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1320 if (conf->flags & IEEE80211_CONF_PS)
1321 ath9k_enable_ps(sc);
1323 ath9k_disable_ps(sc);
1324 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1327 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1328 if (conf->flags & IEEE80211_CONF_MONITOR) {
1329 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1330 sc->sc_ah->is_monitoring = true;
1332 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1333 sc->sc_ah->is_monitoring = false;
1337 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1338 if (ath_set_channel(sc, &hw->conf.chandef) < 0) {
1339 ath_err(common, "Unable to set channel\n");
1340 mutex_unlock(&sc->mutex);
1341 ath9k_ps_restore(sc);
1346 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1347 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1348 sc->config.txpowlimit = 2 * conf->power_level;
1349 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1350 sc->config.txpowlimit, &sc->curtxpow);
1353 mutex_unlock(&sc->mutex);
1354 ath9k_ps_restore(sc);
1359 #define SUPPORTED_FILTERS \
1360 (FIF_PROMISC_IN_BSS | \
1365 FIF_BCN_PRBRESP_PROMISC | \
1369 /* FIXME: sc->sc_full_reset ? */
1370 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1371 unsigned int changed_flags,
1372 unsigned int *total_flags,
1375 struct ath_softc *sc = hw->priv;
1378 changed_flags &= SUPPORTED_FILTERS;
1379 *total_flags &= SUPPORTED_FILTERS;
1381 sc->rx.rxfilter = *total_flags;
1382 ath9k_ps_wakeup(sc);
1383 rfilt = ath_calcrxfilter(sc);
1384 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1385 ath9k_ps_restore(sc);
1387 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1391 static int ath9k_sta_add(struct ieee80211_hw *hw,
1392 struct ieee80211_vif *vif,
1393 struct ieee80211_sta *sta)
1395 struct ath_softc *sc = hw->priv;
1396 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1397 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1398 struct ieee80211_key_conf ps_key = { };
1401 ath_node_attach(sc, sta, vif);
1403 if (vif->type != NL80211_IFTYPE_AP &&
1404 vif->type != NL80211_IFTYPE_AP_VLAN)
1407 key = ath_key_config(common, vif, sta, &ps_key);
1414 static void ath9k_del_ps_key(struct ath_softc *sc,
1415 struct ieee80211_vif *vif,
1416 struct ieee80211_sta *sta)
1418 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1419 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1420 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1425 ath_key_delete(common, &ps_key);
1429 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1430 struct ieee80211_vif *vif,
1431 struct ieee80211_sta *sta)
1433 struct ath_softc *sc = hw->priv;
1435 ath9k_del_ps_key(sc, vif, sta);
1436 ath_node_detach(sc, sta);
1441 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1442 struct ieee80211_vif *vif,
1443 enum sta_notify_cmd cmd,
1444 struct ieee80211_sta *sta)
1446 struct ath_softc *sc = hw->priv;
1447 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1450 case STA_NOTIFY_SLEEP:
1451 an->sleeping = true;
1452 ath_tx_aggr_sleep(sta, sc, an);
1454 case STA_NOTIFY_AWAKE:
1455 an->sleeping = false;
1456 ath_tx_aggr_wakeup(sc, an);
1461 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1462 struct ieee80211_vif *vif, u16 queue,
1463 const struct ieee80211_tx_queue_params *params)
1465 struct ath_softc *sc = hw->priv;
1466 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1467 struct ath_txq *txq;
1468 struct ath9k_tx_queue_info qi;
1471 if (queue >= IEEE80211_NUM_ACS)
1474 txq = sc->tx.txq_map[queue];
1476 ath9k_ps_wakeup(sc);
1477 mutex_lock(&sc->mutex);
1479 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1481 qi.tqi_aifs = params->aifs;
1482 qi.tqi_cwmin = params->cw_min;
1483 qi.tqi_cwmax = params->cw_max;
1484 qi.tqi_burstTime = params->txop * 32;
1486 ath_dbg(common, CONFIG,
1487 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1488 queue, txq->axq_qnum, params->aifs, params->cw_min,
1489 params->cw_max, params->txop);
1491 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1492 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1494 ath_err(common, "TXQ Update failed\n");
1496 mutex_unlock(&sc->mutex);
1497 ath9k_ps_restore(sc);
1502 static int ath9k_set_key(struct ieee80211_hw *hw,
1503 enum set_key_cmd cmd,
1504 struct ieee80211_vif *vif,
1505 struct ieee80211_sta *sta,
1506 struct ieee80211_key_conf *key)
1508 struct ath_softc *sc = hw->priv;
1509 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1512 if (ath9k_modparam_nohwcrypt)
1515 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1516 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1517 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1518 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1519 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1521 * For now, disable hw crypto for the RSN IBSS group keys. This
1522 * could be optimized in the future to use a modified key cache
1523 * design to support per-STA RX GTK, but until that gets
1524 * implemented, use of software crypto for group addressed
1525 * frames is a acceptable to allow RSN IBSS to be used.
1530 mutex_lock(&sc->mutex);
1531 ath9k_ps_wakeup(sc);
1532 ath_dbg(common, CONFIG, "Set HW Key\n");
1537 ath9k_del_ps_key(sc, vif, sta);
1539 ret = ath_key_config(common, vif, sta, key);
1541 key->hw_key_idx = ret;
1542 /* push IV and Michael MIC generation to stack */
1543 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1544 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1545 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1546 if (sc->sc_ah->sw_mgmt_crypto &&
1547 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1548 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1553 ath_key_delete(common, key);
1559 ath9k_ps_restore(sc);
1560 mutex_unlock(&sc->mutex);
1565 static void ath9k_set_assoc_state(struct ath_softc *sc,
1566 struct ieee80211_vif *vif)
1568 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1569 struct ath_vif *avp = (void *)vif->drv_priv;
1570 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1571 unsigned long flags;
1573 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1574 avp->primary_sta_vif = true;
1577 * Set the AID, BSSID and do beacon-sync only when
1578 * the HW opmode is STATION.
1580 * But the primary bit is set above in any case.
1582 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1585 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1586 common->curaid = bss_conf->aid;
1587 ath9k_hw_write_associd(sc->sc_ah);
1589 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1590 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1592 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1593 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1594 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1596 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1597 ath9k_mci_update_wlan_channels(sc, false);
1599 ath_dbg(common, CONFIG,
1600 "Primary Station interface: %pM, BSSID: %pM\n",
1601 vif->addr, common->curbssid);
1604 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1606 struct ath_softc *sc = data;
1607 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1609 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1612 if (bss_conf->assoc)
1613 ath9k_set_assoc_state(sc, vif);
1616 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1617 struct ieee80211_vif *vif,
1618 struct ieee80211_bss_conf *bss_conf,
1622 (BSS_CHANGED_ASSOC | \
1623 BSS_CHANGED_IBSS | \
1624 BSS_CHANGED_BEACON_ENABLED)
1626 struct ath_softc *sc = hw->priv;
1627 struct ath_hw *ah = sc->sc_ah;
1628 struct ath_common *common = ath9k_hw_common(ah);
1629 struct ath_vif *avp = (void *)vif->drv_priv;
1632 ath9k_ps_wakeup(sc);
1633 mutex_lock(&sc->mutex);
1635 if (changed & BSS_CHANGED_ASSOC) {
1636 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1637 bss_conf->bssid, bss_conf->assoc);
1639 if (avp->primary_sta_vif && !bss_conf->assoc) {
1640 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1641 avp->primary_sta_vif = false;
1643 if (ah->opmode == NL80211_IFTYPE_STATION)
1644 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1647 ieee80211_iterate_active_interfaces_atomic(
1648 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1649 ath9k_bss_assoc_iter, sc);
1651 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) &&
1652 ah->opmode == NL80211_IFTYPE_STATION) {
1653 memset(common->curbssid, 0, ETH_ALEN);
1655 ath9k_hw_write_associd(sc->sc_ah);
1656 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1657 ath9k_mci_update_wlan_channels(sc, true);
1661 if (changed & BSS_CHANGED_IBSS) {
1662 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1663 common->curaid = bss_conf->aid;
1664 ath9k_hw_write_associd(sc->sc_ah);
1667 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1668 (changed & BSS_CHANGED_BEACON_INT))
1669 ath9k_beacon_config(sc, vif, changed);
1671 if (changed & BSS_CHANGED_ERP_SLOT) {
1672 if (bss_conf->use_short_slot)
1676 if (vif->type == NL80211_IFTYPE_AP) {
1678 * Defer update, so that connected stations can adjust
1679 * their settings at the same time.
1680 * See beacon.c for more details
1682 sc->beacon.slottime = slottime;
1683 sc->beacon.updateslot = UPDATE;
1685 ah->slottime = slottime;
1686 ath9k_hw_init_global_settings(ah);
1690 if (changed & CHECK_ANI)
1693 mutex_unlock(&sc->mutex);
1694 ath9k_ps_restore(sc);
1699 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1701 struct ath_softc *sc = hw->priv;
1704 mutex_lock(&sc->mutex);
1705 ath9k_ps_wakeup(sc);
1706 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1707 ath9k_ps_restore(sc);
1708 mutex_unlock(&sc->mutex);
1713 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1714 struct ieee80211_vif *vif,
1717 struct ath_softc *sc = hw->priv;
1719 mutex_lock(&sc->mutex);
1720 ath9k_ps_wakeup(sc);
1721 ath9k_hw_settsf64(sc->sc_ah, tsf);
1722 ath9k_ps_restore(sc);
1723 mutex_unlock(&sc->mutex);
1726 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1728 struct ath_softc *sc = hw->priv;
1730 mutex_lock(&sc->mutex);
1732 ath9k_ps_wakeup(sc);
1733 ath9k_hw_reset_tsf(sc->sc_ah);
1734 ath9k_ps_restore(sc);
1736 mutex_unlock(&sc->mutex);
1739 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1740 struct ieee80211_vif *vif,
1741 enum ieee80211_ampdu_mlme_action action,
1742 struct ieee80211_sta *sta,
1743 u16 tid, u16 *ssn, u8 buf_size)
1745 struct ath_softc *sc = hw->priv;
1749 mutex_lock(&sc->mutex);
1752 case IEEE80211_AMPDU_RX_START:
1754 case IEEE80211_AMPDU_RX_STOP:
1756 case IEEE80211_AMPDU_TX_START:
1757 ath9k_ps_wakeup(sc);
1758 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1760 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1761 ath9k_ps_restore(sc);
1763 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1764 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1766 case IEEE80211_AMPDU_TX_STOP_CONT:
1767 ath9k_ps_wakeup(sc);
1768 ath_tx_aggr_stop(sc, sta, tid);
1770 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1771 ath9k_ps_restore(sc);
1773 case IEEE80211_AMPDU_TX_OPERATIONAL:
1774 ath9k_ps_wakeup(sc);
1775 ath_tx_aggr_resume(sc, sta, tid);
1776 ath9k_ps_restore(sc);
1779 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1782 mutex_unlock(&sc->mutex);
1787 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1788 struct survey_info *survey)
1790 struct ath_softc *sc = hw->priv;
1791 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1792 struct ieee80211_supported_band *sband;
1793 struct ieee80211_channel *chan;
1794 unsigned long flags;
1797 if (config_enabled(CONFIG_ATH9K_TX99))
1800 spin_lock_irqsave(&common->cc_lock, flags);
1802 ath_update_survey_stats(sc);
1804 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1805 if (sband && idx >= sband->n_channels) {
1806 idx -= sband->n_channels;
1811 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1813 if (!sband || idx >= sband->n_channels) {
1814 spin_unlock_irqrestore(&common->cc_lock, flags);
1818 chan = &sband->channels[idx];
1819 pos = chan->hw_value;
1820 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1821 survey->channel = chan;
1822 spin_unlock_irqrestore(&common->cc_lock, flags);
1827 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1829 struct ath_softc *sc = hw->priv;
1830 struct ath_hw *ah = sc->sc_ah;
1832 if (config_enabled(CONFIG_ATH9K_TX99))
1835 mutex_lock(&sc->mutex);
1836 ah->coverage_class = coverage_class;
1838 ath9k_ps_wakeup(sc);
1839 ath9k_hw_init_global_settings(ah);
1840 ath9k_ps_restore(sc);
1842 mutex_unlock(&sc->mutex);
1845 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1849 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1850 if (!ATH_TXQ_SETUP(sc, i))
1853 if (!sc->tx.txq[i].axq_depth)
1856 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1864 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1866 struct ath_softc *sc = hw->priv;
1867 struct ath_hw *ah = sc->sc_ah;
1868 struct ath_common *common = ath9k_hw_common(ah);
1869 int timeout = HZ / 5; /* 200 ms */
1872 mutex_lock(&sc->mutex);
1873 cancel_delayed_work_sync(&sc->tx_complete_work);
1875 if (ah->ah_flags & AH_UNPLUGGED) {
1876 ath_dbg(common, ANY, "Device has been unplugged!\n");
1877 mutex_unlock(&sc->mutex);
1881 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1882 ath_dbg(common, ANY, "Device not present\n");
1883 mutex_unlock(&sc->mutex);
1887 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1892 ath9k_ps_wakeup(sc);
1893 spin_lock_bh(&sc->sc_pcu_lock);
1894 drain_txq = ath_drain_all_txq(sc);
1895 spin_unlock_bh(&sc->sc_pcu_lock);
1900 ath9k_ps_restore(sc);
1901 ieee80211_wake_queues(hw);
1904 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1905 mutex_unlock(&sc->mutex);
1908 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1910 struct ath_softc *sc = hw->priv;
1913 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1914 if (!ATH_TXQ_SETUP(sc, i))
1917 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1923 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1925 struct ath_softc *sc = hw->priv;
1926 struct ath_hw *ah = sc->sc_ah;
1927 struct ieee80211_vif *vif;
1928 struct ath_vif *avp;
1930 struct ath_tx_status ts;
1931 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1934 vif = sc->beacon.bslot[0];
1938 if (!vif->bss_conf.enable_beacon)
1941 avp = (void *)vif->drv_priv;
1943 if (!sc->beacon.tx_processed && !edma) {
1944 tasklet_disable(&sc->bcon_tasklet);
1947 if (!bf || !bf->bf_mpdu)
1950 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1951 if (status == -EINPROGRESS)
1954 sc->beacon.tx_processed = true;
1955 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1958 tasklet_enable(&sc->bcon_tasklet);
1961 return sc->beacon.tx_last;
1964 static int ath9k_get_stats(struct ieee80211_hw *hw,
1965 struct ieee80211_low_level_stats *stats)
1967 struct ath_softc *sc = hw->priv;
1968 struct ath_hw *ah = sc->sc_ah;
1969 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1971 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1972 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1973 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1974 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1978 static u32 fill_chainmask(u32 cap, u32 new)
1983 for (i = 0; cap && new; i++, cap >>= 1) {
1984 if (!(cap & BIT(0)))
1996 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
1998 if (AR_SREV_9300_20_OR_LATER(ah))
2001 switch (val & 0x7) {
2007 return (ah->caps.rx_chainmask == 1);
2013 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2015 struct ath_softc *sc = hw->priv;
2016 struct ath_hw *ah = sc->sc_ah;
2018 if (ah->caps.rx_chainmask != 1)
2021 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2024 sc->ant_rx = rx_ant;
2025 sc->ant_tx = tx_ant;
2027 if (ah->caps.rx_chainmask == 1)
2030 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2031 if (AR_SREV_9100(ah))
2032 ah->rxchainmask = 0x7;
2034 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2036 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2037 ath9k_reload_chainmask_settings(sc);
2042 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2044 struct ath_softc *sc = hw->priv;
2046 *tx_ant = sc->ant_tx;
2047 *rx_ant = sc->ant_rx;
2051 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2053 struct ath_softc *sc = hw->priv;
2054 set_bit(SC_OP_SCANNING, &sc->sc_flags);
2057 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2059 struct ath_softc *sc = hw->priv;
2060 clear_bit(SC_OP_SCANNING, &sc->sc_flags);
2063 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw,
2064 struct ieee80211_vif *vif,
2065 struct cfg80211_chan_def *chandef)
2067 struct ath_softc *sc = hw->priv;
2069 /* mac80211 does not support CSA in multi-if cases (yet) */
2070 if (WARN_ON(sc->csa_vif))
2076 struct ieee80211_ops ath9k_ops = {
2078 .start = ath9k_start,
2080 .add_interface = ath9k_add_interface,
2081 .change_interface = ath9k_change_interface,
2082 .remove_interface = ath9k_remove_interface,
2083 .config = ath9k_config,
2084 .configure_filter = ath9k_configure_filter,
2085 .sta_add = ath9k_sta_add,
2086 .sta_remove = ath9k_sta_remove,
2087 .sta_notify = ath9k_sta_notify,
2088 .conf_tx = ath9k_conf_tx,
2089 .bss_info_changed = ath9k_bss_info_changed,
2090 .set_key = ath9k_set_key,
2091 .get_tsf = ath9k_get_tsf,
2092 .set_tsf = ath9k_set_tsf,
2093 .reset_tsf = ath9k_reset_tsf,
2094 .ampdu_action = ath9k_ampdu_action,
2095 .get_survey = ath9k_get_survey,
2096 .rfkill_poll = ath9k_rfkill_poll_state,
2097 .set_coverage_class = ath9k_set_coverage_class,
2098 .flush = ath9k_flush,
2099 .tx_frames_pending = ath9k_tx_frames_pending,
2100 .tx_last_beacon = ath9k_tx_last_beacon,
2101 .release_buffered_frames = ath9k_release_buffered_frames,
2102 .get_stats = ath9k_get_stats,
2103 .set_antenna = ath9k_set_antenna,
2104 .get_antenna = ath9k_get_antenna,
2106 #ifdef CONFIG_ATH9K_WOW
2107 .suspend = ath9k_suspend,
2108 .resume = ath9k_resume,
2109 .set_wakeup = ath9k_set_wakeup,
2112 #ifdef CONFIG_ATH9K_DEBUGFS
2113 .get_et_sset_count = ath9k_get_et_sset_count,
2114 .get_et_stats = ath9k_get_et_stats,
2115 .get_et_strings = ath9k_get_et_strings,
2118 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
2119 .sta_add_debugfs = ath9k_sta_add_debugfs,
2121 .sw_scan_start = ath9k_sw_scan_start,
2122 .sw_scan_complete = ath9k_sw_scan_complete,
2123 .channel_switch_beacon = ath9k_channel_switch_beacon,