]> Pileus Git - ~andy/linux/blob - drivers/gpu/drm/radeon/atombios_i2c.c
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
[~andy/linux] / drivers / gpu / drm / radeon / atombios_i2c.c
1 /*
2  * Copyright 2011 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Alex Deucher
23  *
24  */
25 #include <drm/drmP.h>
26 #include <drm/radeon_drm.h>
27 #include "radeon.h"
28 #include "atom.h"
29
30 #define TARGET_HW_I2C_CLOCK 50
31
32 /* these are a limitation of ProcessI2cChannelTransaction not the hw */
33 #define ATOM_MAX_HW_I2C_WRITE 3
34 #define ATOM_MAX_HW_I2C_READ  255
35
36 static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
37                                  u8 slave_addr, u8 flags,
38                                  u8 *buf, u8 num)
39 {
40         struct drm_device *dev = chan->dev;
41         struct radeon_device *rdev = dev->dev_private;
42         PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43         int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
44         unsigned char *base;
45         u16 out = cpu_to_le16(0);
46
47         memset(&args, 0, sizeof(args));
48
49         base = (unsigned char *)rdev->mode_info.atom_context->scratch;
50
51         if (flags & HW_I2C_WRITE) {
52                 if (num > ATOM_MAX_HW_I2C_WRITE) {
53                         DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
54                         return -EINVAL;
55                 }
56                 if (buf == NULL)
57                         args.ucRegIndex = 0;
58                 else
59                         args.ucRegIndex = buf[0];
60                 if (num)
61                         num--;
62                 if (num)
63                         memcpy(&out, &buf[1], num);
64                 args.lpI2CDataOut = cpu_to_le16(out);
65         } else {
66                 if (num > ATOM_MAX_HW_I2C_READ) {
67                         DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
68                         return -EINVAL;
69                 }
70                 args.ucRegIndex = 0;
71                 args.lpI2CDataOut = 0;
72         }
73
74         args.ucFlag = flags;
75         args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
76         args.ucTransBytes = num;
77         args.ucSlaveAddr = slave_addr << 1;
78         args.ucLineNumber = chan->rec.i2c_id;
79
80         atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
81
82         /* error */
83         if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
84                 DRM_DEBUG_KMS("hw_i2c error\n");
85                 return -EIO;
86         }
87
88         if (!(flags & HW_I2C_WRITE))
89                 radeon_atom_copy_swap(buf, base, num, false);
90
91         return 0;
92 }
93
94 int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
95                             struct i2c_msg *msgs, int num)
96 {
97         struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
98         struct i2c_msg *p;
99         int i, remaining, current_count, buffer_offset, max_bytes, ret;
100         u8 flags;
101
102         /* check for bus probe */
103         p = &msgs[0];
104         if ((num == 1) && (p->len == 0)) {
105                 ret = radeon_process_i2c_ch(i2c,
106                                             p->addr, HW_I2C_WRITE,
107                                             NULL, 0);
108                 if (ret)
109                         return ret;
110                 else
111                         return num;
112         }
113
114         for (i = 0; i < num; i++) {
115                 p = &msgs[i];
116                 remaining = p->len;
117                 buffer_offset = 0;
118                 /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
119                 if (p->flags & I2C_M_RD) {
120                         max_bytes = ATOM_MAX_HW_I2C_READ;
121                         flags = HW_I2C_READ;
122                 } else {
123                         max_bytes = ATOM_MAX_HW_I2C_WRITE;
124                         flags = HW_I2C_WRITE;
125                 }
126                 while (remaining) {
127                         if (remaining > max_bytes)
128                                 current_count = max_bytes;
129                         else
130                                 current_count = remaining;
131                         ret = radeon_process_i2c_ch(i2c,
132                                                     p->addr, flags,
133                                                     &p->buf[buffer_offset], current_count);
134                         if (ret)
135                                 return ret;
136                         remaining -= current_count;
137                         buffer_offset += current_count;
138                 }
139         }
140
141         return num;
142 }
143
144 u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
145 {
146         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
147 }
148