Pileus Git - ~andy/linux/blob - drivers/gpu/drm/nouveau/core/subdev/clock/base.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/option.h>
  26
  27 #include <subdev/clock.h>
  28 #include <subdev/therm.h>
  29 #include <subdev/volt.h>
  30 #include <subdev/fb.h>
  31
  32 #include <subdev/bios.h>
  33 #include <subdev/bios/boost.h>
  34 #include <subdev/bios/cstep.h>
  35 #include <subdev/bios/perf.h>
  36
  37 /******************************************************************************
  38  * misc
  39  *****************************************************************************/
  40 static u32
  41 nouveau_clock_adjust(struct nouveau_clock *clk, bool adjust,
  42                      u8 pstate, u8 domain, u32 input)
  43 {
  44         struct nouveau_bios *bios = nouveau_bios(clk);
  45         struct nvbios_boostE boostE;
  46         u8  ver, hdr, cnt, len;
  47         u16 data;
  48
  49         data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
  50         if (data) {
  51                 struct nvbios_boostS boostS;
  52                 u8  idx = 0, sver, shdr;
  53                 u16 subd;
  54
  55                 input = max(boostE.min, input);
  56                 input = min(boostE.max, input);
  57                 do {
  58                         sver = ver;
  59                         shdr = hdr;
  60                         subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
  61                                               cnt, len, &boostS);
  62                         if (subd && boostS.domain == domain) {
  63                                 if (adjust)
  64                                         input = input * boostS.percent / 100;
  65                                 input = max(boostS.min, input);
  66                                 input = min(boostS.max, input);
  67                                 break;
  68                         }
  69                 } while (subd);
  70         }
  71
  72         return input;
  73 }
  74
  75 /******************************************************************************
  76  * C-States
  77  *****************************************************************************/
  78 static int
  79 nouveau_cstate_prog(struct nouveau_clock *clk,
  80                     struct nouveau_pstate *pstate, int cstatei)
  81 {
  82         struct nouveau_therm *ptherm = nouveau_therm(clk);
  83         struct nouveau_volt *volt = nouveau_volt(clk);
  84         struct nouveau_cstate *cstate;
  85         int ret;
  86
  87         if (!list_empty(&pstate->list)) {
  88                 cstate = list_entry(pstate->list.prev, typeof(*cstate), head);
  89         } else {
  90                 cstate = &pstate->base;
  91         }
  92
  93         ret = nouveau_therm_cstate(ptherm, pstate->fanspeed, +1);
  94         if (ret && ret != -ENODEV) {
  95                 nv_error(clk, "failed to raise fan speed: %d\n", ret);
  96                 return ret;
  97         }
  98
  99         ret = volt->set_id(volt, cstate->voltage, +1);
 100         if (ret && ret != -ENODEV) {
 101                 nv_error(clk, "failed to raise voltage: %d\n", ret);
 102                 return ret;
 103         }
 104
 105         ret = clk->calc(clk, cstate);
 106         if (ret == 0) {
 107                 ret = clk->prog(clk);
 108                 clk->tidy(clk);
 109         }
 110
 111         ret = volt->set_id(volt, cstate->voltage, -1);
 112         if (ret && ret != -ENODEV)
 113                 nv_error(clk, "failed to lower voltage: %d\n", ret);
 114
 115         ret = nouveau_therm_cstate(ptherm, pstate->fanspeed, -1);
 116         if (ret && ret != -ENODEV)
 117                 nv_error(clk, "failed to lower fan speed: %d\n", ret);
 118
 119         return 0;
 120 }
 121
 122 static void
 123 nouveau_cstate_del(struct nouveau_cstate *cstate)
 124 {
 125         list_del(&cstate->head);
 126         kfree(cstate);
 127 }
 128
 129 static int
 130 nouveau_cstate_new(struct nouveau_clock *clk, int idx,
 131                    struct nouveau_pstate *pstate)
 132 {
 133         struct nouveau_bios *bios = nouveau_bios(clk);
 134         struct nouveau_clocks *domain = clk->domains;
 135         struct nouveau_cstate *cstate = NULL;
 136         struct nvbios_cstepX cstepX;
 137         u8  ver, hdr;
 138         u16 data;
 139
 140         data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
 141         if (!data)
 142                 return -ENOENT;
 143
 144         cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
 145         if (!cstate)
 146                 return -ENOMEM;
 147
 148         *cstate = pstate->base;
 149         cstate->voltage = cstepX.voltage;
 150
 151         while (domain && domain->name != nv_clk_src_max) {
 152                 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
 153                         u32 freq = nouveau_clock_adjust(clk, true,
 154                                                         pstate->pstate,
 155                                                         domain->bios,
 156                                                         cstepX.freq);
 157                         cstate->domain[domain->name] = freq;
 158                 }
 159                 domain++;
 160         }
 161
 162         list_add(&cstate->head, &pstate->list);
 163         return 0;
 164 }
 165
 166 /******************************************************************************
 167  * P-States
 168  *****************************************************************************/
 169 static int
 170 nouveau_pstate_prog(struct nouveau_clock *clk, int pstatei)
 171 {
 172         struct nouveau_fb *pfb = nouveau_fb(clk);
 173         struct nouveau_pstate *pstate;
 174         int ret, idx = 0;
 175
 176         list_for_each_entry(pstate, &clk->states, head) {
 177                 if (idx++ == pstatei)
 178                         break;
 179         }
 180
 181         nv_debug(clk, "setting performance state %d\n", pstatei);
 182         clk->pstate = pstatei;
 183
 184         if (pfb->ram->calc) {
 185                 ret = pfb->ram->calc(pfb, pstate->base.domain[nv_clk_src_mem]);
 186                 if (ret == 0)
 187                         ret = pfb->ram->prog(pfb);
 188                 pfb->ram->tidy(pfb);
 189         }
 190
 191         return nouveau_cstate_prog(clk, pstate, 0);
 192 }
 193
 194 static int
 195 nouveau_pstate_calc(struct nouveau_clock *clk)
 196 {
 197         int pstate, ret = 0;
 198
 199         nv_trace(clk, "P %d U %d A %d T %d D %d\n", clk->pstate,
 200                  clk->ustate, clk->astate, clk->tstate, clk->dstate);
 201
 202         if (clk->state_nr && clk->ustate != -1) {
 203                 pstate = (clk->ustate < 0) ? clk->astate : clk->ustate;
 204                 pstate = min(pstate, clk->state_nr - 1 - clk->tstate);
 205                 pstate = max(pstate, clk->dstate);
 206         } else {
 207                 pstate = clk->pstate = -1;
 208         }
 209
 210         nv_trace(clk, "-> %d\n", pstate);
 211         if (pstate != clk->pstate)
 212                 ret = nouveau_pstate_prog(clk, pstate);
 213         return ret;
 214 }
 215
 216 static void
 217 nouveau_pstate_info(struct nouveau_clock *clk, struct nouveau_pstate *pstate)
 218 {
 219         struct nouveau_clocks *clock = clk->domains - 1;
 220         struct nouveau_cstate *cstate;
 221         char info[3][32] = { "", "", "" };
 222         char name[4] = "--";
 223         int i = -1;
 224
 225         if (pstate->pstate != 0xff)
 226                 snprintf(name, sizeof(name), "%02x", pstate->pstate);
 227
 228         while ((++clock)->name != nv_clk_src_max) {
 229                 u32 lo = pstate->base.domain[clock->name];
 230                 u32 hi = lo;
 231                 if (hi == 0)
 232                         continue;
 233
 234                 nv_debug(clk, "%02x: %10d KHz\n", clock->name, lo);
 235                 list_for_each_entry(cstate, &pstate->list, head) {
 236                         u32 freq = cstate->domain[clock->name];
 237                         lo = min(lo, freq);
 238                         hi = max(hi, freq);
 239                         nv_debug(clk, "%10d KHz\n", freq);
 240                 }
 241
 242                 if (clock->mname && ++i < ARRAY_SIZE(info)) {
 243                         lo /= clock->mdiv;
 244                         hi /= clock->mdiv;
 245                         if (lo == hi) {
 246                                 snprintf(info[i], sizeof(info[i]), "%s %d MHz",
 247                                          clock->mname, lo);
 248                         } else {
 249                                 snprintf(info[i], sizeof(info[i]),
 250                                          "%s %d-%d MHz", clock->mname, lo, hi);
 251                         }
 252                 }
 253         }
 254
 255         nv_info(clk, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
 256 }
 257
 258 static void
 259 nouveau_pstate_del(struct nouveau_pstate *pstate)
 260 {
 261         struct nouveau_cstate *cstate, *temp;
 262
 263         list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
 264                 nouveau_cstate_del(cstate);
 265         }
 266
 267         list_del(&pstate->head);
 268         kfree(pstate);
 269 }
 270
 271 static int
 272 nouveau_pstate_new(struct nouveau_clock *clk, int idx)
 273 {
 274         struct nouveau_bios *bios = nouveau_bios(clk);
 275         struct nouveau_clocks *domain = clk->domains - 1;
 276         struct nouveau_pstate *pstate;
 277         struct nouveau_cstate *cstate;
 278         struct nvbios_cstepE cstepE;
 279         struct nvbios_perfE perfE;
 280         u8  ver, hdr, cnt, len;
 281         u16 data;
 282
 283         data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
 284         if (!data)
 285                 return -EINVAL;
 286         if (perfE.pstate == 0xff)
 287                 return 0;
 288
 289         pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
 290         cstate = &pstate->base;
 291         if (!pstate)
 292                 return -ENOMEM;
 293
 294         INIT_LIST_HEAD(&pstate->list);
 295
 296         pstate->pstate = perfE.pstate;
 297         pstate->fanspeed = perfE.fanspeed;
 298         cstate->voltage = perfE.voltage;
 299         cstate->domain[nv_clk_src_core] = perfE.core;
 300         cstate->domain[nv_clk_src_shader] = perfE.shader;
 301         cstate->domain[nv_clk_src_mem] = perfE.memory;
 302         cstate->domain[nv_clk_src_vdec] = perfE.vdec;
 303         cstate->domain[nv_clk_src_dom6] = perfE.disp;
 304
 305         while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
 306                 struct nvbios_perfS perfS;
 307                 u8  sver = ver, shdr = hdr;
 308                 u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
 309                                           &sver, &shdr, cnt, len, &perfS);
 310                 if (perfSe == 0 || sver != 0x40)
 311                         continue;
 312
 313                 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
 314                         perfS.v40.freq = nouveau_clock_adjust(clk, false,
 315                                                               pstate->pstate,
 316                                                               domain->bios,
 317                                                               perfS.v40.freq);
 318                 }
 319
 320                 cstate->domain[domain->name] = perfS.v40.freq;
 321         }
 322
 323         data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
 324         if (data) {
 325                 int idx = cstepE.index;
 326                 do {
 327                         nouveau_cstate_new(clk, idx, pstate);
 328                 } while(idx--);
 329         }
 330
 331         nouveau_pstate_info(clk, pstate);
 332         list_add_tail(&pstate->head, &clk->states);
 333         clk->state_nr++;
 334         return 0;
 335 }
 336
 337 /******************************************************************************
 338  * Adjustment triggers
 339  *****************************************************************************/
 340 static int
 341 nouveau_clock_ustate_update(struct nouveau_clock *clk, int req)
 342 {
 343         struct nouveau_pstate *pstate;
 344         int i = 0;
 345
 346         /* YKW repellant */
 347         return -ENOSYS;
 348
 349         if (req != -1 && req != -2) {
 350                 list_for_each_entry(pstate, &clk->states, head) {
 351                         if (pstate->pstate == req)
 352                                 break;
 353                         i++;
 354                 }
 355
 356                 if (pstate->pstate != req)
 357                         return -EINVAL;
 358                 req = i;
 359         }
 360
 361         clk->ustate = req;
 362         return 0;
 363 }
 364
 365 int
 366 nouveau_clock_ustate(struct nouveau_clock *clk, int req)
 367 {
 368         int ret = nouveau_clock_ustate_update(clk, req);
 369         if (ret)
 370                 return ret;
 371         return nouveau_pstate_calc(clk);
 372 }
 373
 374 int
 375 nouveau_clock_astate(struct nouveau_clock *clk, int req, int rel)
 376 {
 377         if (!rel) clk->astate  = req;
 378         if ( rel) clk->astate += rel;
 379         clk->astate = min(clk->astate, clk->state_nr - 1);
 380         clk->astate = max(clk->astate, 0);
 381         return nouveau_pstate_calc(clk);
 382 }
 383
 384 int
 385 nouveau_clock_tstate(struct nouveau_clock *clk, int req, int rel)
 386 {
 387         if (!rel) clk->tstate  = req;
 388         if ( rel) clk->tstate += rel;
 389         clk->tstate = min(clk->tstate, 0);
 390         clk->tstate = max(clk->tstate, -(clk->state_nr - 1));
 391         return nouveau_pstate_calc(clk);
 392 }
 393
 394 int
 395 nouveau_clock_dstate(struct nouveau_clock *clk, int req, int rel)
 396 {
 397         if (!rel) clk->dstate  = req;
 398         if ( rel) clk->dstate += rel;
 399         clk->dstate = min(clk->dstate, clk->state_nr - 1);
 400         clk->dstate = max(clk->dstate, 0);
 401         return nouveau_pstate_calc(clk);
 402 }
 403
 404 /******************************************************************************
 405  * subdev base class implementation
 406  *****************************************************************************/
 407 int
 408 _nouveau_clock_init(struct nouveau_object *object)
 409 {
 410         struct nouveau_clock *clk = (void *)object;
 411         struct nouveau_clocks *clock = clk->domains;
 412         int ret;
 413
 414         memset(&clk->bstate, 0x00, sizeof(clk->bstate));
 415         INIT_LIST_HEAD(&clk->bstate.list);
 416         clk->bstate.pstate = 0xff;
 417
 418         while (clock->name != nv_clk_src_max) {
 419                 ret = clk->read(clk, clock->name);
 420                 if (ret < 0) {
 421                         nv_error(clk, "%02x freq unknown\n", clock->name);
 422                         return ret;
 423                 }
 424                 clk->bstate.base.domain[clock->name] = ret;
 425                 clock++;
 426         }
 427
 428         nouveau_pstate_info(clk, &clk->bstate);
 429
 430         clk->astate = clk->state_nr - 1;
 431         clk->tstate = 0;
 432         clk->dstate = 0;
 433         clk->pstate = -1;
 434         nouveau_pstate_calc(clk);
 435         return 0;
 436 }
 437
 438 void
 439 _nouveau_clock_dtor(struct nouveau_object *object)
 440 {
 441         struct nouveau_clock *clk = (void *)object;
 442         struct nouveau_pstate *pstate, *temp;
 443
 444         list_for_each_entry_safe(pstate, temp, &clk->states, head) {
 445                 nouveau_pstate_del(pstate);
 446         }
 447
 448         nouveau_subdev_destroy(&clk->base);
 449 }
 450
 451 int
 452 nouveau_clock_create_(struct nouveau_object *parent,
 453                       struct nouveau_object *engine,
 454                       struct nouveau_oclass *oclass,
 455                       struct nouveau_clocks *clocks,
 456                       int length, void **object)
 457 {
 458         struct nouveau_device *device = nv_device(parent);
 459         struct nouveau_clock *clk;
 460         int ret, idx, arglen;
 461         const char *mode;
 462
 463         ret = nouveau_subdev_create_(parent, engine, oclass, 0, "CLK",
 464                                      "clock", length, object);
 465         clk = *object;
 466         if (ret)
 467                 return ret;
 468
 469         INIT_LIST_HEAD(&clk->states);
 470         clk->domains = clocks;
 471         clk->ustate = -1;
 472
 473         idx = 0;
 474         do {
 475                 ret = nouveau_pstate_new(clk, idx++);
 476         } while (ret == 0);
 477
 478         mode = nouveau_stropt(device->cfgopt, "NvClkMode", &arglen);
 479         if (mode) {
 480                 if (!strncasecmpz(mode, "disabled", arglen)) {
 481                         clk->ustate = -1;
 482                 } else {
 483                         char save = mode[arglen];
 484                         long v;
 485
 486                         ((char *)mode)[arglen] = '\0';
 487                         if (!kstrtol(mode, 0, &v))
 488                                 nouveau_clock_ustate_update(clk, v);
 489                         ((char *)mode)[arglen] = save;
 490                 }
 491         }
 492
 493         return 0;
 494 }