Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/i915_gem_execbuffer.c

   1 /*
   2  * Copyright © 2008,2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/i915_drm.h>
  31 #include "i915_drv.h"
  32 #include "i915_trace.h"
  33 #include "intel_drv.h"
  34 #include <linux/dma_remapping.h>
  35
  36 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
  37 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
  38
  39 struct eb_vmas {
  40         struct list_head vmas;
  41         int and;
  42         union {
  43                 struct i915_vma *lut[0];
  44                 struct hlist_head buckets[0];
  45         };
  46 };
  47
  48 static struct eb_vmas *
  49 eb_create(struct drm_i915_gem_execbuffer2 *args)
  50 {
  51         struct eb_vmas *eb = NULL;
  52
  53         if (args->flags & I915_EXEC_HANDLE_LUT) {
  54                 unsigned size = args->buffer_count;
  55                 size *= sizeof(struct i915_vma *);
  56                 size += sizeof(struct eb_vmas);
  57                 eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
  58         }
  59
  60         if (eb == NULL) {
  61                 unsigned size = args->buffer_count;
  62                 unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
  63                 BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
  64                 while (count > 2*size)
  65                         count >>= 1;
  66                 eb = kzalloc(count*sizeof(struct hlist_head) +
  67                              sizeof(struct eb_vmas),
  68                              GFP_TEMPORARY);
  69                 if (eb == NULL)
  70                         return eb;
  71
  72                 eb->and = count - 1;
  73         } else
  74                 eb->and = -args->buffer_count;
  75
  76         INIT_LIST_HEAD(&eb->vmas);
  77         return eb;
  78 }
  79
  80 static void
  81 eb_reset(struct eb_vmas *eb)
  82 {
  83         if (eb->and >= 0)
  84                 memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
  85 }
  86
  87 static int
  88 eb_lookup_vmas(struct eb_vmas *eb,
  89                struct drm_i915_gem_exec_object2 *exec,
  90                const struct drm_i915_gem_execbuffer2 *args,
  91                struct i915_address_space *vm,
  92                struct drm_file *file)
  93 {
  94         struct drm_i915_gem_object *obj;
  95         struct list_head objects;
  96         int i, ret = 0;
  97
  98         INIT_LIST_HEAD(&objects);
  99         spin_lock(&file->table_lock);
 100         /* Grab a reference to the object and release the lock so we can lookup
 101          * or create the VMA without using GFP_ATOMIC */
 102         for (i = 0; i < args->buffer_count; i++) {
 103                 obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
 104                 if (obj == NULL) {
 105                         spin_unlock(&file->table_lock);
 106                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 107                                    exec[i].handle, i);
 108                         ret = -ENOENT;
 109                         goto out;
 110                 }
 111
 112                 if (!list_empty(&obj->obj_exec_link)) {
 113                         spin_unlock(&file->table_lock);
 114                         DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
 115                                    obj, exec[i].handle, i);
 116                         ret = -EINVAL;
 117                         goto out;
 118                 }
 119
 120                 drm_gem_object_reference(&obj->base);
 121                 list_add_tail(&obj->obj_exec_link, &objects);
 122         }
 123         spin_unlock(&file->table_lock);
 124
 125         i = 0;
 126         list_for_each_entry(obj, &objects, obj_exec_link) {
 127                 struct i915_vma *vma;
 128
 129                 /*
 130                  * NOTE: We can leak any vmas created here when something fails
 131                  * later on. But that's no issue since vma_unbind can deal with
 132                  * vmas which are not actually bound. And since only
 133                  * lookup_or_create exists as an interface to get at the vma
 134                  * from the (obj, vm) we don't run the risk of creating
 135                  * duplicated vmas for the same vm.
 136                  */
 137                 vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
 138                 if (IS_ERR(vma)) {
 139                         DRM_DEBUG("Failed to lookup VMA\n");
 140                         ret = PTR_ERR(vma);
 141                         goto out;
 142                 }
 143
 144                 list_add_tail(&vma->exec_list, &eb->vmas);
 145
 146                 vma->exec_entry = &exec[i];
 147                 if (eb->and < 0) {
 148                         eb->lut[i] = vma;
 149                 } else {
 150                         uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
 151                         vma->exec_handle = handle;
 152                         hlist_add_head(&vma->exec_node,
 153                                        &eb->buckets[handle & eb->and]);
 154                 }
 155                 ++i;
 156         }
 157
 158
 159 out:
 160         while (!list_empty(&objects)) {
 161                 obj = list_first_entry(&objects,
 162                                        struct drm_i915_gem_object,
 163                                        obj_exec_link);
 164                 list_del_init(&obj->obj_exec_link);
 165                 if (ret)
 166                         drm_gem_object_unreference(&obj->base);
 167         }
 168         return ret;
 169 }
 170
 171 static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
 172 {
 173         if (eb->and < 0) {
 174                 if (handle >= -eb->and)
 175                         return NULL;
 176                 return eb->lut[handle];
 177         } else {
 178                 struct hlist_head *head;
 179                 struct hlist_node *node;
 180
 181                 head = &eb->buckets[handle & eb->and];
 182                 hlist_for_each(node, head) {
 183                         struct i915_vma *vma;
 184
 185                         vma = hlist_entry(node, struct i915_vma, exec_node);
 186                         if (vma->exec_handle == handle)
 187                                 return vma;
 188                 }
 189                 return NULL;
 190         }
 191 }
 192
 193 static void
 194 i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
 195 {
 196         struct drm_i915_gem_exec_object2 *entry;
 197         struct drm_i915_gem_object *obj = vma->obj;
 198
 199         if (!drm_mm_node_allocated(&vma->node))
 200                 return;
 201
 202         entry = vma->exec_entry;
 203
 204         if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
 205                 i915_gem_object_unpin_fence(obj);
 206
 207         if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 208                 i915_gem_object_unpin(obj);
 209
 210         entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
 211 }
 212
 213 static void eb_destroy(struct eb_vmas *eb)
 214 {
 215         while (!list_empty(&eb->vmas)) {
 216                 struct i915_vma *vma;
 217
 218                 vma = list_first_entry(&eb->vmas,
 219                                        struct i915_vma,
 220                                        exec_list);
 221                 list_del_init(&vma->exec_list);
 222                 i915_gem_execbuffer_unreserve_vma(vma);
 223                 drm_gem_object_unreference(&vma->obj->base);
 224         }
 225         kfree(eb);
 226 }
 227
 228 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
 229 {
 230         return (HAS_LLC(obj->base.dev) ||
 231                 obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
 232                 !obj->map_and_fenceable ||
 233                 obj->cache_level != I915_CACHE_NONE);
 234 }
 235
 236 static int
 237 relocate_entry_cpu(struct drm_i915_gem_object *obj,
 238                    struct drm_i915_gem_relocation_entry *reloc)
 239 {
 240         struct drm_device *dev = obj->base.dev;
 241         uint32_t page_offset = offset_in_page(reloc->offset);
 242         char *vaddr;
 243         int ret = -EINVAL;
 244
 245         ret = i915_gem_object_set_to_cpu_domain(obj, true);
 246         if (ret)
 247                 return ret;
 248
 249         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 250                                 reloc->offset >> PAGE_SHIFT));
 251         *(uint32_t *)(vaddr + page_offset) = reloc->delta;
 252
 253         if (INTEL_INFO(dev)->gen >= 8) {
 254                 page_offset = offset_in_page(page_offset + sizeof(uint32_t));
 255
 256                 if (page_offset == 0) {
 257                         kunmap_atomic(vaddr);
 258                         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 259                             (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT));
 260                 }
 261
 262                 *(uint32_t *)(vaddr + page_offset) = 0;
 263         }
 264
 265         kunmap_atomic(vaddr);
 266
 267         return 0;
 268 }
 269
 270 static int
 271 relocate_entry_gtt(struct drm_i915_gem_object *obj,
 272                    struct drm_i915_gem_relocation_entry *reloc)
 273 {
 274         struct drm_device *dev = obj->base.dev;
 275         struct drm_i915_private *dev_priv = dev->dev_private;
 276         uint32_t __iomem *reloc_entry;
 277         void __iomem *reloc_page;
 278         int ret = -EINVAL;
 279
 280         ret = i915_gem_object_set_to_gtt_domain(obj, true);
 281         if (ret)
 282                 return ret;
 283
 284         ret = i915_gem_object_put_fence(obj);
 285         if (ret)
 286                 return ret;
 287
 288         /* Map the page containing the relocation we're going to perform.  */
 289         reloc->offset += i915_gem_obj_ggtt_offset(obj);
 290         reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 291                         reloc->offset & PAGE_MASK);
 292         reloc_entry = (uint32_t __iomem *)
 293                 (reloc_page + offset_in_page(reloc->offset));
 294         iowrite32(reloc->delta, reloc_entry);
 295
 296         if (INTEL_INFO(dev)->gen >= 8) {
 297                 reloc_entry += 1;
 298
 299                 if (offset_in_page(reloc->offset + sizeof(uint32_t)) == 0) {
 300                         io_mapping_unmap_atomic(reloc_page);
 301                         reloc_page = io_mapping_map_atomic_wc(
 302                                         dev_priv->gtt.mappable,
 303                                         reloc->offset + sizeof(uint32_t));
 304                         reloc_entry = reloc_page;
 305                 }
 306
 307                 iowrite32(0, reloc_entry);
 308         }
 309
 310         io_mapping_unmap_atomic(reloc_page);
 311
 312         return 0;
 313 }
 314
 315 static int
 316 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 317                                    struct eb_vmas *eb,
 318                                    struct drm_i915_gem_relocation_entry *reloc,
 319                                    struct i915_address_space *vm)
 320 {
 321         struct drm_device *dev = obj->base.dev;
 322         struct drm_gem_object *target_obj;
 323         struct drm_i915_gem_object *target_i915_obj;
 324         struct i915_vma *target_vma;
 325         uint32_t target_offset;
 326         int ret = -EINVAL;
 327
 328         /* we've already hold a reference to all valid objects */
 329         target_vma = eb_get_vma(eb, reloc->target_handle);
 330         if (unlikely(target_vma == NULL))
 331                 return -ENOENT;
 332         target_i915_obj = target_vma->obj;
 333         target_obj = &target_vma->obj->base;
 334
 335         target_offset = target_vma->node.start;
 336
 337         /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
 338          * pipe_control writes because the gpu doesn't properly redirect them
 339          * through the ppgtt for non_secure batchbuffers. */
 340         if (unlikely(IS_GEN6(dev) &&
 341             reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
 342             !target_i915_obj->has_global_gtt_mapping)) {
 343                 i915_gem_gtt_bind_object(target_i915_obj,
 344                                          target_i915_obj->cache_level);
 345         }
 346
 347         /* Validate that the target is in a valid r/w GPU domain */
 348         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
 349                 DRM_DEBUG("reloc with multiple write domains: "
 350                           "obj %p target %d offset %d "
 351                           "read %08x write %08x",
 352                           obj, reloc->target_handle,
 353                           (int) reloc->offset,
 354                           reloc->read_domains,
 355                           reloc->write_domain);
 356                 return ret;
 357         }
 358         if (unlikely((reloc->write_domain | reloc->read_domains)
 359                      & ~I915_GEM_GPU_DOMAINS)) {
 360                 DRM_DEBUG("reloc with read/write non-GPU domains: "
 361                           "obj %p target %d offset %d "
 362                           "read %08x write %08x",
 363                           obj, reloc->target_handle,
 364                           (int) reloc->offset,
 365                           reloc->read_domains,
 366                           reloc->write_domain);
 367                 return ret;
 368         }
 369
 370         target_obj->pending_read_domains |= reloc->read_domains;
 371         target_obj->pending_write_domain |= reloc->write_domain;
 372
 373         /* If the relocation already has the right value in it, no
 374          * more work needs to be done.
 375          */
 376         if (target_offset == reloc->presumed_offset)
 377                 return 0;
 378
 379         /* Check that the relocation address is valid... */
 380         if (unlikely(reloc->offset >
 381                 obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) {
 382                 DRM_DEBUG("Relocation beyond object bounds: "
 383                           "obj %p target %d offset %d size %d.\n",
 384                           obj, reloc->target_handle,
 385                           (int) reloc->offset,
 386                           (int) obj->base.size);
 387                 return ret;
 388         }
 389         if (unlikely(reloc->offset & 3)) {
 390                 DRM_DEBUG("Relocation not 4-byte aligned: "
 391                           "obj %p target %d offset %d.\n",
 392                           obj, reloc->target_handle,
 393                           (int) reloc->offset);
 394                 return ret;
 395         }
 396
 397         /* We can't wait for rendering with pagefaults disabled */
 398         if (obj->active && in_atomic())
 399                 return -EFAULT;
 400
 401         reloc->delta += target_offset;
 402         if (use_cpu_reloc(obj))
 403                 ret = relocate_entry_cpu(obj, reloc);
 404         else
 405                 ret = relocate_entry_gtt(obj, reloc);
 406
 407         if (ret)
 408                 return ret;
 409
 410         /* and update the user's relocation entry */
 411         reloc->presumed_offset = target_offset;
 412
 413         return 0;
 414 }
 415
 416 static int
 417 i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
 418                                  struct eb_vmas *eb)
 419 {
 420 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
 421         struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
 422         struct drm_i915_gem_relocation_entry __user *user_relocs;
 423         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 424         int remain, ret;
 425
 426         user_relocs = to_user_ptr(entry->relocs_ptr);
 427
 428         remain = entry->relocation_count;
 429         while (remain) {
 430                 struct drm_i915_gem_relocation_entry *r = stack_reloc;
 431                 int count = remain;
 432                 if (count > ARRAY_SIZE(stack_reloc))
 433                         count = ARRAY_SIZE(stack_reloc);
 434                 remain -= count;
 435
 436                 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
 437                         return -EFAULT;
 438
 439                 do {
 440                         u64 offset = r->presumed_offset;
 441
 442                         ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
 443                                                                  vma->vm);
 444                         if (ret)
 445                                 return ret;
 446
 447                         if (r->presumed_offset != offset &&
 448                             __copy_to_user_inatomic(&user_relocs->presumed_offset,
 449                                                     &r->presumed_offset,
 450                                                     sizeof(r->presumed_offset))) {
 451                                 return -EFAULT;
 452                         }
 453
 454                         user_relocs++;
 455                         r++;
 456                 } while (--count);
 457         }
 458
 459         return 0;
 460 #undef N_RELOC
 461 }
 462
 463 static int
 464 i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
 465                                       struct eb_vmas *eb,
 466                                       struct drm_i915_gem_relocation_entry *relocs)
 467 {
 468         const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 469         int i, ret;
 470
 471         for (i = 0; i < entry->relocation_count; i++) {
 472                 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
 473                                                          vma->vm);
 474                 if (ret)
 475                         return ret;
 476         }
 477
 478         return 0;
 479 }
 480
 481 static int
 482 i915_gem_execbuffer_relocate(struct eb_vmas *eb)
 483 {
 484         struct i915_vma *vma;
 485         int ret = 0;
 486
 487         /* This is the fast path and we cannot handle a pagefault whilst
 488          * holding the struct mutex lest the user pass in the relocations
 489          * contained within a mmaped bo. For in such a case we, the page
 490          * fault handler would call i915_gem_fault() and we would try to
 491          * acquire the struct mutex again. Obviously this is bad and so
 492          * lockdep complains vehemently.
 493          */
 494         pagefault_disable();
 495         list_for_each_entry(vma, &eb->vmas, exec_list) {
 496                 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
 497                 if (ret)
 498                         break;
 499         }
 500         pagefault_enable();
 501
 502         return ret;
 503 }
 504
 505 static int
 506 need_reloc_mappable(struct i915_vma *vma)
 507 {
 508         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 509         return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
 510                 i915_is_ggtt(vma->vm);
 511 }
 512
 513 static int
 514 i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
 515                                 struct intel_ring_buffer *ring,
 516                                 bool *need_reloc)
 517 {
 518         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 519         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 520         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 521         bool need_fence, need_mappable;
 522         struct drm_i915_gem_object *obj = vma->obj;
 523         int ret;
 524
 525         need_fence =
 526                 has_fenced_gpu_access &&
 527                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 528                 obj->tiling_mode != I915_TILING_NONE;
 529         need_mappable = need_fence || need_reloc_mappable(vma);
 530
 531         ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
 532                                   false);
 533         if (ret)
 534                 return ret;
 535
 536         entry->flags |= __EXEC_OBJECT_HAS_PIN;
 537
 538         if (has_fenced_gpu_access) {
 539                 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
 540                         ret = i915_gem_object_get_fence(obj);
 541                         if (ret)
 542                                 return ret;
 543
 544                         if (i915_gem_object_pin_fence(obj))
 545                                 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 546
 547                         obj->pending_fenced_gpu_access = true;
 548                 }
 549         }
 550
 551         /* Ensure ppgtt mapping exists if needed */
 552         if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
 553                 i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
 554                                        obj, obj->cache_level);
 555
 556                 obj->has_aliasing_ppgtt_mapping = 1;
 557         }
 558
 559         if (entry->offset != vma->node.start) {
 560                 entry->offset = vma->node.start;
 561                 *need_reloc = true;
 562         }
 563
 564         if (entry->flags & EXEC_OBJECT_WRITE) {
 565                 obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
 566                 obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
 567         }
 568
 569         if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
 570             !obj->has_global_gtt_mapping)
 571                 i915_gem_gtt_bind_object(obj, obj->cache_level);
 572
 573         return 0;
 574 }
 575
 576 static int
 577 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 578                             struct list_head *vmas,
 579                             bool *need_relocs)
 580 {
 581         struct drm_i915_gem_object *obj;
 582         struct i915_vma *vma;
 583         struct i915_address_space *vm;
 584         struct list_head ordered_vmas;
 585         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 586         int retry;
 587
 588         if (list_empty(vmas))
 589                 return 0;
 590
 591         vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
 592
 593         INIT_LIST_HEAD(&ordered_vmas);
 594         while (!list_empty(vmas)) {
 595                 struct drm_i915_gem_exec_object2 *entry;
 596                 bool need_fence, need_mappable;
 597
 598                 vma = list_first_entry(vmas, struct i915_vma, exec_list);
 599                 obj = vma->obj;
 600                 entry = vma->exec_entry;
 601
 602                 need_fence =
 603                         has_fenced_gpu_access &&
 604                         entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 605                         obj->tiling_mode != I915_TILING_NONE;
 606                 need_mappable = need_fence || need_reloc_mappable(vma);
 607
 608                 if (need_mappable)
 609                         list_move(&vma->exec_list, &ordered_vmas);
 610                 else
 611                         list_move_tail(&vma->exec_list, &ordered_vmas);
 612
 613                 obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
 614                 obj->base.pending_write_domain = 0;
 615                 obj->pending_fenced_gpu_access = false;
 616         }
 617         list_splice(&ordered_vmas, vmas);
 618
 619         /* Attempt to pin all of the buffers into the GTT.
 620          * This is done in 3 phases:
 621          *
 622          * 1a. Unbind all objects that do not match the GTT constraints for
 623          *     the execbuffer (fenceable, mappable, alignment etc).
 624          * 1b. Increment pin count for already bound objects.
 625          * 2.  Bind new objects.
 626          * 3.  Decrement pin count.
 627          *
 628          * This avoid unnecessary unbinding of later objects in order to make
 629          * room for the earlier objects *unless* we need to defragment.
 630          */
 631         retry = 0;
 632         do {
 633                 int ret = 0;
 634
 635                 /* Unbind any ill-fitting objects or pin. */
 636                 list_for_each_entry(vma, vmas, exec_list) {
 637                         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 638                         bool need_fence, need_mappable;
 639
 640                         obj = vma->obj;
 641
 642                         if (!drm_mm_node_allocated(&vma->node))
 643                                 continue;
 644
 645                         need_fence =
 646                                 has_fenced_gpu_access &&
 647                                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 648                                 obj->tiling_mode != I915_TILING_NONE;
 649                         need_mappable = need_fence || need_reloc_mappable(vma);
 650
 651                         WARN_ON((need_mappable || need_fence) &&
 652                                !i915_is_ggtt(vma->vm));
 653
 654                         if ((entry->alignment &&
 655                              vma->node.start & (entry->alignment - 1)) ||
 656                             (need_mappable && !obj->map_and_fenceable))
 657                                 ret = i915_vma_unbind(vma);
 658                         else
 659                                 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 660                         if (ret)
 661                                 goto err;
 662                 }
 663
 664                 /* Bind fresh objects */
 665                 list_for_each_entry(vma, vmas, exec_list) {
 666                         if (drm_mm_node_allocated(&vma->node))
 667                                 continue;
 668
 669                         ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 670                         if (ret)
 671                                 goto err;
 672                 }
 673
 674 err:
 675                 if (ret != -ENOSPC || retry++)
 676                         return ret;
 677
 678                 /* Decrement pin count for bound objects */
 679                 list_for_each_entry(vma, vmas, exec_list)
 680                         i915_gem_execbuffer_unreserve_vma(vma);
 681
 682                 ret = i915_gem_evict_vm(vm, true);
 683                 if (ret)
 684                         return ret;
 685         } while (1);
 686 }
 687
 688 static int
 689 i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
 690                                   struct drm_i915_gem_execbuffer2 *args,
 691                                   struct drm_file *file,
 692                                   struct intel_ring_buffer *ring,
 693                                   struct eb_vmas *eb,
 694                                   struct drm_i915_gem_exec_object2 *exec)
 695 {
 696         struct drm_i915_gem_relocation_entry *reloc;
 697         struct i915_address_space *vm;
 698         struct i915_vma *vma;
 699         bool need_relocs;
 700         int *reloc_offset;
 701         int i, total, ret;
 702         unsigned count = args->buffer_count;
 703
 704         if (WARN_ON(list_empty(&eb->vmas)))
 705                 return 0;
 706
 707         vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
 708
 709         /* We may process another execbuffer during the unlock... */
 710         while (!list_empty(&eb->vmas)) {
 711                 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
 712                 list_del_init(&vma->exec_list);
 713                 i915_gem_execbuffer_unreserve_vma(vma);
 714                 drm_gem_object_unreference(&vma->obj->base);
 715         }
 716
 717         mutex_unlock(&dev->struct_mutex);
 718
 719         total = 0;
 720         for (i = 0; i < count; i++)
 721                 total += exec[i].relocation_count;
 722
 723         reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
 724         reloc = drm_malloc_ab(total, sizeof(*reloc));
 725         if (reloc == NULL || reloc_offset == NULL) {
 726                 drm_free_large(reloc);
 727                 drm_free_large(reloc_offset);
 728                 mutex_lock(&dev->struct_mutex);
 729                 return -ENOMEM;
 730         }
 731
 732         total = 0;
 733         for (i = 0; i < count; i++) {
 734                 struct drm_i915_gem_relocation_entry __user *user_relocs;
 735                 u64 invalid_offset = (u64)-1;
 736                 int j;
 737
 738                 user_relocs = to_user_ptr(exec[i].relocs_ptr);
 739
 740                 if (copy_from_user(reloc+total, user_relocs,
 741                                    exec[i].relocation_count * sizeof(*reloc))) {
 742                         ret = -EFAULT;
 743                         mutex_lock(&dev->struct_mutex);
 744                         goto err;
 745                 }
 746
 747                 /* As we do not update the known relocation offsets after
 748                  * relocating (due to the complexities in lock handling),
 749                  * we need to mark them as invalid now so that we force the
 750                  * relocation processing next time. Just in case the target
 751                  * object is evicted and then rebound into its old
 752                  * presumed_offset before the next execbuffer - if that
 753                  * happened we would make the mistake of assuming that the
 754                  * relocations were valid.
 755                  */
 756                 for (j = 0; j < exec[i].relocation_count; j++) {
 757                         if (copy_to_user(&user_relocs[j].presumed_offset,
 758                                          &invalid_offset,
 759                                          sizeof(invalid_offset))) {
 760                                 ret = -EFAULT;
 761                                 mutex_lock(&dev->struct_mutex);
 762                                 goto err;
 763                         }
 764                 }
 765
 766                 reloc_offset[i] = total;
 767                 total += exec[i].relocation_count;
 768         }
 769
 770         ret = i915_mutex_lock_interruptible(dev);
 771         if (ret) {
 772                 mutex_lock(&dev->struct_mutex);
 773                 goto err;
 774         }
 775
 776         /* reacquire the objects */
 777         eb_reset(eb);
 778         ret = eb_lookup_vmas(eb, exec, args, vm, file);
 779         if (ret)
 780                 goto err;
 781
 782         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
 783         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
 784         if (ret)
 785                 goto err;
 786
 787         list_for_each_entry(vma, &eb->vmas, exec_list) {
 788                 int offset = vma->exec_entry - exec;
 789                 ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
 790                                                             reloc + reloc_offset[offset]);
 791                 if (ret)
 792                         goto err;
 793         }
 794
 795         /* Leave the user relocations as are, this is the painfully slow path,
 796          * and we want to avoid the complication of dropping the lock whilst
 797          * having buffers reserved in the aperture and so causing spurious
 798          * ENOSPC for random operations.
 799          */
 800
 801 err:
 802         drm_free_large(reloc);
 803         drm_free_large(reloc_offset);
 804         return ret;
 805 }
 806
 807 static int
 808 i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 809                                 struct list_head *vmas)
 810 {
 811         struct i915_vma *vma;
 812         uint32_t flush_domains = 0;
 813         bool flush_chipset = false;
 814         int ret;
 815
 816         list_for_each_entry(vma, vmas, exec_list) {
 817                 struct drm_i915_gem_object *obj = vma->obj;
 818                 ret = i915_gem_object_sync(obj, ring);
 819                 if (ret)
 820                         return ret;
 821
 822                 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
 823                         flush_chipset |= i915_gem_clflush_object(obj, false);
 824
 825                 flush_domains |= obj->base.write_domain;
 826         }
 827
 828         if (flush_chipset)
 829                 i915_gem_chipset_flush(ring->dev);
 830
 831         if (flush_domains & I915_GEM_DOMAIN_GTT)
 832                 wmb();
 833
 834         /* Unconditionally invalidate gpu caches and ensure that we do flush
 835          * any residual writes from the previous batch.
 836          */
 837         return intel_ring_invalidate_all_caches(ring);
 838 }
 839
 840 static bool
 841 i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
 842 {
 843         if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
 844                 return false;
 845
 846         return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
 847 }
 848
 849 static int
 850 validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
 851                    int count)
 852 {
 853         int i;
 854         unsigned relocs_total = 0;
 855         unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 856
 857         for (i = 0; i < count; i++) {
 858                 char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
 859                 int length; /* limited by fault_in_pages_readable() */
 860
 861                 if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
 862                         return -EINVAL;
 863
 864                 /* First check for malicious input causing overflow in
 865                  * the worst case where we need to allocate the entire
 866                  * relocation tree as a single array.
 867                  */
 868                 if (exec[i].relocation_count > relocs_max - relocs_total)
 869                         return -EINVAL;
 870                 relocs_total += exec[i].relocation_count;
 871
 872                 length = exec[i].relocation_count *
 873                         sizeof(struct drm_i915_gem_relocation_entry);
 874                 /*
 875                  * We must check that the entire relocation array is safe
 876                  * to read, but since we may need to update the presumed
 877                  * offsets during execution, check for full write access.
 878                  */
 879                 if (!access_ok(VERIFY_WRITE, ptr, length))
 880                         return -EFAULT;
 881
 882                 if (likely(!i915_prefault_disable)) {
 883                         if (fault_in_multipages_readable(ptr, length))
 884                                 return -EFAULT;
 885                 }
 886         }
 887
 888         return 0;
 889 }
 890
 891 static void
 892 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 893                                    struct intel_ring_buffer *ring)
 894 {
 895         struct i915_vma *vma;
 896
 897         list_for_each_entry(vma, vmas, exec_list) {
 898                 struct drm_i915_gem_object *obj = vma->obj;
 899                 u32 old_read = obj->base.read_domains;
 900                 u32 old_write = obj->base.write_domain;
 901
 902                 obj->base.write_domain = obj->base.pending_write_domain;
 903                 if (obj->base.write_domain == 0)
 904                         obj->base.pending_read_domains |= obj->base.read_domains;
 905                 obj->base.read_domains = obj->base.pending_read_domains;
 906                 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 907
 908                 i915_vma_move_to_active(vma, ring);
 909                 if (obj->base.write_domain) {
 910                         obj->dirty = 1;
 911                         obj->last_write_seqno = intel_ring_get_seqno(ring);
 912                         if (obj->pin_count) /* check for potential scanout */
 913                                 intel_mark_fb_busy(obj, ring);
 914                 }
 915
 916                 trace_i915_gem_object_change_domain(obj, old_read, old_write);
 917         }
 918 }
 919
 920 static void
 921 i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 922                                     struct drm_file *file,
 923                                     struct intel_ring_buffer *ring,
 924                                     struct drm_i915_gem_object *obj)
 925 {
 926         /* Unconditionally force add_request to emit a full flush. */
 927         ring->gpu_caches_dirty = true;
 928
 929         /* Add a breadcrumb for the completion of the batch buffer */
 930         (void)__i915_add_request(ring, file, obj, NULL);
 931 }
 932
 933 static int
 934 i915_reset_gen7_sol_offsets(struct drm_device *dev,
 935                             struct intel_ring_buffer *ring)
 936 {
 937         drm_i915_private_t *dev_priv = dev->dev_private;
 938         int ret, i;
 939
 940         if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
 941                 return 0;
 942
 943         ret = intel_ring_begin(ring, 4 * 3);
 944         if (ret)
 945                 return ret;
 946
 947         for (i = 0; i < 4; i++) {
 948                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
 949                 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
 950                 intel_ring_emit(ring, 0);
 951         }
 952
 953         intel_ring_advance(ring);
 954
 955         return 0;
 956 }
 957
 958 static int
 959 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 960                        struct drm_file *file,
 961                        struct drm_i915_gem_execbuffer2 *args,
 962                        struct drm_i915_gem_exec_object2 *exec,
 963                        struct i915_address_space *vm)
 964 {
 965         drm_i915_private_t *dev_priv = dev->dev_private;
 966         struct eb_vmas *eb;
 967         struct drm_i915_gem_object *batch_obj;
 968         struct drm_clip_rect *cliprects = NULL;
 969         struct intel_ring_buffer *ring;
 970         struct i915_ctx_hang_stats *hs;
 971         u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 972         u32 exec_start, exec_len;
 973         u32 mask, flags;
 974         int ret, mode, i;
 975         bool need_relocs;
 976
 977         if (!i915_gem_check_execbuffer(args))
 978                 return -EINVAL;
 979
 980         ret = validate_exec_list(exec, args->buffer_count);
 981         if (ret)
 982                 return ret;
 983
 984         flags = 0;
 985         if (args->flags & I915_EXEC_SECURE) {
 986                 if (!file->is_master || !capable(CAP_SYS_ADMIN))
 987                     return -EPERM;
 988
 989                 flags |= I915_DISPATCH_SECURE;
 990         }
 991         if (args->flags & I915_EXEC_IS_PINNED)
 992                 flags |= I915_DISPATCH_PINNED;
 993
 994         switch (args->flags & I915_EXEC_RING_MASK) {
 995         case I915_EXEC_DEFAULT:
 996         case I915_EXEC_RENDER:
 997                 ring = &dev_priv->ring[RCS];
 998                 break;
 999         case I915_EXEC_BSD:
1000                 ring = &dev_priv->ring[VCS];
1001                 if (ctx_id != DEFAULT_CONTEXT_ID) {
1002                         DRM_DEBUG("Ring %s doesn't support contexts\n",
1003                                   ring->name);
1004                         return -EPERM;
1005                 }
1006                 break;
1007         case I915_EXEC_BLT:
1008                 ring = &dev_priv->ring[BCS];
1009                 if (ctx_id != DEFAULT_CONTEXT_ID) {
1010                         DRM_DEBUG("Ring %s doesn't support contexts\n",
1011                                   ring->name);
1012                         return -EPERM;
1013                 }
1014                 break;
1015         case I915_EXEC_VEBOX:
1016                 ring = &dev_priv->ring[VECS];
1017                 if (ctx_id != DEFAULT_CONTEXT_ID) {
1018                         DRM_DEBUG("Ring %s doesn't support contexts\n",
1019                                   ring->name);
1020                         return -EPERM;
1021                 }
1022                 break;
1023
1024         default:
1025                 DRM_DEBUG("execbuf with unknown ring: %d\n",
1026                           (int)(args->flags & I915_EXEC_RING_MASK));
1027                 return -EINVAL;
1028         }
1029         if (!intel_ring_initialized(ring)) {
1030                 DRM_DEBUG("execbuf with invalid ring: %d\n",
1031                           (int)(args->flags & I915_EXEC_RING_MASK));
1032                 return -EINVAL;
1033         }
1034
1035         mode = args->flags & I915_EXEC_CONSTANTS_MASK;
1036         mask = I915_EXEC_CONSTANTS_MASK;
1037         switch (mode) {
1038         case I915_EXEC_CONSTANTS_REL_GENERAL:
1039         case I915_EXEC_CONSTANTS_ABSOLUTE:
1040         case I915_EXEC_CONSTANTS_REL_SURFACE:
1041                 if (ring == &dev_priv->ring[RCS] &&
1042                     mode != dev_priv->relative_constants_mode) {
1043                         if (INTEL_INFO(dev)->gen < 4)
1044                                 return -EINVAL;
1045
1046                         if (INTEL_INFO(dev)->gen > 5 &&
1047                             mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1048                                 return -EINVAL;
1049
1050                         /* The HW changed the meaning on this bit on gen6 */
1051                         if (INTEL_INFO(dev)->gen >= 6)
1052                                 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
1053                 }
1054                 break;
1055         default:
1056                 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
1057                 return -EINVAL;
1058         }
1059
1060         if (args->buffer_count < 1) {
1061                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1062                 return -EINVAL;
1063         }
1064
1065         if (args->num_cliprects != 0) {
1066                 if (ring != &dev_priv->ring[RCS]) {
1067                         DRM_DEBUG("clip rectangles are only valid with the render ring\n");
1068                         return -EINVAL;
1069                 }
1070
1071                 if (INTEL_INFO(dev)->gen >= 5) {
1072                         DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1073                         return -EINVAL;
1074                 }
1075
1076                 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1077                         DRM_DEBUG("execbuf with %u cliprects\n",
1078                                   args->num_cliprects);
1079                         return -EINVAL;
1080                 }
1081
1082                 cliprects = kcalloc(args->num_cliprects,
1083                                     sizeof(*cliprects),
1084                                     GFP_KERNEL);
1085                 if (cliprects == NULL) {
1086                         ret = -ENOMEM;
1087                         goto pre_mutex_err;
1088                 }
1089
1090                 if (copy_from_user(cliprects,
1091                                    to_user_ptr(args->cliprects_ptr),
1092                                    sizeof(*cliprects)*args->num_cliprects)) {
1093                         ret = -EFAULT;
1094                         goto pre_mutex_err;
1095                 }
1096         }
1097
1098         ret = i915_mutex_lock_interruptible(dev);
1099         if (ret)
1100                 goto pre_mutex_err;
1101
1102         if (dev_priv->ums.mm_suspended) {
1103                 mutex_unlock(&dev->struct_mutex);
1104                 ret = -EBUSY;
1105                 goto pre_mutex_err;
1106         }
1107
1108         eb = eb_create(args);
1109         if (eb == NULL) {
1110                 mutex_unlock(&dev->struct_mutex);
1111                 ret = -ENOMEM;
1112                 goto pre_mutex_err;
1113         }
1114
1115         /* Look up object handles */
1116         ret = eb_lookup_vmas(eb, exec, args, vm, file);
1117         if (ret)
1118                 goto err;
1119
1120         /* take note of the batch buffer before we might reorder the lists */
1121         batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
1122
1123         /* Move the objects en-masse into the GTT, evicting if necessary. */
1124         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1125         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
1126         if (ret)
1127                 goto err;
1128
1129         /* The objects are in their final locations, apply the relocations. */
1130         if (need_relocs)
1131                 ret = i915_gem_execbuffer_relocate(eb);
1132         if (ret) {
1133                 if (ret == -EFAULT) {
1134                         ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1135                                                                 eb, exec);
1136                         BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1137                 }
1138                 if (ret)
1139                         goto err;
1140         }
1141
1142         /* Set the pending read domains for the batch buffer to COMMAND */
1143         if (batch_obj->base.pending_write_domain) {
1144                 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1145                 ret = -EINVAL;
1146                 goto err;
1147         }
1148         batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1149
1150         /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1151          * batch" bit. Hence we need to pin secure batches into the global gtt.
1152          * hsw should have this fixed, but bdw mucks it up again. */
1153         if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1154                 i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1155
1156         ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
1157         if (ret)
1158                 goto err;
1159
1160         hs = i915_gem_context_get_hang_stats(dev, file, ctx_id);
1161         if (IS_ERR(hs)) {
1162                 ret = PTR_ERR(hs);
1163                 goto err;
1164         }
1165
1166         if (hs->banned) {
1167                 ret = -EIO;
1168                 goto err;
1169         }
1170
1171         ret = i915_switch_context(ring, file, ctx_id);
1172         if (ret)
1173                 goto err;
1174
1175         if (ring == &dev_priv->ring[RCS] &&
1176             mode != dev_priv->relative_constants_mode) {
1177                 ret = intel_ring_begin(ring, 4);
1178                 if (ret)
1179                                 goto err;
1180
1181                 intel_ring_emit(ring, MI_NOOP);
1182                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1183                 intel_ring_emit(ring, INSTPM);
1184                 intel_ring_emit(ring, mask << 16 | mode);
1185                 intel_ring_advance(ring);
1186
1187                 dev_priv->relative_constants_mode = mode;
1188         }
1189
1190         if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1191                 ret = i915_reset_gen7_sol_offsets(dev, ring);
1192                 if (ret)
1193                         goto err;
1194         }
1195
1196         exec_start = i915_gem_obj_offset(batch_obj, vm) +
1197                 args->batch_start_offset;
1198         exec_len = args->batch_len;
1199         if (cliprects) {
1200                 for (i = 0; i < args->num_cliprects; i++) {
1201                         ret = i915_emit_box(dev, &cliprects[i],
1202                                             args->DR1, args->DR4);
1203                         if (ret)
1204                                 goto err;
1205
1206                         ret = ring->dispatch_execbuffer(ring,
1207                                                         exec_start, exec_len,
1208                                                         flags);
1209                         if (ret)
1210                                 goto err;
1211                 }
1212         } else {
1213                 ret = ring->dispatch_execbuffer(ring,
1214                                                 exec_start, exec_len,
1215                                                 flags);
1216                 if (ret)
1217                         goto err;
1218         }
1219
1220         trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1221
1222         i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
1223         i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1224
1225 err:
1226         eb_destroy(eb);
1227
1228         mutex_unlock(&dev->struct_mutex);
1229
1230 pre_mutex_err:
1231         kfree(cliprects);
1232         return ret;
1233 }
1234
1235 /*
1236  * Legacy execbuffer just creates an exec2 list from the original exec object
1237  * list array and passes it to the real function.
1238  */
1239 int
1240 i915_gem_execbuffer(struct drm_device *dev, void *data,
1241                     struct drm_file *file)
1242 {
1243         struct drm_i915_private *dev_priv = dev->dev_private;
1244         struct drm_i915_gem_execbuffer *args = data;
1245         struct drm_i915_gem_execbuffer2 exec2;
1246         struct drm_i915_gem_exec_object *exec_list = NULL;
1247         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1248         int ret, i;
1249
1250         if (args->buffer_count < 1) {
1251                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1252                 return -EINVAL;
1253         }
1254
1255         /* Copy in the exec list from userland */
1256         exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1257         exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1258         if (exec_list == NULL || exec2_list == NULL) {
1259                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1260                           args->buffer_count);
1261                 drm_free_large(exec_list);
1262                 drm_free_large(exec2_list);
1263                 return -ENOMEM;
1264         }
1265         ret = copy_from_user(exec_list,
1266                              to_user_ptr(args->buffers_ptr),
1267                              sizeof(*exec_list) * args->buffer_count);
1268         if (ret != 0) {
1269                 DRM_DEBUG("copy %d exec entries failed %d\n",
1270                           args->buffer_count, ret);
1271                 drm_free_large(exec_list);
1272                 drm_free_large(exec2_list);
1273                 return -EFAULT;
1274         }
1275
1276         for (i = 0; i < args->buffer_count; i++) {
1277                 exec2_list[i].handle = exec_list[i].handle;
1278                 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1279                 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1280                 exec2_list[i].alignment = exec_list[i].alignment;
1281                 exec2_list[i].offset = exec_list[i].offset;
1282                 if (INTEL_INFO(dev)->gen < 4)
1283                         exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1284                 else
1285                         exec2_list[i].flags = 0;
1286         }
1287
1288         exec2.buffers_ptr = args->buffers_ptr;
1289         exec2.buffer_count = args->buffer_count;
1290         exec2.batch_start_offset = args->batch_start_offset;
1291         exec2.batch_len = args->batch_len;
1292         exec2.DR1 = args->DR1;
1293         exec2.DR4 = args->DR4;
1294         exec2.num_cliprects = args->num_cliprects;
1295         exec2.cliprects_ptr = args->cliprects_ptr;
1296         exec2.flags = I915_EXEC_RENDER;
1297         i915_execbuffer2_set_context_id(exec2, 0);
1298
1299         ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1300                                      &dev_priv->gtt.base);
1301         if (!ret) {
1302                 /* Copy the new buffer offsets back to the user's exec list. */
1303                 for (i = 0; i < args->buffer_count; i++)
1304                         exec_list[i].offset = exec2_list[i].offset;
1305                 /* ... and back out to userspace */
1306                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1307                                    exec_list,
1308                                    sizeof(*exec_list) * args->buffer_count);
1309                 if (ret) {
1310                         ret = -EFAULT;
1311                         DRM_DEBUG("failed to copy %d exec entries "
1312                                   "back to user (%d)\n",
1313                                   args->buffer_count, ret);
1314                 }
1315         }
1316
1317         drm_free_large(exec_list);
1318         drm_free_large(exec2_list);
1319         return ret;
1320 }
1321
1322 int
1323 i915_gem_execbuffer2(struct drm_device *dev, void *data,
1324                      struct drm_file *file)
1325 {
1326         struct drm_i915_private *dev_priv = dev->dev_private;
1327         struct drm_i915_gem_execbuffer2 *args = data;
1328         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1329         int ret;
1330
1331         if (args->buffer_count < 1 ||
1332             args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1333                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1334                 return -EINVAL;
1335         }
1336
1337         exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1338                              GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1339         if (exec2_list == NULL)
1340                 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1341                                            args->buffer_count);
1342         if (exec2_list == NULL) {
1343                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1344                           args->buffer_count);
1345                 return -ENOMEM;
1346         }
1347         ret = copy_from_user(exec2_list,
1348                              to_user_ptr(args->buffers_ptr),
1349                              sizeof(*exec2_list) * args->buffer_count);
1350         if (ret != 0) {
1351                 DRM_DEBUG("copy %d exec entries failed %d\n",
1352                           args->buffer_count, ret);
1353                 drm_free_large(exec2_list);
1354                 return -EFAULT;
1355         }
1356
1357         ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1358                                      &dev_priv->gtt.base);
1359         if (!ret) {
1360                 /* Copy the new buffer offsets back to the user's exec list. */
1361                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1362                                    exec2_list,
1363                                    sizeof(*exec2_list) * args->buffer_count);
1364                 if (ret) {
1365                         ret = -EFAULT;
1366                         DRM_DEBUG("failed to copy %d exec entries "
1367                                   "back to user (%d)\n",
1368                                   args->buffer_count, ret);
1369                 }
1370         }
1371
1372         drm_free_large(exec2_list);
1373         return ret;
1374 }