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KVM: PPC: Book3S PR: Cope with doorbell interrupts
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1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17  *
18  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20  *          Scott Wood <scottwood@freescale.com>
21  *          Varun Sethi <varun.sethi@freescale.com>
22  */
23
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40
41 #include "timing.h"
42 #include "booke.h"
43
44 #define CREATE_TRACE_POINTS
45 #include "trace_booke.h"
46
47 unsigned long kvmppc_booke_handlers;
48
49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
51
52 struct kvm_stats_debugfs_item debugfs_entries[] = {
53         { "mmio",       VCPU_STAT(mmio_exits) },
54         { "dcr",        VCPU_STAT(dcr_exits) },
55         { "sig",        VCPU_STAT(signal_exits) },
56         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
57         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
58         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
59         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
60         { "sysc",       VCPU_STAT(syscall_exits) },
61         { "isi",        VCPU_STAT(isi_exits) },
62         { "dsi",        VCPU_STAT(dsi_exits) },
63         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
64         { "dec",        VCPU_STAT(dec_exits) },
65         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
66         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
67         { "doorbell", VCPU_STAT(dbell_exits) },
68         { "guest doorbell", VCPU_STAT(gdbell_exits) },
69         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
70         { NULL }
71 };
72
73 /* TODO: use vcpu_printf() */
74 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
75 {
76         int i;
77
78         printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
79         printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
80         printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
81                                             vcpu->arch.shared->srr1);
82
83         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
84
85         for (i = 0; i < 32; i += 4) {
86                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
87                        kvmppc_get_gpr(vcpu, i),
88                        kvmppc_get_gpr(vcpu, i+1),
89                        kvmppc_get_gpr(vcpu, i+2),
90                        kvmppc_get_gpr(vcpu, i+3));
91         }
92 }
93
94 #ifdef CONFIG_SPE
95 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
96 {
97         preempt_disable();
98         enable_kernel_spe();
99         kvmppc_save_guest_spe(vcpu);
100         vcpu->arch.shadow_msr &= ~MSR_SPE;
101         preempt_enable();
102 }
103
104 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
105 {
106         preempt_disable();
107         enable_kernel_spe();
108         kvmppc_load_guest_spe(vcpu);
109         vcpu->arch.shadow_msr |= MSR_SPE;
110         preempt_enable();
111 }
112
113 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
114 {
115         if (vcpu->arch.shared->msr & MSR_SPE) {
116                 if (!(vcpu->arch.shadow_msr & MSR_SPE))
117                         kvmppc_vcpu_enable_spe(vcpu);
118         } else if (vcpu->arch.shadow_msr & MSR_SPE) {
119                 kvmppc_vcpu_disable_spe(vcpu);
120         }
121 }
122 #else
123 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
124 {
125 }
126 #endif
127
128 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
129 {
130 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
131         /* We always treat the FP bit as enabled from the host
132            perspective, so only need to adjust the shadow MSR */
133         vcpu->arch.shadow_msr &= ~MSR_FP;
134         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
135 #endif
136 }
137
138 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
139 {
140         /* Synchronize guest's desire to get debug interrupts into shadow MSR */
141 #ifndef CONFIG_KVM_BOOKE_HV
142         vcpu->arch.shadow_msr &= ~MSR_DE;
143         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
144 #endif
145
146         /* Force enable debug interrupts when user space wants to debug */
147         if (vcpu->guest_debug) {
148 #ifdef CONFIG_KVM_BOOKE_HV
149                 /*
150                  * Since there is no shadow MSR, sync MSR_DE into the guest
151                  * visible MSR.
152                  */
153                 vcpu->arch.shared->msr |= MSR_DE;
154 #else
155                 vcpu->arch.shadow_msr |= MSR_DE;
156                 vcpu->arch.shared->msr &= ~MSR_DE;
157 #endif
158         }
159 }
160
161 /*
162  * Helper function for "full" MSR writes.  No need to call this if only
163  * EE/CE/ME/DE/RI are changing.
164  */
165 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
166 {
167         u32 old_msr = vcpu->arch.shared->msr;
168
169 #ifdef CONFIG_KVM_BOOKE_HV
170         new_msr |= MSR_GS;
171 #endif
172
173         vcpu->arch.shared->msr = new_msr;
174
175         kvmppc_mmu_msr_notify(vcpu, old_msr);
176         kvmppc_vcpu_sync_spe(vcpu);
177         kvmppc_vcpu_sync_fpu(vcpu);
178         kvmppc_vcpu_sync_debug(vcpu);
179 }
180
181 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
182                                        unsigned int priority)
183 {
184         trace_kvm_booke_queue_irqprio(vcpu, priority);
185         set_bit(priority, &vcpu->arch.pending_exceptions);
186 }
187
188 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
189                                         ulong dear_flags, ulong esr_flags)
190 {
191         vcpu->arch.queued_dear = dear_flags;
192         vcpu->arch.queued_esr = esr_flags;
193         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
194 }
195
196 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
197                                            ulong dear_flags, ulong esr_flags)
198 {
199         vcpu->arch.queued_dear = dear_flags;
200         vcpu->arch.queued_esr = esr_flags;
201         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
202 }
203
204 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
205                                            ulong esr_flags)
206 {
207         vcpu->arch.queued_esr = esr_flags;
208         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
209 }
210
211 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
212                                         ulong esr_flags)
213 {
214         vcpu->arch.queued_dear = dear_flags;
215         vcpu->arch.queued_esr = esr_flags;
216         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
217 }
218
219 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
220 {
221         vcpu->arch.queued_esr = esr_flags;
222         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
223 }
224
225 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
226 {
227         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
228 }
229
230 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
231 {
232         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
233 }
234
235 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
236 {
237         clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
238 }
239
240 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
241                                 struct kvm_interrupt *irq)
242 {
243         unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
244
245         if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
246                 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
247
248         kvmppc_booke_queue_irqprio(vcpu, prio);
249 }
250
251 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
252 {
253         clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
254         clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
255 }
256
257 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
258 {
259         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
260 }
261
262 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
263 {
264         clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
265 }
266
267 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
268 {
269 #ifdef CONFIG_KVM_BOOKE_HV
270         mtspr(SPRN_GSRR0, srr0);
271         mtspr(SPRN_GSRR1, srr1);
272 #else
273         vcpu->arch.shared->srr0 = srr0;
274         vcpu->arch.shared->srr1 = srr1;
275 #endif
276 }
277
278 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
279 {
280         vcpu->arch.csrr0 = srr0;
281         vcpu->arch.csrr1 = srr1;
282 }
283
284 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
285 {
286         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
287                 vcpu->arch.dsrr0 = srr0;
288                 vcpu->arch.dsrr1 = srr1;
289         } else {
290                 set_guest_csrr(vcpu, srr0, srr1);
291         }
292 }
293
294 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
295 {
296         vcpu->arch.mcsrr0 = srr0;
297         vcpu->arch.mcsrr1 = srr1;
298 }
299
300 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
301 {
302 #ifdef CONFIG_KVM_BOOKE_HV
303         return mfspr(SPRN_GDEAR);
304 #else
305         return vcpu->arch.shared->dar;
306 #endif
307 }
308
309 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
310 {
311 #ifdef CONFIG_KVM_BOOKE_HV
312         mtspr(SPRN_GDEAR, dear);
313 #else
314         vcpu->arch.shared->dar = dear;
315 #endif
316 }
317
318 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
319 {
320 #ifdef CONFIG_KVM_BOOKE_HV
321         return mfspr(SPRN_GESR);
322 #else
323         return vcpu->arch.shared->esr;
324 #endif
325 }
326
327 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
328 {
329 #ifdef CONFIG_KVM_BOOKE_HV
330         mtspr(SPRN_GESR, esr);
331 #else
332         vcpu->arch.shared->esr = esr;
333 #endif
334 }
335
336 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
337 {
338 #ifdef CONFIG_KVM_BOOKE_HV
339         return mfspr(SPRN_GEPR);
340 #else
341         return vcpu->arch.epr;
342 #endif
343 }
344
345 /* Deliver the interrupt of the corresponding priority, if possible. */
346 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
347                                         unsigned int priority)
348 {
349         int allowed = 0;
350         ulong msr_mask = 0;
351         bool update_esr = false, update_dear = false, update_epr = false;
352         ulong crit_raw = vcpu->arch.shared->critical;
353         ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
354         bool crit;
355         bool keep_irq = false;
356         enum int_class int_class;
357         ulong new_msr = vcpu->arch.shared->msr;
358
359         /* Truncate crit indicators in 32 bit mode */
360         if (!(vcpu->arch.shared->msr & MSR_SF)) {
361                 crit_raw &= 0xffffffff;
362                 crit_r1 &= 0xffffffff;
363         }
364
365         /* Critical section when crit == r1 */
366         crit = (crit_raw == crit_r1);
367         /* ... and we're in supervisor mode */
368         crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
369
370         if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
371                 priority = BOOKE_IRQPRIO_EXTERNAL;
372                 keep_irq = true;
373         }
374
375         if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
376                 update_epr = true;
377
378         switch (priority) {
379         case BOOKE_IRQPRIO_DTLB_MISS:
380         case BOOKE_IRQPRIO_DATA_STORAGE:
381         case BOOKE_IRQPRIO_ALIGNMENT:
382                 update_dear = true;
383                 /* fall through */
384         case BOOKE_IRQPRIO_INST_STORAGE:
385         case BOOKE_IRQPRIO_PROGRAM:
386                 update_esr = true;
387                 /* fall through */
388         case BOOKE_IRQPRIO_ITLB_MISS:
389         case BOOKE_IRQPRIO_SYSCALL:
390         case BOOKE_IRQPRIO_FP_UNAVAIL:
391         case BOOKE_IRQPRIO_SPE_UNAVAIL:
392         case BOOKE_IRQPRIO_SPE_FP_DATA:
393         case BOOKE_IRQPRIO_SPE_FP_ROUND:
394         case BOOKE_IRQPRIO_AP_UNAVAIL:
395                 allowed = 1;
396                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
397                 int_class = INT_CLASS_NONCRIT;
398                 break;
399         case BOOKE_IRQPRIO_WATCHDOG:
400         case BOOKE_IRQPRIO_CRITICAL:
401         case BOOKE_IRQPRIO_DBELL_CRIT:
402                 allowed = vcpu->arch.shared->msr & MSR_CE;
403                 allowed = allowed && !crit;
404                 msr_mask = MSR_ME;
405                 int_class = INT_CLASS_CRIT;
406                 break;
407         case BOOKE_IRQPRIO_MACHINE_CHECK:
408                 allowed = vcpu->arch.shared->msr & MSR_ME;
409                 allowed = allowed && !crit;
410                 int_class = INT_CLASS_MC;
411                 break;
412         case BOOKE_IRQPRIO_DECREMENTER:
413         case BOOKE_IRQPRIO_FIT:
414                 keep_irq = true;
415                 /* fall through */
416         case BOOKE_IRQPRIO_EXTERNAL:
417         case BOOKE_IRQPRIO_DBELL:
418                 allowed = vcpu->arch.shared->msr & MSR_EE;
419                 allowed = allowed && !crit;
420                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
421                 int_class = INT_CLASS_NONCRIT;
422                 break;
423         case BOOKE_IRQPRIO_DEBUG:
424                 allowed = vcpu->arch.shared->msr & MSR_DE;
425                 allowed = allowed && !crit;
426                 msr_mask = MSR_ME;
427                 int_class = INT_CLASS_CRIT;
428                 break;
429         }
430
431         if (allowed) {
432                 switch (int_class) {
433                 case INT_CLASS_NONCRIT:
434                         set_guest_srr(vcpu, vcpu->arch.pc,
435                                       vcpu->arch.shared->msr);
436                         break;
437                 case INT_CLASS_CRIT:
438                         set_guest_csrr(vcpu, vcpu->arch.pc,
439                                        vcpu->arch.shared->msr);
440                         break;
441                 case INT_CLASS_DBG:
442                         set_guest_dsrr(vcpu, vcpu->arch.pc,
443                                        vcpu->arch.shared->msr);
444                         break;
445                 case INT_CLASS_MC:
446                         set_guest_mcsrr(vcpu, vcpu->arch.pc,
447                                         vcpu->arch.shared->msr);
448                         break;
449                 }
450
451                 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
452                 if (update_esr == true)
453                         set_guest_esr(vcpu, vcpu->arch.queued_esr);
454                 if (update_dear == true)
455                         set_guest_dear(vcpu, vcpu->arch.queued_dear);
456                 if (update_epr == true) {
457                         if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
458                                 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
459                         else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
460                                 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
461                                 kvmppc_mpic_set_epr(vcpu);
462                         }
463                 }
464
465                 new_msr &= msr_mask;
466 #if defined(CONFIG_64BIT)
467                 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
468                         new_msr |= MSR_CM;
469 #endif
470                 kvmppc_set_msr(vcpu, new_msr);
471
472                 if (!keep_irq)
473                         clear_bit(priority, &vcpu->arch.pending_exceptions);
474         }
475
476 #ifdef CONFIG_KVM_BOOKE_HV
477         /*
478          * If an interrupt is pending but masked, raise a guest doorbell
479          * so that we are notified when the guest enables the relevant
480          * MSR bit.
481          */
482         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
483                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
484         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
485                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
486         if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
487                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
488 #endif
489
490         return allowed;
491 }
492
493 /*
494  * Return the number of jiffies until the next timeout.  If the timeout is
495  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
496  * because the larger value can break the timer APIs.
497  */
498 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
499 {
500         u64 tb, wdt_tb, wdt_ticks = 0;
501         u64 nr_jiffies = 0;
502         u32 period = TCR_GET_WP(vcpu->arch.tcr);
503
504         wdt_tb = 1ULL << (63 - period);
505         tb = get_tb();
506         /*
507          * The watchdog timeout will hapeen when TB bit corresponding
508          * to watchdog will toggle from 0 to 1.
509          */
510         if (tb & wdt_tb)
511                 wdt_ticks = wdt_tb;
512
513         wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
514
515         /* Convert timebase ticks to jiffies */
516         nr_jiffies = wdt_ticks;
517
518         if (do_div(nr_jiffies, tb_ticks_per_jiffy))
519                 nr_jiffies++;
520
521         return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
522 }
523
524 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
525 {
526         unsigned long nr_jiffies;
527         unsigned long flags;
528
529         /*
530          * If TSR_ENW and TSR_WIS are not set then no need to exit to
531          * userspace, so clear the KVM_REQ_WATCHDOG request.
532          */
533         if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
534                 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
535
536         spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
537         nr_jiffies = watchdog_next_timeout(vcpu);
538         /*
539          * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
540          * then do not run the watchdog timer as this can break timer APIs.
541          */
542         if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
543                 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
544         else
545                 del_timer(&vcpu->arch.wdt_timer);
546         spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
547 }
548
549 void kvmppc_watchdog_func(unsigned long data)
550 {
551         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
552         u32 tsr, new_tsr;
553         int final;
554
555         do {
556                 new_tsr = tsr = vcpu->arch.tsr;
557                 final = 0;
558
559                 /* Time out event */
560                 if (tsr & TSR_ENW) {
561                         if (tsr & TSR_WIS)
562                                 final = 1;
563                         else
564                                 new_tsr = tsr | TSR_WIS;
565                 } else {
566                         new_tsr = tsr | TSR_ENW;
567                 }
568         } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
569
570         if (new_tsr & TSR_WIS) {
571                 smp_wmb();
572                 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
573                 kvm_vcpu_kick(vcpu);
574         }
575
576         /*
577          * If this is final watchdog expiry and some action is required
578          * then exit to userspace.
579          */
580         if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
581             vcpu->arch.watchdog_enabled) {
582                 smp_wmb();
583                 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
584                 kvm_vcpu_kick(vcpu);
585         }
586
587         /*
588          * Stop running the watchdog timer after final expiration to
589          * prevent the host from being flooded with timers if the
590          * guest sets a short period.
591          * Timers will resume when TSR/TCR is updated next time.
592          */
593         if (!final)
594                 arm_next_watchdog(vcpu);
595 }
596
597 static void update_timer_ints(struct kvm_vcpu *vcpu)
598 {
599         if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
600                 kvmppc_core_queue_dec(vcpu);
601         else
602                 kvmppc_core_dequeue_dec(vcpu);
603
604         if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
605                 kvmppc_core_queue_watchdog(vcpu);
606         else
607                 kvmppc_core_dequeue_watchdog(vcpu);
608 }
609
610 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
611 {
612         unsigned long *pending = &vcpu->arch.pending_exceptions;
613         unsigned int priority;
614
615         priority = __ffs(*pending);
616         while (priority < BOOKE_IRQPRIO_MAX) {
617                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
618                         break;
619
620                 priority = find_next_bit(pending,
621                                          BITS_PER_BYTE * sizeof(*pending),
622                                          priority + 1);
623         }
624
625         /* Tell the guest about our interrupt status */
626         vcpu->arch.shared->int_pending = !!*pending;
627 }
628
629 /* Check pending exceptions and deliver one, if possible. */
630 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
631 {
632         int r = 0;
633         WARN_ON_ONCE(!irqs_disabled());
634
635         kvmppc_core_check_exceptions(vcpu);
636
637         if (vcpu->requests) {
638                 /* Exception delivery raised request; start over */
639                 return 1;
640         }
641
642         if (vcpu->arch.shared->msr & MSR_WE) {
643                 local_irq_enable();
644                 kvm_vcpu_block(vcpu);
645                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
646                 hard_irq_disable();
647
648                 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
649                 r = 1;
650         };
651
652         return r;
653 }
654
655 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
656 {
657         int r = 1; /* Indicate we want to get back into the guest */
658
659         if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
660                 update_timer_ints(vcpu);
661 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
662         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
663                 kvmppc_core_flush_tlb(vcpu);
664 #endif
665
666         if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
667                 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
668                 r = 0;
669         }
670
671         if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
672                 vcpu->run->epr.epr = 0;
673                 vcpu->arch.epr_needed = true;
674                 vcpu->run->exit_reason = KVM_EXIT_EPR;
675                 r = 0;
676         }
677
678         return r;
679 }
680
681 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
682 {
683         int ret, s;
684         struct thread_struct thread;
685
686         if (!vcpu->arch.sane) {
687                 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
688                 return -EINVAL;
689         }
690
691         s = kvmppc_prepare_to_enter(vcpu);
692         if (s <= 0) {
693                 ret = s;
694                 goto out;
695         }
696         /* interrupts now hard-disabled */
697
698 #ifdef CONFIG_PPC_FPU
699         /* Save userspace FPU state in stack */
700         enable_kernel_fp();
701
702         /*
703          * Since we can't trap on MSR_FP in GS-mode, we consider the guest
704          * as always using the FPU.  Kernel usage of FP (via
705          * enable_kernel_fp()) in this thread must not occur while
706          * vcpu->fpu_active is set.
707          */
708         vcpu->fpu_active = 1;
709
710         kvmppc_load_guest_fp(vcpu);
711 #endif
712
713         /* Switch to guest debug context */
714         thread.debug = vcpu->arch.shadow_dbg_reg;
715         switch_booke_debug_regs(&thread);
716         thread.debug = current->thread.debug;
717         current->thread.debug = vcpu->arch.shadow_dbg_reg;
718
719         vcpu->arch.pgdir = current->mm->pgd;
720         kvmppc_fix_ee_before_entry();
721
722         ret = __kvmppc_vcpu_run(kvm_run, vcpu);
723
724         /* No need for kvm_guest_exit. It's done in handle_exit.
725            We also get here with interrupts enabled. */
726
727         /* Switch back to user space debug context */
728         switch_booke_debug_regs(&thread);
729         current->thread.debug = thread.debug;
730
731 #ifdef CONFIG_PPC_FPU
732         kvmppc_save_guest_fp(vcpu);
733
734         vcpu->fpu_active = 0;
735 #endif
736
737 out:
738         vcpu->mode = OUTSIDE_GUEST_MODE;
739         return ret;
740 }
741
742 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
743 {
744         enum emulation_result er;
745
746         er = kvmppc_emulate_instruction(run, vcpu);
747         switch (er) {
748         case EMULATE_DONE:
749                 /* don't overwrite subtypes, just account kvm_stats */
750                 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
751                 /* Future optimization: only reload non-volatiles if
752                  * they were actually modified by emulation. */
753                 return RESUME_GUEST_NV;
754
755         case EMULATE_DO_DCR:
756                 run->exit_reason = KVM_EXIT_DCR;
757                 return RESUME_HOST;
758
759         case EMULATE_FAIL:
760                 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
761                        __func__, vcpu->arch.pc, vcpu->arch.last_inst);
762                 /* For debugging, encode the failing instruction and
763                  * report it to userspace. */
764                 run->hw.hardware_exit_reason = ~0ULL << 32;
765                 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
766                 kvmppc_core_queue_program(vcpu, ESR_PIL);
767                 return RESUME_HOST;
768
769         case EMULATE_EXIT_USER:
770                 return RESUME_HOST;
771
772         default:
773                 BUG();
774         }
775 }
776
777 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
778 {
779         struct debug_reg *dbg_reg = &(vcpu->arch.shadow_dbg_reg);
780         u32 dbsr = vcpu->arch.dbsr;
781
782         run->debug.arch.status = 0;
783         run->debug.arch.address = vcpu->arch.pc;
784
785         if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
786                 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
787         } else {
788                 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
789                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
790                 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
791                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
792                 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
793                         run->debug.arch.address = dbg_reg->dac1;
794                 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
795                         run->debug.arch.address = dbg_reg->dac2;
796         }
797
798         return RESUME_HOST;
799 }
800
801 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
802 {
803         ulong r1, ip, msr, lr;
804
805         asm("mr %0, 1" : "=r"(r1));
806         asm("mflr %0" : "=r"(lr));
807         asm("mfmsr %0" : "=r"(msr));
808         asm("bl 1f; 1: mflr %0" : "=r"(ip));
809
810         memset(regs, 0, sizeof(*regs));
811         regs->gpr[1] = r1;
812         regs->nip = ip;
813         regs->msr = msr;
814         regs->link = lr;
815 }
816
817 /*
818  * For interrupts needed to be handled by host interrupt handlers,
819  * corresponding host handler are called from here in similar way
820  * (but not exact) as they are called from low level handler
821  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
822  */
823 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
824                                      unsigned int exit_nr)
825 {
826         struct pt_regs regs;
827
828         switch (exit_nr) {
829         case BOOKE_INTERRUPT_EXTERNAL:
830                 kvmppc_fill_pt_regs(&regs);
831                 do_IRQ(&regs);
832                 break;
833         case BOOKE_INTERRUPT_DECREMENTER:
834                 kvmppc_fill_pt_regs(&regs);
835                 timer_interrupt(&regs);
836                 break;
837 #if defined(CONFIG_PPC_DOORBELL)
838         case BOOKE_INTERRUPT_DOORBELL:
839                 kvmppc_fill_pt_regs(&regs);
840                 doorbell_exception(&regs);
841                 break;
842 #endif
843         case BOOKE_INTERRUPT_MACHINE_CHECK:
844                 /* FIXME */
845                 break;
846         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
847                 kvmppc_fill_pt_regs(&regs);
848                 performance_monitor_exception(&regs);
849                 break;
850         case BOOKE_INTERRUPT_WATCHDOG:
851                 kvmppc_fill_pt_regs(&regs);
852 #ifdef CONFIG_BOOKE_WDT
853                 WatchdogException(&regs);
854 #else
855                 unknown_exception(&regs);
856 #endif
857                 break;
858         case BOOKE_INTERRUPT_CRITICAL:
859                 unknown_exception(&regs);
860                 break;
861         case BOOKE_INTERRUPT_DEBUG:
862                 /* Save DBSR before preemption is enabled */
863                 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
864                 kvmppc_clear_dbsr();
865                 break;
866         }
867 }
868
869 /**
870  * kvmppc_handle_exit
871  *
872  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
873  */
874 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
875                        unsigned int exit_nr)
876 {
877         int r = RESUME_HOST;
878         int s;
879         int idx;
880
881         /* update before a new last_exit_type is rewritten */
882         kvmppc_update_timing_stats(vcpu);
883
884         /* restart interrupts if they were meant for the host */
885         kvmppc_restart_interrupt(vcpu, exit_nr);
886
887         local_irq_enable();
888
889         trace_kvm_exit(exit_nr, vcpu);
890         kvm_guest_exit();
891
892         run->exit_reason = KVM_EXIT_UNKNOWN;
893         run->ready_for_interrupt_injection = 1;
894
895         switch (exit_nr) {
896         case BOOKE_INTERRUPT_MACHINE_CHECK:
897                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
898                 kvmppc_dump_vcpu(vcpu);
899                 /* For debugging, send invalid exit reason to user space */
900                 run->hw.hardware_exit_reason = ~1ULL << 32;
901                 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
902                 r = RESUME_HOST;
903                 break;
904
905         case BOOKE_INTERRUPT_EXTERNAL:
906                 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
907                 r = RESUME_GUEST;
908                 break;
909
910         case BOOKE_INTERRUPT_DECREMENTER:
911                 kvmppc_account_exit(vcpu, DEC_EXITS);
912                 r = RESUME_GUEST;
913                 break;
914
915         case BOOKE_INTERRUPT_WATCHDOG:
916                 r = RESUME_GUEST;
917                 break;
918
919         case BOOKE_INTERRUPT_DOORBELL:
920                 kvmppc_account_exit(vcpu, DBELL_EXITS);
921                 r = RESUME_GUEST;
922                 break;
923
924         case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
925                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
926
927                 /*
928                  * We are here because there is a pending guest interrupt
929                  * which could not be delivered as MSR_CE or MSR_ME was not
930                  * set.  Once we break from here we will retry delivery.
931                  */
932                 r = RESUME_GUEST;
933                 break;
934
935         case BOOKE_INTERRUPT_GUEST_DBELL:
936                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
937
938                 /*
939                  * We are here because there is a pending guest interrupt
940                  * which could not be delivered as MSR_EE was not set.  Once
941                  * we break from here we will retry delivery.
942                  */
943                 r = RESUME_GUEST;
944                 break;
945
946         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
947                 r = RESUME_GUEST;
948                 break;
949
950         case BOOKE_INTERRUPT_HV_PRIV:
951                 r = emulation_exit(run, vcpu);
952                 break;
953
954         case BOOKE_INTERRUPT_PROGRAM:
955                 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
956                         /*
957                          * Program traps generated by user-level software must
958                          * be handled by the guest kernel.
959                          *
960                          * In GS mode, hypervisor privileged instructions trap
961                          * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
962                          * actual program interrupts, handled by the guest.
963                          */
964                         kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
965                         r = RESUME_GUEST;
966                         kvmppc_account_exit(vcpu, USR_PR_INST);
967                         break;
968                 }
969
970                 r = emulation_exit(run, vcpu);
971                 break;
972
973         case BOOKE_INTERRUPT_FP_UNAVAIL:
974                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
975                 kvmppc_account_exit(vcpu, FP_UNAVAIL);
976                 r = RESUME_GUEST;
977                 break;
978
979 #ifdef CONFIG_SPE
980         case BOOKE_INTERRUPT_SPE_UNAVAIL: {
981                 if (vcpu->arch.shared->msr & MSR_SPE)
982                         kvmppc_vcpu_enable_spe(vcpu);
983                 else
984                         kvmppc_booke_queue_irqprio(vcpu,
985                                                    BOOKE_IRQPRIO_SPE_UNAVAIL);
986                 r = RESUME_GUEST;
987                 break;
988         }
989
990         case BOOKE_INTERRUPT_SPE_FP_DATA:
991                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
992                 r = RESUME_GUEST;
993                 break;
994
995         case BOOKE_INTERRUPT_SPE_FP_ROUND:
996                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
997                 r = RESUME_GUEST;
998                 break;
999 #else
1000         case BOOKE_INTERRUPT_SPE_UNAVAIL:
1001                 /*
1002                  * Guest wants SPE, but host kernel doesn't support it.  Send
1003                  * an "unimplemented operation" program check to the guest.
1004                  */
1005                 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1006                 r = RESUME_GUEST;
1007                 break;
1008
1009         /*
1010          * These really should never happen without CONFIG_SPE,
1011          * as we should never enable the real MSR[SPE] in the guest.
1012          */
1013         case BOOKE_INTERRUPT_SPE_FP_DATA:
1014         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1015                 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1016                        __func__, exit_nr, vcpu->arch.pc);
1017                 run->hw.hardware_exit_reason = exit_nr;
1018                 r = RESUME_HOST;
1019                 break;
1020 #endif
1021
1022         case BOOKE_INTERRUPT_DATA_STORAGE:
1023                 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1024                                                vcpu->arch.fault_esr);
1025                 kvmppc_account_exit(vcpu, DSI_EXITS);
1026                 r = RESUME_GUEST;
1027                 break;
1028
1029         case BOOKE_INTERRUPT_INST_STORAGE:
1030                 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1031                 kvmppc_account_exit(vcpu, ISI_EXITS);
1032                 r = RESUME_GUEST;
1033                 break;
1034
1035         case BOOKE_INTERRUPT_ALIGNMENT:
1036                 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1037                                             vcpu->arch.fault_esr);
1038                 r = RESUME_GUEST;
1039                 break;
1040
1041 #ifdef CONFIG_KVM_BOOKE_HV
1042         case BOOKE_INTERRUPT_HV_SYSCALL:
1043                 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1044                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1045                 } else {
1046                         /*
1047                          * hcall from guest userspace -- send privileged
1048                          * instruction program check.
1049                          */
1050                         kvmppc_core_queue_program(vcpu, ESR_PPR);
1051                 }
1052
1053                 r = RESUME_GUEST;
1054                 break;
1055 #else
1056         case BOOKE_INTERRUPT_SYSCALL:
1057                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1058                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1059                         /* KVM PV hypercalls */
1060                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1061                         r = RESUME_GUEST;
1062                 } else {
1063                         /* Guest syscalls */
1064                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1065                 }
1066                 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1067                 r = RESUME_GUEST;
1068                 break;
1069 #endif
1070
1071         case BOOKE_INTERRUPT_DTLB_MISS: {
1072                 unsigned long eaddr = vcpu->arch.fault_dear;
1073                 int gtlb_index;
1074                 gpa_t gpaddr;
1075                 gfn_t gfn;
1076
1077 #ifdef CONFIG_KVM_E500V2
1078                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1079                     (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1080                         kvmppc_map_magic(vcpu);
1081                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1082                         r = RESUME_GUEST;
1083
1084                         break;
1085                 }
1086 #endif
1087
1088                 /* Check the guest TLB. */
1089                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1090                 if (gtlb_index < 0) {
1091                         /* The guest didn't have a mapping for it. */
1092                         kvmppc_core_queue_dtlb_miss(vcpu,
1093                                                     vcpu->arch.fault_dear,
1094                                                     vcpu->arch.fault_esr);
1095                         kvmppc_mmu_dtlb_miss(vcpu);
1096                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1097                         r = RESUME_GUEST;
1098                         break;
1099                 }
1100
1101                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1102
1103                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1104                 gfn = gpaddr >> PAGE_SHIFT;
1105
1106                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1107                         /* The guest TLB had a mapping, but the shadow TLB
1108                          * didn't, and it is RAM. This could be because:
1109                          * a) the entry is mapping the host kernel, or
1110                          * b) the guest used a large mapping which we're faking
1111                          * Either way, we need to satisfy the fault without
1112                          * invoking the guest. */
1113                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1114                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1115                         r = RESUME_GUEST;
1116                 } else {
1117                         /* Guest has mapped and accessed a page which is not
1118                          * actually RAM. */
1119                         vcpu->arch.paddr_accessed = gpaddr;
1120                         vcpu->arch.vaddr_accessed = eaddr;
1121                         r = kvmppc_emulate_mmio(run, vcpu);
1122                         kvmppc_account_exit(vcpu, MMIO_EXITS);
1123                 }
1124
1125                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1126                 break;
1127         }
1128
1129         case BOOKE_INTERRUPT_ITLB_MISS: {
1130                 unsigned long eaddr = vcpu->arch.pc;
1131                 gpa_t gpaddr;
1132                 gfn_t gfn;
1133                 int gtlb_index;
1134
1135                 r = RESUME_GUEST;
1136
1137                 /* Check the guest TLB. */
1138                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1139                 if (gtlb_index < 0) {
1140                         /* The guest didn't have a mapping for it. */
1141                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1142                         kvmppc_mmu_itlb_miss(vcpu);
1143                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1144                         break;
1145                 }
1146
1147                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1148
1149                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1150
1151                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1152                 gfn = gpaddr >> PAGE_SHIFT;
1153
1154                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1155                         /* The guest TLB had a mapping, but the shadow TLB
1156                          * didn't. This could be because:
1157                          * a) the entry is mapping the host kernel, or
1158                          * b) the guest used a large mapping which we're faking
1159                          * Either way, we need to satisfy the fault without
1160                          * invoking the guest. */
1161                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1162                 } else {
1163                         /* Guest mapped and leaped at non-RAM! */
1164                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1165                 }
1166
1167                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1168                 break;
1169         }
1170
1171         case BOOKE_INTERRUPT_DEBUG: {
1172                 r = kvmppc_handle_debug(run, vcpu);
1173                 if (r == RESUME_HOST)
1174                         run->exit_reason = KVM_EXIT_DEBUG;
1175                 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1176                 break;
1177         }
1178
1179         default:
1180                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1181                 BUG();
1182         }
1183
1184         /*
1185          * To avoid clobbering exit_reason, only check for signals if we
1186          * aren't already exiting to userspace for some other reason.
1187          */
1188         if (!(r & RESUME_HOST)) {
1189                 s = kvmppc_prepare_to_enter(vcpu);
1190                 if (s <= 0)
1191                         r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1192                 else {
1193                         /* interrupts now hard-disabled */
1194                         kvmppc_fix_ee_before_entry();
1195                 }
1196         }
1197
1198         return r;
1199 }
1200
1201 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1202 {
1203         u32 old_tsr = vcpu->arch.tsr;
1204
1205         vcpu->arch.tsr = new_tsr;
1206
1207         if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1208                 arm_next_watchdog(vcpu);
1209
1210         update_timer_ints(vcpu);
1211 }
1212
1213 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1214 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1215 {
1216         int i;
1217         int r;
1218
1219         vcpu->arch.pc = 0;
1220         vcpu->arch.shared->pir = vcpu->vcpu_id;
1221         kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1222         kvmppc_set_msr(vcpu, 0);
1223
1224 #ifndef CONFIG_KVM_BOOKE_HV
1225         vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1226         vcpu->arch.shadow_pid = 1;
1227         vcpu->arch.shared->msr = 0;
1228 #endif
1229
1230         /* Eye-catching numbers so we know if the guest takes an interrupt
1231          * before it's programmed its own IVPR/IVORs. */
1232         vcpu->arch.ivpr = 0x55550000;
1233         for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1234                 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1235
1236         kvmppc_init_timing_stats(vcpu);
1237
1238         r = kvmppc_core_vcpu_setup(vcpu);
1239         kvmppc_sanity_check(vcpu);
1240         return r;
1241 }
1242
1243 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1244 {
1245         /* setup watchdog timer once */
1246         spin_lock_init(&vcpu->arch.wdt_lock);
1247         setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1248                     (unsigned long)vcpu);
1249
1250         return 0;
1251 }
1252
1253 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1254 {
1255         del_timer_sync(&vcpu->arch.wdt_timer);
1256 }
1257
1258 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1259 {
1260         int i;
1261
1262         regs->pc = vcpu->arch.pc;
1263         regs->cr = kvmppc_get_cr(vcpu);
1264         regs->ctr = vcpu->arch.ctr;
1265         regs->lr = vcpu->arch.lr;
1266         regs->xer = kvmppc_get_xer(vcpu);
1267         regs->msr = vcpu->arch.shared->msr;
1268         regs->srr0 = vcpu->arch.shared->srr0;
1269         regs->srr1 = vcpu->arch.shared->srr1;
1270         regs->pid = vcpu->arch.pid;
1271         regs->sprg0 = vcpu->arch.shared->sprg0;
1272         regs->sprg1 = vcpu->arch.shared->sprg1;
1273         regs->sprg2 = vcpu->arch.shared->sprg2;
1274         regs->sprg3 = vcpu->arch.shared->sprg3;
1275         regs->sprg4 = vcpu->arch.shared->sprg4;
1276         regs->sprg5 = vcpu->arch.shared->sprg5;
1277         regs->sprg6 = vcpu->arch.shared->sprg6;
1278         regs->sprg7 = vcpu->arch.shared->sprg7;
1279
1280         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1281                 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1282
1283         return 0;
1284 }
1285
1286 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1287 {
1288         int i;
1289
1290         vcpu->arch.pc = regs->pc;
1291         kvmppc_set_cr(vcpu, regs->cr);
1292         vcpu->arch.ctr = regs->ctr;
1293         vcpu->arch.lr = regs->lr;
1294         kvmppc_set_xer(vcpu, regs->xer);
1295         kvmppc_set_msr(vcpu, regs->msr);
1296         vcpu->arch.shared->srr0 = regs->srr0;
1297         vcpu->arch.shared->srr1 = regs->srr1;
1298         kvmppc_set_pid(vcpu, regs->pid);
1299         vcpu->arch.shared->sprg0 = regs->sprg0;
1300         vcpu->arch.shared->sprg1 = regs->sprg1;
1301         vcpu->arch.shared->sprg2 = regs->sprg2;
1302         vcpu->arch.shared->sprg3 = regs->sprg3;
1303         vcpu->arch.shared->sprg4 = regs->sprg4;
1304         vcpu->arch.shared->sprg5 = regs->sprg5;
1305         vcpu->arch.shared->sprg6 = regs->sprg6;
1306         vcpu->arch.shared->sprg7 = regs->sprg7;
1307
1308         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1309                 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1310
1311         return 0;
1312 }
1313
1314 static void get_sregs_base(struct kvm_vcpu *vcpu,
1315                            struct kvm_sregs *sregs)
1316 {
1317         u64 tb = get_tb();
1318
1319         sregs->u.e.features |= KVM_SREGS_E_BASE;
1320
1321         sregs->u.e.csrr0 = vcpu->arch.csrr0;
1322         sregs->u.e.csrr1 = vcpu->arch.csrr1;
1323         sregs->u.e.mcsr = vcpu->arch.mcsr;
1324         sregs->u.e.esr = get_guest_esr(vcpu);
1325         sregs->u.e.dear = get_guest_dear(vcpu);
1326         sregs->u.e.tsr = vcpu->arch.tsr;
1327         sregs->u.e.tcr = vcpu->arch.tcr;
1328         sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1329         sregs->u.e.tb = tb;
1330         sregs->u.e.vrsave = vcpu->arch.vrsave;
1331 }
1332
1333 static int set_sregs_base(struct kvm_vcpu *vcpu,
1334                           struct kvm_sregs *sregs)
1335 {
1336         if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1337                 return 0;
1338
1339         vcpu->arch.csrr0 = sregs->u.e.csrr0;
1340         vcpu->arch.csrr1 = sregs->u.e.csrr1;
1341         vcpu->arch.mcsr = sregs->u.e.mcsr;
1342         set_guest_esr(vcpu, sregs->u.e.esr);
1343         set_guest_dear(vcpu, sregs->u.e.dear);
1344         vcpu->arch.vrsave = sregs->u.e.vrsave;
1345         kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1346
1347         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1348                 vcpu->arch.dec = sregs->u.e.dec;
1349                 kvmppc_emulate_dec(vcpu);
1350         }
1351
1352         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1353                 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1354
1355         return 0;
1356 }
1357
1358 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1359                               struct kvm_sregs *sregs)
1360 {
1361         sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1362
1363         sregs->u.e.pir = vcpu->vcpu_id;
1364         sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1365         sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1366         sregs->u.e.decar = vcpu->arch.decar;
1367         sregs->u.e.ivpr = vcpu->arch.ivpr;
1368 }
1369
1370 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1371                              struct kvm_sregs *sregs)
1372 {
1373         if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1374                 return 0;
1375
1376         if (sregs->u.e.pir != vcpu->vcpu_id)
1377                 return -EINVAL;
1378
1379         vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1380         vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1381         vcpu->arch.decar = sregs->u.e.decar;
1382         vcpu->arch.ivpr = sregs->u.e.ivpr;
1383
1384         return 0;
1385 }
1386
1387 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1388 {
1389         sregs->u.e.features |= KVM_SREGS_E_IVOR;
1390
1391         sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1392         sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1393         sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1394         sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1395         sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1396         sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1397         sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1398         sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1399         sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1400         sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1401         sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1402         sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1403         sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1404         sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1405         sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1406         sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1407         return 0;
1408 }
1409
1410 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1411 {
1412         if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1413                 return 0;
1414
1415         vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1416         vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1417         vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1418         vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1419         vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1420         vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1421         vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1422         vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1423         vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1424         vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1425         vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1426         vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1427         vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1428         vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1429         vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1430         vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1431
1432         return 0;
1433 }
1434
1435 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1436                                   struct kvm_sregs *sregs)
1437 {
1438         sregs->pvr = vcpu->arch.pvr;
1439
1440         get_sregs_base(vcpu, sregs);
1441         get_sregs_arch206(vcpu, sregs);
1442         return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1443 }
1444
1445 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1446                                   struct kvm_sregs *sregs)
1447 {
1448         int ret;
1449
1450         if (vcpu->arch.pvr != sregs->pvr)
1451                 return -EINVAL;
1452
1453         ret = set_sregs_base(vcpu, sregs);
1454         if (ret < 0)
1455                 return ret;
1456
1457         ret = set_sregs_arch206(vcpu, sregs);
1458         if (ret < 0)
1459                 return ret;
1460
1461         return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1462 }
1463
1464 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1465 {
1466         int r = 0;
1467         union kvmppc_one_reg val;
1468         int size;
1469
1470         size = one_reg_size(reg->id);
1471         if (size > sizeof(val))
1472                 return -EINVAL;
1473
1474         switch (reg->id) {
1475         case KVM_REG_PPC_IAC1:
1476                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac1);
1477                 break;
1478         case KVM_REG_PPC_IAC2:
1479                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac2);
1480                 break;
1481 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1482         case KVM_REG_PPC_IAC3:
1483                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac3);
1484                 break;
1485         case KVM_REG_PPC_IAC4:
1486                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac4);
1487                 break;
1488 #endif
1489         case KVM_REG_PPC_DAC1:
1490                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac1);
1491                 break;
1492         case KVM_REG_PPC_DAC2:
1493                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac2);
1494                 break;
1495         case KVM_REG_PPC_EPR: {
1496                 u32 epr = get_guest_epr(vcpu);
1497                 val = get_reg_val(reg->id, epr);
1498                 break;
1499         }
1500 #if defined(CONFIG_64BIT)
1501         case KVM_REG_PPC_EPCR:
1502                 val = get_reg_val(reg->id, vcpu->arch.epcr);
1503                 break;
1504 #endif
1505         case KVM_REG_PPC_TCR:
1506                 val = get_reg_val(reg->id, vcpu->arch.tcr);
1507                 break;
1508         case KVM_REG_PPC_TSR:
1509                 val = get_reg_val(reg->id, vcpu->arch.tsr);
1510                 break;
1511         case KVM_REG_PPC_DEBUG_INST:
1512                 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV_DEBUG);
1513                 break;
1514         case KVM_REG_PPC_VRSAVE:
1515                 val = get_reg_val(reg->id, vcpu->arch.vrsave);
1516                 break;
1517         default:
1518                 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val);
1519                 break;
1520         }
1521
1522         if (r)
1523                 return r;
1524
1525         if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1526                 r = -EFAULT;
1527
1528         return r;
1529 }
1530
1531 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1532 {
1533         int r = 0;
1534         union kvmppc_one_reg val;
1535         int size;
1536
1537         size = one_reg_size(reg->id);
1538         if (size > sizeof(val))
1539                 return -EINVAL;
1540
1541         if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1542                 return -EFAULT;
1543
1544         switch (reg->id) {
1545         case KVM_REG_PPC_IAC1:
1546                 vcpu->arch.dbg_reg.iac1 = set_reg_val(reg->id, val);
1547                 break;
1548         case KVM_REG_PPC_IAC2:
1549                 vcpu->arch.dbg_reg.iac2 = set_reg_val(reg->id, val);
1550                 break;
1551 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1552         case KVM_REG_PPC_IAC3:
1553                 vcpu->arch.dbg_reg.iac3 = set_reg_val(reg->id, val);
1554                 break;
1555         case KVM_REG_PPC_IAC4:
1556                 vcpu->arch.dbg_reg.iac4 = set_reg_val(reg->id, val);
1557                 break;
1558 #endif
1559         case KVM_REG_PPC_DAC1:
1560                 vcpu->arch.dbg_reg.dac1 = set_reg_val(reg->id, val);
1561                 break;
1562         case KVM_REG_PPC_DAC2:
1563                 vcpu->arch.dbg_reg.dac2 = set_reg_val(reg->id, val);
1564                 break;
1565         case KVM_REG_PPC_EPR: {
1566                 u32 new_epr = set_reg_val(reg->id, val);
1567                 kvmppc_set_epr(vcpu, new_epr);
1568                 break;
1569         }
1570 #if defined(CONFIG_64BIT)
1571         case KVM_REG_PPC_EPCR: {
1572                 u32 new_epcr = set_reg_val(reg->id, val);
1573                 kvmppc_set_epcr(vcpu, new_epcr);
1574                 break;
1575         }
1576 #endif
1577         case KVM_REG_PPC_OR_TSR: {
1578                 u32 tsr_bits = set_reg_val(reg->id, val);
1579                 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1580                 break;
1581         }
1582         case KVM_REG_PPC_CLEAR_TSR: {
1583                 u32 tsr_bits = set_reg_val(reg->id, val);
1584                 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1585                 break;
1586         }
1587         case KVM_REG_PPC_TSR: {
1588                 u32 tsr = set_reg_val(reg->id, val);
1589                 kvmppc_set_tsr(vcpu, tsr);
1590                 break;
1591         }
1592         case KVM_REG_PPC_TCR: {
1593                 u32 tcr = set_reg_val(reg->id, val);
1594                 kvmppc_set_tcr(vcpu, tcr);
1595                 break;
1596         }
1597         case KVM_REG_PPC_VRSAVE:
1598                 vcpu->arch.vrsave = set_reg_val(reg->id, val);
1599                 break;
1600         default:
1601                 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val);
1602                 break;
1603         }
1604
1605         return r;
1606 }
1607
1608 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1609 {
1610         return -ENOTSUPP;
1611 }
1612
1613 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1614 {
1615         return -ENOTSUPP;
1616 }
1617
1618 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1619                                   struct kvm_translation *tr)
1620 {
1621         int r;
1622
1623         r = kvmppc_core_vcpu_translate(vcpu, tr);
1624         return r;
1625 }
1626
1627 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1628 {
1629         return -ENOTSUPP;
1630 }
1631
1632 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1633                               struct kvm_memory_slot *dont)
1634 {
1635 }
1636
1637 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1638                                unsigned long npages)
1639 {
1640         return 0;
1641 }
1642
1643 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1644                                       struct kvm_memory_slot *memslot,
1645                                       struct kvm_userspace_memory_region *mem)
1646 {
1647         return 0;
1648 }
1649
1650 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1651                                 struct kvm_userspace_memory_region *mem,
1652                                 const struct kvm_memory_slot *old)
1653 {
1654 }
1655
1656 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1657 {
1658 }
1659
1660 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1661 {
1662 #if defined(CONFIG_64BIT)
1663         vcpu->arch.epcr = new_epcr;
1664 #ifdef CONFIG_KVM_BOOKE_HV
1665         vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1666         if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1667                 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1668 #endif
1669 #endif
1670 }
1671
1672 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1673 {
1674         vcpu->arch.tcr = new_tcr;
1675         arm_next_watchdog(vcpu);
1676         update_timer_ints(vcpu);
1677 }
1678
1679 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1680 {
1681         set_bits(tsr_bits, &vcpu->arch.tsr);
1682         smp_wmb();
1683         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1684         kvm_vcpu_kick(vcpu);
1685 }
1686
1687 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1688 {
1689         clear_bits(tsr_bits, &vcpu->arch.tsr);
1690
1691         /*
1692          * We may have stopped the watchdog due to
1693          * being stuck on final expiration.
1694          */
1695         if (tsr_bits & (TSR_ENW | TSR_WIS))
1696                 arm_next_watchdog(vcpu);
1697
1698         update_timer_ints(vcpu);
1699 }
1700
1701 void kvmppc_decrementer_func(unsigned long data)
1702 {
1703         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1704
1705         if (vcpu->arch.tcr & TCR_ARE) {
1706                 vcpu->arch.dec = vcpu->arch.decar;
1707                 kvmppc_emulate_dec(vcpu);
1708         }
1709
1710         kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1711 }
1712
1713 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1714                                        uint64_t addr, int index)
1715 {
1716         switch (index) {
1717         case 0:
1718                 dbg_reg->dbcr0 |= DBCR0_IAC1;
1719                 dbg_reg->iac1 = addr;
1720                 break;
1721         case 1:
1722                 dbg_reg->dbcr0 |= DBCR0_IAC2;
1723                 dbg_reg->iac2 = addr;
1724                 break;
1725 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1726         case 2:
1727                 dbg_reg->dbcr0 |= DBCR0_IAC3;
1728                 dbg_reg->iac3 = addr;
1729                 break;
1730         case 3:
1731                 dbg_reg->dbcr0 |= DBCR0_IAC4;
1732                 dbg_reg->iac4 = addr;
1733                 break;
1734 #endif
1735         default:
1736                 return -EINVAL;
1737         }
1738
1739         dbg_reg->dbcr0 |= DBCR0_IDM;
1740         return 0;
1741 }
1742
1743 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1744                                        int type, int index)
1745 {
1746         switch (index) {
1747         case 0:
1748                 if (type & KVMPPC_DEBUG_WATCH_READ)
1749                         dbg_reg->dbcr0 |= DBCR0_DAC1R;
1750                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1751                         dbg_reg->dbcr0 |= DBCR0_DAC1W;
1752                 dbg_reg->dac1 = addr;
1753                 break;
1754         case 1:
1755                 if (type & KVMPPC_DEBUG_WATCH_READ)
1756                         dbg_reg->dbcr0 |= DBCR0_DAC2R;
1757                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1758                         dbg_reg->dbcr0 |= DBCR0_DAC2W;
1759                 dbg_reg->dac2 = addr;
1760                 break;
1761         default:
1762                 return -EINVAL;
1763         }
1764
1765         dbg_reg->dbcr0 |= DBCR0_IDM;
1766         return 0;
1767 }
1768 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1769 {
1770         /* XXX: Add similar MSR protection for BookE-PR */
1771 #ifdef CONFIG_KVM_BOOKE_HV
1772         BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1773         if (set) {
1774                 if (prot_bitmap & MSR_UCLE)
1775                         vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1776                 if (prot_bitmap & MSR_DE)
1777                         vcpu->arch.shadow_msrp |= MSRP_DEP;
1778                 if (prot_bitmap & MSR_PMM)
1779                         vcpu->arch.shadow_msrp |= MSRP_PMMP;
1780         } else {
1781                 if (prot_bitmap & MSR_UCLE)
1782                         vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1783                 if (prot_bitmap & MSR_DE)
1784                         vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1785                 if (prot_bitmap & MSR_PMM)
1786                         vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1787         }
1788 #endif
1789 }
1790
1791 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1792                                          struct kvm_guest_debug *dbg)
1793 {
1794         struct debug_reg *dbg_reg;
1795         int n, b = 0, w = 0;
1796
1797         if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1798                 vcpu->arch.shadow_dbg_reg.dbcr0 = 0;
1799                 vcpu->guest_debug = 0;
1800                 kvm_guest_protect_msr(vcpu, MSR_DE, false);
1801                 return 0;
1802         }
1803
1804         kvm_guest_protect_msr(vcpu, MSR_DE, true);
1805         vcpu->guest_debug = dbg->control;
1806         vcpu->arch.shadow_dbg_reg.dbcr0 = 0;
1807         /* Set DBCR0_EDM in guest visible DBCR0 register. */
1808         vcpu->arch.dbg_reg.dbcr0 = DBCR0_EDM;
1809
1810         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
1811                 vcpu->arch.shadow_dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1812
1813         /* Code below handles only HW breakpoints */
1814         dbg_reg = &(vcpu->arch.shadow_dbg_reg);
1815
1816 #ifdef CONFIG_KVM_BOOKE_HV
1817         /*
1818          * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
1819          * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
1820          */
1821         dbg_reg->dbcr1 = 0;
1822         dbg_reg->dbcr2 = 0;
1823 #else
1824         /*
1825          * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
1826          * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
1827          * is set.
1828          */
1829         dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
1830                           DBCR1_IAC4US;
1831         dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
1832 #endif
1833
1834         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1835                 return 0;
1836
1837         for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
1838                 uint64_t addr = dbg->arch.bp[n].addr;
1839                 uint32_t type = dbg->arch.bp[n].type;
1840
1841                 if (type == KVMPPC_DEBUG_NONE)
1842                         continue;
1843
1844                 if (type & !(KVMPPC_DEBUG_WATCH_READ |
1845                              KVMPPC_DEBUG_WATCH_WRITE |
1846                              KVMPPC_DEBUG_BREAKPOINT))
1847                         return -EINVAL;
1848
1849                 if (type & KVMPPC_DEBUG_BREAKPOINT) {
1850                         /* Setting H/W breakpoint */
1851                         if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
1852                                 return -EINVAL;
1853                 } else {
1854                         /* Setting H/W watchpoint */
1855                         if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
1856                                                         type, w++))
1857                                 return -EINVAL;
1858                 }
1859         }
1860
1861         return 0;
1862 }
1863
1864 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1865 {
1866         vcpu->cpu = smp_processor_id();
1867         current->thread.kvm_vcpu = vcpu;
1868 }
1869
1870 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1871 {
1872         current->thread.kvm_vcpu = NULL;
1873         vcpu->cpu = -1;
1874
1875         /* Clear pending debug event in DBSR */
1876         kvmppc_clear_dbsr();
1877 }
1878
1879 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1880 {
1881         vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
1882 }
1883
1884 int kvmppc_core_init_vm(struct kvm *kvm)
1885 {
1886         return kvm->arch.kvm_ops->init_vm(kvm);
1887 }
1888
1889 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
1890 {
1891         return kvm->arch.kvm_ops->vcpu_create(kvm, id);
1892 }
1893
1894 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1895 {
1896         vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
1897 }
1898
1899 void kvmppc_core_destroy_vm(struct kvm *kvm)
1900 {
1901         kvm->arch.kvm_ops->destroy_vm(kvm);
1902 }
1903
1904 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1905 {
1906         vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
1907 }
1908
1909 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
1910 {
1911         vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
1912 }
1913
1914 int __init kvmppc_booke_init(void)
1915 {
1916 #ifndef CONFIG_KVM_BOOKE_HV
1917         unsigned long ivor[16];
1918         unsigned long *handler = kvmppc_booke_handler_addr;
1919         unsigned long max_ivor = 0;
1920         unsigned long handler_len;
1921         int i;
1922
1923         /* We install our own exception handlers by hijacking IVPR. IVPR must
1924          * be 16-bit aligned, so we need a 64KB allocation. */
1925         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1926                                                  VCPU_SIZE_ORDER);
1927         if (!kvmppc_booke_handlers)
1928                 return -ENOMEM;
1929
1930         /* XXX make sure our handlers are smaller than Linux's */
1931
1932         /* Copy our interrupt handlers to match host IVORs. That way we don't
1933          * have to swap the IVORs on every guest/host transition. */
1934         ivor[0] = mfspr(SPRN_IVOR0);
1935         ivor[1] = mfspr(SPRN_IVOR1);
1936         ivor[2] = mfspr(SPRN_IVOR2);
1937         ivor[3] = mfspr(SPRN_IVOR3);
1938         ivor[4] = mfspr(SPRN_IVOR4);
1939         ivor[5] = mfspr(SPRN_IVOR5);
1940         ivor[6] = mfspr(SPRN_IVOR6);
1941         ivor[7] = mfspr(SPRN_IVOR7);
1942         ivor[8] = mfspr(SPRN_IVOR8);
1943         ivor[9] = mfspr(SPRN_IVOR9);
1944         ivor[10] = mfspr(SPRN_IVOR10);
1945         ivor[11] = mfspr(SPRN_IVOR11);
1946         ivor[12] = mfspr(SPRN_IVOR12);
1947         ivor[13] = mfspr(SPRN_IVOR13);
1948         ivor[14] = mfspr(SPRN_IVOR14);
1949         ivor[15] = mfspr(SPRN_IVOR15);
1950
1951         for (i = 0; i < 16; i++) {
1952                 if (ivor[i] > max_ivor)
1953                         max_ivor = i;
1954
1955                 handler_len = handler[i + 1] - handler[i];
1956                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1957                        (void *)handler[i], handler_len);
1958         }
1959
1960         handler_len = handler[max_ivor + 1] - handler[max_ivor];
1961         flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
1962                            ivor[max_ivor] + handler_len);
1963 #endif /* !BOOKE_HV */
1964         return 0;
1965 }
1966
1967 void __exit kvmppc_booke_exit(void)
1968 {
1969         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1970         kvm_exit();
1971 }