Pileus Git - ~andy/linux/blob - arch/blackfin/mach-bf609/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/i2c.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/usb/musb.h>
  20 #include <linux/pinctrl/machine.h>
  21 #include <linux/pinctrl/pinconf-generic.h>
  22 #include <linux/platform_data/pinctrl-adi2.h>
  23 #include <asm/bfin_spi3.h>
  24 #include <asm/dma.h>
  25 #include <asm/gpio.h>
  26 #include <asm/nand.h>
  27 #include <asm/dpmc.h>
  28 #include <asm/portmux.h>
  29 #include <asm/bfin_sdh.h>
  30 #include <linux/input.h>
  31 #include <linux/spi/ad7877.h>
  32
  33 /*
  34  * Name the Board for the /proc/cpuinfo
  35  */
  36 const char bfin_board_name[] = "ADI BF609-EZKIT";
  37
  38 /*
  39  *  Driver needs to know address, irq and flag pin.
  40  */
  41
  42 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  43 #include <linux/usb/isp1760.h>
  44 static struct resource bfin_isp1760_resources[] = {
  45         [0] = {
  46                 .start  = 0x2C0C0000,
  47                 .end    = 0x2C0C0000 + 0xfffff,
  48                 .flags  = IORESOURCE_MEM,
  49         },
  50         [1] = {
  51                 .start  = IRQ_PG7,
  52                 .end    = IRQ_PG7,
  53                 .flags  = IORESOURCE_IRQ,
  54         },
  55 };
  56
  57 static struct isp1760_platform_data isp1760_priv = {
  58         .is_isp1761 = 0,
  59         .bus_width_16 = 1,
  60         .port1_otg = 0,
  61         .analog_oc = 0,
  62         .dack_polarity_high = 0,
  63         .dreq_polarity_high = 0,
  64 };
  65
  66 static struct platform_device bfin_isp1760_device = {
  67         .name           = "isp1760",
  68         .id             = 0,
  69         .dev = {
  70                 .platform_data = &isp1760_priv,
  71         },
  72         .num_resources  = ARRAY_SIZE(bfin_isp1760_resources),
  73         .resource       = bfin_isp1760_resources,
  74 };
  75 #endif
  76
  77 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  78 #include <asm/bfin_rotary.h>
  79
  80 static struct bfin_rotary_platform_data bfin_rotary_data = {
  81         /*.rotary_up_key     = KEY_UP,*/
  82         /*.rotary_down_key   = KEY_DOWN,*/
  83         .rotary_rel_code   = REL_WHEEL,
  84         .rotary_button_key = KEY_ENTER,
  85         .debounce          = 10,        /* 0..17 */
  86         .mode              = ROT_QUAD_ENC | ROT_DEBE,
  87 };
  88
  89 static struct resource bfin_rotary_resources[] = {
  90         {
  91                 .start = IRQ_CNT,
  92                 .end = IRQ_CNT,
  93                 .flags = IORESOURCE_IRQ,
  94         },
  95 };
  96
  97 static struct platform_device bfin_rotary_device = {
  98         .name           = "bfin-rotary",
  99         .id             = -1,
 100         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
 101         .resource       = bfin_rotary_resources,
 102         .dev            = {
 103                 .platform_data = &bfin_rotary_data,
 104         },
 105 };
 106 #endif
 107
 108 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
 109 #include <linux/stmmac.h>
 110 #include <linux/phy.h>
 111
 112 static struct stmmac_mdio_bus_data phy_private_data = {
 113         .phy_mask = 1,
 114 };
 115
 116 static struct stmmac_dma_cfg eth_dma_cfg = {
 117         .pbl    = 2,
 118 };
 119
 120 int stmmac_ptp_clk_init(struct platform_device *pdev, void *priv)
 121 {
 122         bfin_write32(PADS0_EMAC_PTP_CLKSEL, 0);
 123         return 0;
 124 }
 125
 126 static struct plat_stmmacenet_data eth_private_data = {
 127         .has_gmac = 1,
 128         .bus_id   = 0,
 129         .enh_desc = 1,
 130         .phy_addr = 1,
 131         .mdio_bus_data = &phy_private_data,
 132         .dma_cfg  = &eth_dma_cfg,
 133         .force_thresh_dma_mode = 1,
 134         .interface = PHY_INTERFACE_MODE_RMII,
 135         .init = stmmac_ptp_clk_init,
 136 };
 137
 138 static struct platform_device bfin_eth_device = {
 139         .name           = "stmmaceth",
 140         .id             = 0,
 141         .num_resources  = 2,
 142         .resource       = (struct resource[]) {
 143                 {
 144                         .start  = EMAC0_MACCFG,
 145                         .end    = EMAC0_MACCFG + 0x1274,
 146                         .flags  = IORESOURCE_MEM,
 147                 },
 148                 {
 149                         .name   = "macirq",
 150                         .start  = IRQ_EMAC0_STAT,
 151                         .end    = IRQ_EMAC0_STAT,
 152                         .flags  = IORESOURCE_IRQ,
 153                 },
 154         },
 155         .dev = {
 156                 .power.can_wakeup = 1,
 157                 .platform_data = &eth_private_data,
 158         }
 159 };
 160 #endif
 161
 162 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 163 #include <linux/input/adxl34x.h>
 164 static const struct adxl34x_platform_data adxl34x_info = {
 165         .x_axis_offset = 0,
 166         .y_axis_offset = 0,
 167         .z_axis_offset = 0,
 168         .tap_threshold = 0x31,
 169         .tap_duration = 0x10,
 170         .tap_latency = 0x60,
 171         .tap_window = 0xF0,
 172         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 173         .act_axis_control = 0xFF,
 174         .activity_threshold = 5,
 175         .inactivity_threshold = 3,
 176         .inactivity_time = 4,
 177         .free_fall_threshold = 0x7,
 178         .free_fall_time = 0x20,
 179         .data_rate = 0x8,
 180         .data_range = ADXL_FULL_RES,
 181
 182         .ev_type = EV_ABS,
 183         .ev_code_x = ABS_X,             /* EV_REL */
 184         .ev_code_y = ABS_Y,             /* EV_REL */
 185         .ev_code_z = ABS_Z,             /* EV_REL */
 186
 187         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 188
 189 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 190 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
 191         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 192         .fifo_mode = ADXL_FIFO_STREAM,
 193         .orientation_enable = ADXL_EN_ORIENTATION_3D,
 194         .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
 195         .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
 196         /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
 197         .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 198 };
 199 #endif
 200
 201 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 202 static struct platform_device rtc_device = {
 203         .name = "rtc-bfin",
 204         .id   = -1,
 205 };
 206 #endif
 207
 208 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 209 #ifdef CONFIG_SERIAL_BFIN_UART0
 210 static struct resource bfin_uart0_resources[] = {
 211         {
 212                 .start = UART0_REVID,
 213                 .end = UART0_RXDIV+4,
 214                 .flags = IORESOURCE_MEM,
 215         },
 216 #ifdef CONFIG_EARLY_PRINTK
 217         {
 218                 .start = PORTD_FER,
 219                 .end = PORTD_FER+2,
 220                 .flags = IORESOURCE_REG,
 221         },
 222         {
 223                 .start = PORTD_MUX,
 224                 .end = PORTD_MUX+3,
 225                 .flags = IORESOURCE_REG,
 226         },
 227 #endif
 228         {
 229                 .start = IRQ_UART0_TX,
 230                 .end = IRQ_UART0_TX,
 231                 .flags = IORESOURCE_IRQ,
 232         },
 233         {
 234                 .start = IRQ_UART0_RX,
 235                 .end = IRQ_UART0_RX,
 236                 .flags = IORESOURCE_IRQ,
 237         },
 238         {
 239                 .start = IRQ_UART0_STAT,
 240                 .end = IRQ_UART0_STAT,
 241                 .flags = IORESOURCE_IRQ,
 242         },
 243         {
 244                 .start = CH_UART0_TX,
 245                 .end = CH_UART0_TX,
 246                 .flags = IORESOURCE_DMA,
 247         },
 248         {
 249                 .start = CH_UART0_RX,
 250                 .end = CH_UART0_RX,
 251                 .flags = IORESOURCE_DMA,
 252         },
 253 #ifdef CONFIG_BFIN_UART0_CTSRTS
 254         {       /* CTS pin -- 0 means not supported */
 255                 .start = GPIO_PD10,
 256                 .end = GPIO_PD10,
 257                 .flags = IORESOURCE_IO,
 258         },
 259         {       /* RTS pin -- 0 means not supported */
 260                 .start = GPIO_PD9,
 261                 .end = GPIO_PD9,
 262                 .flags = IORESOURCE_IO,
 263         },
 264 #endif
 265 };
 266
 267 static unsigned short bfin_uart0_peripherals[] = {
 268         P_UART0_TX, P_UART0_RX,
 269 #ifdef CONFIG_BFIN_UART0_CTSRTS
 270         P_UART0_RTS, P_UART0_CTS,
 271 #endif
 272         0
 273 };
 274
 275 static struct platform_device bfin_uart0_device = {
 276         .name = "bfin-uart",
 277         .id = 0,
 278         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 279         .resource = bfin_uart0_resources,
 280         .dev = {
 281                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 282         },
 283 };
 284 #endif
 285 #ifdef CONFIG_SERIAL_BFIN_UART1
 286 static struct resource bfin_uart1_resources[] = {
 287         {
 288                 .start = UART1_REVID,
 289                 .end = UART1_RXDIV+4,
 290                 .flags = IORESOURCE_MEM,
 291         },
 292 #ifdef CONFIG_EARLY_PRINTK
 293         {
 294                 .start = PORTG_FER_SET,
 295                 .end = PORTG_FER_SET+2,
 296                 .flags = IORESOURCE_REG,
 297         },
 298 #endif
 299         {
 300                 .start = IRQ_UART1_TX,
 301                 .end = IRQ_UART1_TX,
 302                 .flags = IORESOURCE_IRQ,
 303         },
 304         {
 305                 .start = IRQ_UART1_RX,
 306                 .end = IRQ_UART1_RX,
 307                 .flags = IORESOURCE_IRQ,
 308         },
 309         {
 310                 .start = IRQ_UART1_STAT,
 311                 .end = IRQ_UART1_STAT,
 312                 .flags = IORESOURCE_IRQ,
 313         },
 314         {
 315                 .start = CH_UART1_TX,
 316                 .end = CH_UART1_TX,
 317                 .flags = IORESOURCE_DMA,
 318         },
 319         {
 320                 .start = CH_UART1_RX,
 321                 .end = CH_UART1_RX,
 322                 .flags = IORESOURCE_DMA,
 323         },
 324 #ifdef CONFIG_BFIN_UART1_CTSRTS
 325         {       /* CTS pin -- 0 means not supported */
 326                 .start = GPIO_PG13,
 327                 .end = GPIO_PG13,
 328                 .flags = IORESOURCE_IO,
 329         },
 330         {       /* RTS pin -- 0 means not supported */
 331                 .start = GPIO_PG10,
 332                 .end = GPIO_PG10,
 333                 .flags = IORESOURCE_IO,
 334         },
 335 #endif
 336 };
 337
 338 static unsigned short bfin_uart1_peripherals[] = {
 339         P_UART1_TX, P_UART1_RX,
 340 #ifdef CONFIG_BFIN_UART1_CTSRTS
 341         P_UART1_RTS, P_UART1_CTS,
 342 #endif
 343         0
 344 };
 345
 346 static struct platform_device bfin_uart1_device = {
 347         .name = "bfin-uart",
 348         .id = 1,
 349         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 350         .resource = bfin_uart1_resources,
 351         .dev = {
 352                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 353         },
 354 };
 355 #endif
 356 #endif
 357
 358 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 359 #ifdef CONFIG_BFIN_SIR0
 360 static struct resource bfin_sir0_resources[] = {
 361         {
 362                 .start = 0xFFC00400,
 363                 .end = 0xFFC004FF,
 364                 .flags = IORESOURCE_MEM,
 365         },
 366         {
 367                 .start = IRQ_UART0_TX,
 368                 .end = IRQ_UART0_TX+1,
 369                 .flags = IORESOURCE_IRQ,
 370         },
 371         {
 372                 .start = CH_UART0_TX,
 373                 .end = CH_UART0_TX+1,
 374                 .flags = IORESOURCE_DMA,
 375         },
 376 };
 377 static struct platform_device bfin_sir0_device = {
 378         .name = "bfin_sir",
 379         .id = 0,
 380         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 381         .resource = bfin_sir0_resources,
 382 };
 383 #endif
 384 #ifdef CONFIG_BFIN_SIR1
 385 static struct resource bfin_sir1_resources[] = {
 386         {
 387                 .start = 0xFFC02000,
 388                 .end = 0xFFC020FF,
 389                 .flags = IORESOURCE_MEM,
 390         },
 391         {
 392                 .start = IRQ_UART1_TX,
 393                 .end = IRQ_UART1_TX+1,
 394                 .flags = IORESOURCE_IRQ,
 395         },
 396         {
 397                 .start = CH_UART1_TX,
 398                 .end = CH_UART1_TX+1,
 399                 .flags = IORESOURCE_DMA,
 400         },
 401 };
 402 static struct platform_device bfin_sir1_device = {
 403         .name = "bfin_sir",
 404         .id = 1,
 405         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 406         .resource = bfin_sir1_resources,
 407 };
 408 #endif
 409 #endif
 410
 411 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 412 static struct resource musb_resources[] = {
 413         [0] = {
 414                 .start  = 0xFFCC1000,
 415                 .end    = 0xFFCC1398,
 416                 .flags  = IORESOURCE_MEM,
 417         },
 418         [1] = { /* general IRQ */
 419                 .start  = IRQ_USB_STAT,
 420                 .end    = IRQ_USB_STAT,
 421                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 422                 .name   = "mc"
 423         },
 424         [2] = { /* DMA IRQ */
 425                 .start  = IRQ_USB_DMA,
 426                 .end    = IRQ_USB_DMA,
 427                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 428                 .name   = "dma"
 429         },
 430 };
 431
 432 static struct musb_hdrc_config musb_config = {
 433         .multipoint     = 1,
 434         .dyn_fifo       = 0,
 435         .dma            = 1,
 436         .num_eps        = 16,
 437         .dma_channels   = 8,
 438         .clkin          = 48,           /* musb CLKIN in MHZ */
 439 };
 440
 441 static struct musb_hdrc_platform_data musb_plat = {
 442 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
 443         .mode           = MUSB_OTG,
 444 #elif defined(CONFIG_USB_MUSB_HDRC)
 445         .mode           = MUSB_HOST,
 446 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 447         .mode           = MUSB_PERIPHERAL,
 448 #endif
 449         .config         = &musb_config,
 450 };
 451
 452 static u64 musb_dmamask = ~(u32)0;
 453
 454 static struct platform_device musb_device = {
 455         .name           = "musb-blackfin",
 456         .id             = 0,
 457         .dev = {
 458                 .dma_mask               = &musb_dmamask,
 459                 .coherent_dma_mask      = 0xffffffff,
 460                 .platform_data          = &musb_plat,
 461         },
 462         .num_resources  = ARRAY_SIZE(musb_resources),
 463         .resource       = musb_resources,
 464 };
 465 #endif
 466
 467 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 468 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 469 static struct resource bfin_sport0_uart_resources[] = {
 470         {
 471                 .start = SPORT0_TCR1,
 472                 .end = SPORT0_MRCS3+4,
 473                 .flags = IORESOURCE_MEM,
 474         },
 475         {
 476                 .start = IRQ_SPORT0_RX,
 477                 .end = IRQ_SPORT0_RX+1,
 478                 .flags = IORESOURCE_IRQ,
 479         },
 480         {
 481                 .start = IRQ_SPORT0_ERROR,
 482                 .end = IRQ_SPORT0_ERROR,
 483                 .flags = IORESOURCE_IRQ,
 484         },
 485 };
 486
 487 static unsigned short bfin_sport0_peripherals[] = {
 488         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 489         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 490 };
 491
 492 static struct platform_device bfin_sport0_uart_device = {
 493         .name = "bfin-sport-uart",
 494         .id = 0,
 495         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 496         .resource = bfin_sport0_uart_resources,
 497         .dev = {
 498                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 499         },
 500 };
 501 #endif
 502 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 503 static struct resource bfin_sport1_uart_resources[] = {
 504         {
 505                 .start = SPORT1_TCR1,
 506                 .end = SPORT1_MRCS3+4,
 507                 .flags = IORESOURCE_MEM,
 508         },
 509         {
 510                 .start = IRQ_SPORT1_RX,
 511                 .end = IRQ_SPORT1_RX+1,
 512                 .flags = IORESOURCE_IRQ,
 513         },
 514         {
 515                 .start = IRQ_SPORT1_ERROR,
 516                 .end = IRQ_SPORT1_ERROR,
 517                 .flags = IORESOURCE_IRQ,
 518         },
 519 };
 520
 521 static unsigned short bfin_sport1_peripherals[] = {
 522         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 523         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 524 };
 525
 526 static struct platform_device bfin_sport1_uart_device = {
 527         .name = "bfin-sport-uart",
 528         .id = 1,
 529         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 530         .resource = bfin_sport1_uart_resources,
 531         .dev = {
 532                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 533         },
 534 };
 535 #endif
 536 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 537 static struct resource bfin_sport2_uart_resources[] = {
 538         {
 539                 .start = SPORT2_TCR1,
 540                 .end = SPORT2_MRCS3+4,
 541                 .flags = IORESOURCE_MEM,
 542         },
 543         {
 544                 .start = IRQ_SPORT2_RX,
 545                 .end = IRQ_SPORT2_RX+1,
 546                 .flags = IORESOURCE_IRQ,
 547         },
 548         {
 549                 .start = IRQ_SPORT2_ERROR,
 550                 .end = IRQ_SPORT2_ERROR,
 551                 .flags = IORESOURCE_IRQ,
 552         },
 553 };
 554
 555 static unsigned short bfin_sport2_peripherals[] = {
 556         P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 557         P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 558 };
 559
 560 static struct platform_device bfin_sport2_uart_device = {
 561         .name = "bfin-sport-uart",
 562         .id = 2,
 563         .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 564         .resource = bfin_sport2_uart_resources,
 565         .dev = {
 566                 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 567         },
 568 };
 569 #endif
 570 #endif
 571
 572 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 573
 574 static unsigned short bfin_can0_peripherals[] = {
 575         P_CAN0_RX, P_CAN0_TX, 0
 576 };
 577
 578 static struct resource bfin_can0_resources[] = {
 579         {
 580                 .start = 0xFFC00A00,
 581                 .end = 0xFFC00FFF,
 582                 .flags = IORESOURCE_MEM,
 583         },
 584         {
 585                 .start = IRQ_CAN0_RX,
 586                 .end = IRQ_CAN0_RX,
 587                 .flags = IORESOURCE_IRQ,
 588         },
 589         {
 590                 .start = IRQ_CAN0_TX,
 591                 .end = IRQ_CAN0_TX,
 592                 .flags = IORESOURCE_IRQ,
 593         },
 594         {
 595                 .start = IRQ_CAN0_STAT,
 596                 .end = IRQ_CAN0_STAT,
 597                 .flags = IORESOURCE_IRQ,
 598         },
 599 };
 600
 601 static struct platform_device bfin_can0_device = {
 602         .name = "bfin_can",
 603         .id = 0,
 604         .num_resources = ARRAY_SIZE(bfin_can0_resources),
 605         .resource = bfin_can0_resources,
 606         .dev = {
 607                 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
 608         },
 609 };
 610
 611 #endif
 612
 613 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 614 static struct mtd_partition partition_info[] = {
 615         {
 616                 .name = "bootloader(nand)",
 617                 .offset = 0,
 618                 .size = 0x80000,
 619         }, {
 620                 .name = "linux kernel(nand)",
 621                 .offset = MTDPART_OFS_APPEND,
 622                 .size = 4 * 1024 * 1024,
 623         },
 624         {
 625                 .name = "file system(nand)",
 626                 .offset = MTDPART_OFS_APPEND,
 627                 .size = MTDPART_SIZ_FULL,
 628         },
 629 };
 630
 631 static struct bf5xx_nand_platform bfin_nand_platform = {
 632         .data_width = NFC_NWIDTH_8,
 633         .partitions = partition_info,
 634         .nr_partitions = ARRAY_SIZE(partition_info),
 635         .rd_dly = 3,
 636         .wr_dly = 3,
 637 };
 638
 639 static struct resource bfin_nand_resources[] = {
 640         {
 641                 .start = 0xFFC03B00,
 642                 .end = 0xFFC03B4F,
 643                 .flags = IORESOURCE_MEM,
 644         },
 645         {
 646                 .start = CH_NFC,
 647                 .end = CH_NFC,
 648                 .flags = IORESOURCE_IRQ,
 649         },
 650 };
 651
 652 static struct platform_device bfin_nand_device = {
 653         .name = "bfin-nand",
 654         .id = 0,
 655         .num_resources = ARRAY_SIZE(bfin_nand_resources),
 656         .resource = bfin_nand_resources,
 657         .dev = {
 658                 .platform_data = &bfin_nand_platform,
 659         },
 660 };
 661 #endif
 662
 663 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 664
 665 static struct bfin_sd_host bfin_sdh_data = {
 666         .dma_chan = CH_RSI,
 667         .irq_int0 = IRQ_RSI_INT0,
 668         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 669 };
 670
 671 static struct platform_device bfin_sdh_device = {
 672         .name = "bfin-sdh",
 673         .id = 0,
 674         .dev = {
 675                 .platform_data = &bfin_sdh_data,
 676         },
 677 };
 678 #endif
 679
 680 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 681 static struct mtd_partition ezkit_partitions[] = {
 682         {
 683                 .name       = "bootloader(nor)",
 684                 .size       = 0x80000,
 685                 .offset     = 0,
 686         }, {
 687                 .name       = "linux kernel(nor)",
 688                 .size       = 0x400000,
 689                 .offset     = MTDPART_OFS_APPEND,
 690         }, {
 691                 .name       = "file system(nor)",
 692                 .size       = 0x1000000 - 0x80000 - 0x400000,
 693                 .offset     = MTDPART_OFS_APPEND,
 694         },
 695 };
 696
 697 int bf609_nor_flash_init(struct platform_device *pdev)
 698 {
 699 #define CONFIG_SMC_GCTL_VAL     0x00000010
 700
 701         if (!devm_pinctrl_get_select_default(&pdev->dev))
 702                 return -EBUSY;
 703         bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
 704         bfin_write32(SMC_B0CTL, 0x01002011);
 705         bfin_write32(SMC_B0TIM, 0x08170977);
 706         bfin_write32(SMC_B0ETIM, 0x00092231);
 707         return 0;
 708 }
 709
 710 void bf609_nor_flash_exit(struct platform_device *pdev)
 711 {
 712         devm_pinctrl_put(pdev->dev.pins->p);
 713         bfin_write32(SMC_GCTL, 0);
 714 }
 715
 716 static struct physmap_flash_data ezkit_flash_data = {
 717         .width      = 2,
 718         .parts      = ezkit_partitions,
 719         .init       = bf609_nor_flash_init,
 720         .exit       = bf609_nor_flash_exit,
 721         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 722 #ifdef CONFIG_ROMKERNEL
 723         .probe_type = "map_rom",
 724 #endif
 725 };
 726
 727 static struct resource ezkit_flash_resource = {
 728         .start = 0xb0000000,
 729         .end   = 0xb0ffffff,
 730         .flags = IORESOURCE_MEM,
 731 };
 732
 733 static struct platform_device ezkit_flash_device = {
 734         .name          = "physmap-flash",
 735         .id            = 0,
 736         .dev = {
 737                 .platform_data = &ezkit_flash_data,
 738         },
 739         .num_resources = 1,
 740         .resource      = &ezkit_flash_resource,
 741 };
 742 #endif
 743
 744 #if defined(CONFIG_MTD_M25P80) \
 745         || defined(CONFIG_MTD_M25P80_MODULE)
 746 /* SPI flash chip (w25q32) */
 747 static struct mtd_partition bfin_spi_flash_partitions[] = {
 748         {
 749                 .name = "bootloader(spi)",
 750                 .size = 0x00080000,
 751                 .offset = 0,
 752                 .mask_flags = MTD_CAP_ROM
 753         }, {
 754                 .name = "linux kernel(spi)",
 755                 .size = 0x00180000,
 756                 .offset = MTDPART_OFS_APPEND,
 757         }, {
 758                 .name = "file system(spi)",
 759                 .size = MTDPART_SIZ_FULL,
 760                 .offset = MTDPART_OFS_APPEND,
 761         }
 762 };
 763
 764 static struct flash_platform_data bfin_spi_flash_data = {
 765         .name = "m25p80",
 766         .parts = bfin_spi_flash_partitions,
 767         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 768         .type = "w25q32",
 769 };
 770
 771 static struct bfin_spi3_chip spi_flash_chip_info = {
 772         .enable_dma = true,         /* use dma transfer with this chip*/
 773 };
 774 #endif
 775
 776 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 777 static struct bfin_spi3_chip spidev_chip_info = {
 778         .enable_dma = true,
 779 };
 780 #endif
 781
 782 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 783 static struct platform_device bfin_i2s_pcm = {
 784         .name = "bfin-i2s-pcm-audio",
 785         .id = -1,
 786 };
 787 #endif
 788
 789 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
 790         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
 791 #include <asm/bfin_sport3.h>
 792 static struct resource bfin_snd_resources[] = {
 793         {
 794                 .start = SPORT0_CTL_A,
 795                 .end = SPORT0_CTL_A,
 796                 .flags = IORESOURCE_MEM,
 797         },
 798         {
 799                 .start = SPORT0_CTL_B,
 800                 .end = SPORT0_CTL_B,
 801                 .flags = IORESOURCE_MEM,
 802         },
 803         {
 804                 .start = CH_SPORT0_TX,
 805                 .end = CH_SPORT0_TX,
 806                 .flags = IORESOURCE_DMA,
 807         },
 808         {
 809                 .start = CH_SPORT0_RX,
 810                 .end = CH_SPORT0_RX,
 811                 .flags = IORESOURCE_DMA,
 812         },
 813         {
 814                 .start = IRQ_SPORT0_TX_STAT,
 815                 .end = IRQ_SPORT0_TX_STAT,
 816                 .flags = IORESOURCE_IRQ,
 817         },
 818         {
 819                 .start = IRQ_SPORT0_RX_STAT,
 820                 .end = IRQ_SPORT0_RX_STAT,
 821                 .flags = IORESOURCE_IRQ,
 822         },
 823 };
 824
 825 static const unsigned short bfin_snd_pin[] = {
 826         P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
 827         P_SPORT0_BFS, P_SPORT0_BD0, 0,
 828 };
 829
 830 static struct bfin_snd_platform_data bfin_snd_data = {
 831         .pin_req = bfin_snd_pin,
 832 };
 833
 834 static struct platform_device bfin_i2s = {
 835         .name = "bfin-i2s",
 836         .num_resources = ARRAY_SIZE(bfin_snd_resources),
 837         .resource = bfin_snd_resources,
 838         .dev = {
 839                 .platform_data = &bfin_snd_data,
 840         },
 841 };
 842 #endif
 843
 844 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
 845                 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
 846 static const char * const ad1836_link[] = {
 847         "bfin-i2s.0",
 848         "spi0.76",
 849 };
 850 static struct platform_device bfin_ad1836_machine = {
 851         .name = "bfin-snd-ad1836",
 852         .id = -1,
 853         .dev = {
 854                 .platform_data = (void *)ad1836_link,
 855         },
 856 };
 857 #endif
 858
 859 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 860         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 861 static struct platform_device adau1761_device = {
 862         .name = "bfin-eval-adau1x61",
 863 };
 864 #endif
 865
 866 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
 867 #include <sound/adau17x1.h>
 868 static struct adau1761_platform_data adau1761_info = {
 869         .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
 870         .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
 871 };
 872 #endif
 873
 874 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
 875         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
 876 #include <linux/videodev2.h>
 877 #include <media/blackfin/bfin_capture.h>
 878 #include <media/blackfin/ppi.h>
 879
 880 static const unsigned short ppi_req[] = {
 881         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
 882         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
 883         P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
 884         P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
 885 #if !defined(CONFIG_VIDEO_VS6624) && !defined(CONFIG_VIDEO_VS6624_MODULE)
 886         P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19,
 887         P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23,
 888 #endif
 889         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
 890         0,
 891 };
 892
 893 static const struct ppi_info ppi_info = {
 894         .type = PPI_TYPE_EPPI3,
 895         .dma_ch = CH_EPPI0_CH0,
 896         .irq_err = IRQ_EPPI0_STAT,
 897         .base = (void __iomem *)EPPI0_STAT,
 898         .pin_req = ppi_req,
 899 };
 900
 901 #if defined(CONFIG_VIDEO_VS6624) \
 902         || defined(CONFIG_VIDEO_VS6624_MODULE)
 903 static struct v4l2_input vs6624_inputs[] = {
 904         {
 905                 .index = 0,
 906                 .name = "Camera",
 907                 .type = V4L2_INPUT_TYPE_CAMERA,
 908                 .std = V4L2_STD_UNKNOWN,
 909         },
 910 };
 911
 912 static struct bcap_route vs6624_routes[] = {
 913         {
 914                 .input = 0,
 915                 .output = 0,
 916         },
 917 };
 918
 919 static const unsigned vs6624_ce_pin = GPIO_PE4;
 920
 921 static struct bfin_capture_config bfin_capture_data = {
 922         .card_name = "BF609",
 923         .inputs = vs6624_inputs,
 924         .num_inputs = ARRAY_SIZE(vs6624_inputs),
 925         .routes = vs6624_routes,
 926         .i2c_adapter_id = 0,
 927         .board_info = {
 928                 .type = "vs6624",
 929                 .addr = 0x10,
 930                 .platform_data = (void *)&vs6624_ce_pin,
 931         },
 932         .ppi_info = &ppi_info,
 933         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
 934                         | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
 935         .blank_pixels = 4,
 936 };
 937 #endif
 938
 939 #if defined(CONFIG_VIDEO_ADV7842) \
 940         || defined(CONFIG_VIDEO_ADV7842_MODULE)
 941 #include <media/adv7842.h>
 942
 943 static struct v4l2_input adv7842_inputs[] = {
 944         {
 945                 .index = 0,
 946                 .name = "Composite",
 947                 .type = V4L2_INPUT_TYPE_CAMERA,
 948                 .std = V4L2_STD_ALL,
 949                 .capabilities = V4L2_IN_CAP_STD,
 950         },
 951         {
 952                 .index = 1,
 953                 .name = "S-Video",
 954                 .type = V4L2_INPUT_TYPE_CAMERA,
 955                 .std = V4L2_STD_ALL,
 956                 .capabilities = V4L2_IN_CAP_STD,
 957         },
 958         {
 959                 .index = 2,
 960                 .name = "Component",
 961                 .type = V4L2_INPUT_TYPE_CAMERA,
 962                 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
 963         },
 964         {
 965                 .index = 3,
 966                 .name = "VGA",
 967                 .type = V4L2_INPUT_TYPE_CAMERA,
 968                 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
 969         },
 970         {
 971                 .index = 4,
 972                 .name = "HDMI",
 973                 .type = V4L2_INPUT_TYPE_CAMERA,
 974                 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
 975         },
 976 };
 977
 978 static struct bcap_route adv7842_routes[] = {
 979         {
 980                 .input = 3,
 981                 .output = 0,
 982                 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
 983                                 | EPPI_CTL_ACTIVE656),
 984         },
 985         {
 986                 .input = 4,
 987                 .output = 0,
 988         },
 989         {
 990                 .input = 2,
 991                 .output = 0,
 992         },
 993         {
 994                 .input = 1,
 995                 .output = 0,
 996         },
 997         {
 998                 .input = 0,
 999                 .output = 1,
1000                 .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16
1001                                 | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC2
1002                                 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
1003         },
1004 };
1005
1006 static struct adv7842_output_format adv7842_opf[] = {
1007         {
1008                 .op_ch_sel = ADV7842_OP_CH_SEL_BRG,
1009                 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_8,
1010                 .op_656_range = 1,
1011                 .blank_data = 1,
1012                 .insert_av_codes = 1,
1013         },
1014         {
1015                 .op_ch_sel = ADV7842_OP_CH_SEL_RGB,
1016                 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_16,
1017                 .op_656_range = 1,
1018                 .blank_data = 1,
1019         },
1020 };
1021
1022 static struct adv7842_platform_data adv7842_data = {
1023         .opf = adv7842_opf,
1024         .num_opf = ARRAY_SIZE(adv7842_opf),
1025         .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1,
1026         .prim_mode = ADV7842_PRIM_MODE_SDP,
1027         .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,
1028         .hdmi_free_run_enable = 1,
1029         .sdp_free_run_auto = 1,
1030         .llc_dll_phase = 0x10,
1031         .i2c_sdp_io = 0x40,
1032         .i2c_sdp = 0x41,
1033         .i2c_cp = 0x42,
1034         .i2c_vdp = 0x43,
1035         .i2c_afe = 0x44,
1036         .i2c_hdmi = 0x45,
1037         .i2c_repeater = 0x46,
1038         .i2c_edid = 0x47,
1039         .i2c_infoframe = 0x48,
1040         .i2c_cec = 0x49,
1041         .i2c_avlink = 0x4a,
1042         .i2c_ex = 0x26,
1043 };
1044
1045 static struct bfin_capture_config bfin_capture_data = {
1046         .card_name = "BF609",
1047         .inputs = adv7842_inputs,
1048         .num_inputs = ARRAY_SIZE(adv7842_inputs),
1049         .routes = adv7842_routes,
1050         .i2c_adapter_id = 0,
1051         .board_info = {
1052                 .type = "adv7842",
1053                 .addr = 0x20,
1054                 .platform_data = (void *)&adv7842_data,
1055         },
1056         .ppi_info = &ppi_info,
1057         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
1058                         | EPPI_CTL_ACTIVE656),
1059 };
1060 #endif
1061
1062 static struct platform_device bfin_capture_device = {
1063         .name = "bfin_capture",
1064         .dev = {
1065                 .platform_data = &bfin_capture_data,
1066         },
1067 };
1068 #endif
1069
1070 #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \
1071         || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE)
1072 #include <linux/videodev2.h>
1073 #include <media/blackfin/bfin_display.h>
1074 #include <media/blackfin/ppi.h>
1075
1076 static const unsigned short ppi_req_disp[] = {
1077         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
1078         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
1079         P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
1080         P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
1081         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
1082         0,
1083 };
1084
1085 static const struct ppi_info ppi_info = {
1086         .type = PPI_TYPE_EPPI3,
1087         .dma_ch = CH_EPPI0_CH0,
1088         .irq_err = IRQ_EPPI0_STAT,
1089         .base = (void __iomem *)EPPI0_STAT,
1090         .pin_req = ppi_req_disp,
1091 };
1092
1093 #if defined(CONFIG_VIDEO_ADV7511) \
1094         || defined(CONFIG_VIDEO_ADV7511_MODULE)
1095 #include <media/adv7511.h>
1096
1097 static struct v4l2_output adv7511_outputs[] = {
1098         {
1099                 .index = 0,
1100                 .name = "HDMI",
1101                 .type = V4L2_INPUT_TYPE_CAMERA,
1102                 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
1103         },
1104 };
1105
1106 static struct disp_route adv7511_routes[] = {
1107         {
1108                 .output = 0,
1109         },
1110 };
1111
1112 static struct adv7511_platform_data adv7511_data = {
1113         .edid_addr = 0x7e,
1114         .i2c_ex = 0x25,
1115 };
1116
1117 static struct bfin_display_config bfin_display_data = {
1118         .card_name = "BF609",
1119         .outputs = adv7511_outputs,
1120         .num_outputs = ARRAY_SIZE(adv7511_outputs),
1121         .routes = adv7511_routes,
1122         .i2c_adapter_id = 0,
1123         .board_info = {
1124                 .type = "adv7511",
1125                 .addr = 0x39,
1126                 .platform_data = (void *)&adv7511_data,
1127         },
1128         .ppi_info = &ppi_info,
1129         .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16
1130                         | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC3
1131                         | EPPI_CTL_IFSGEN | EPPI_CTL_SYNC2
1132                         | EPPI_CTL_NON656 | EPPI_CTL_DIR),
1133 };
1134 #endif
1135
1136 #if IS_ENABLED(CONFIG_VIDEO_ADV7343)
1137 #include <media/adv7343.h>
1138
1139 static struct v4l2_output adv7343_outputs[] = {
1140         {
1141                 .index = 0,
1142                 .name = "Composite",
1143                 .type = V4L2_OUTPUT_TYPE_ANALOG,
1144                 .std = V4L2_STD_ALL,
1145                 .capabilities = V4L2_OUT_CAP_STD,
1146         },
1147         {
1148                 .index = 1,
1149                 .name = "S-Video",
1150                 .type = V4L2_OUTPUT_TYPE_ANALOG,
1151                 .std = V4L2_STD_ALL,
1152                 .capabilities = V4L2_OUT_CAP_STD,
1153         },
1154         {
1155                 .index = 2,
1156                 .name = "Component",
1157                 .type = V4L2_OUTPUT_TYPE_ANALOG,
1158                 .std = V4L2_STD_ALL,
1159                 .capabilities = V4L2_OUT_CAP_STD,
1160         },
1161
1162 };
1163
1164 static struct disp_route adv7343_routes[] = {
1165         {
1166                 .output = ADV7343_COMPOSITE_ID,
1167         },
1168         {
1169                 .output = ADV7343_SVIDEO_ID,
1170         },
1171         {
1172                 .output = ADV7343_COMPONENT_ID,
1173         },
1174 };
1175
1176 static struct adv7343_platform_data adv7343_data = {
1177         .mode_config = {
1178                 .sleep_mode = false,
1179                 .pll_control = false,
1180                 .dac_1 = true,
1181                 .dac_2 = true,
1182                 .dac_3 = true,
1183                 .dac_4 = true,
1184                 .dac_5 = true,
1185                 .dac_6 = true,
1186         },
1187         .sd_config = {
1188                 .sd_dac_out1 = false,
1189                 .sd_dac_out2 = false,
1190         },
1191 };
1192
1193 static struct bfin_display_config bfin_display_data = {
1194         .card_name = "BF609",
1195         .outputs = adv7343_outputs,
1196         .num_outputs = ARRAY_SIZE(adv7343_outputs),
1197         .routes = adv7343_routes,
1198         .i2c_adapter_id = 0,
1199         .board_info = {
1200                 .type = "adv7343",
1201                 .addr = 0x2b,
1202                 .platform_data = (void *)&adv7343_data,
1203         },
1204         .ppi_info = &ppi_info_disp,
1205         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1LO_FS2LO
1206                         | EPPI_CTL_POLC3 | EPPI_CTL_BLANKGEN | EPPI_CTL_SYNC2
1207                         | EPPI_CTL_NON656 | EPPI_CTL_DIR),
1208 };
1209 #endif
1210
1211 static struct platform_device bfin_display_device = {
1212         .name = "bfin_display",
1213         .dev = {
1214                 .platform_data = &bfin_display_data,
1215         },
1216 };
1217 #endif
1218
1219 #if defined(CONFIG_BFIN_CRC)
1220 #define BFIN_CRC_NAME "bfin-crc"
1221
1222 static struct resource bfin_crc0_resources[] = {
1223         {
1224                 .start = REG_CRC0_CTL,
1225                 .end = REG_CRC0_REVID+4,
1226                 .flags = IORESOURCE_MEM,
1227         },
1228         {
1229                 .start = IRQ_CRC0_DCNTEXP,
1230                 .end = IRQ_CRC0_DCNTEXP,
1231                 .flags = IORESOURCE_IRQ,
1232         },
1233         {
1234                 .start = CH_MEM_STREAM0_SRC_CRC0,
1235                 .end = CH_MEM_STREAM0_SRC_CRC0,
1236                 .flags = IORESOURCE_DMA,
1237         },
1238         {
1239                 .start = CH_MEM_STREAM0_DEST_CRC0,
1240                 .end = CH_MEM_STREAM0_DEST_CRC0,
1241                 .flags = IORESOURCE_DMA,
1242         },
1243 };
1244
1245 static struct platform_device bfin_crc0_device = {
1246         .name = BFIN_CRC_NAME,
1247         .id = 0,
1248         .num_resources = ARRAY_SIZE(bfin_crc0_resources),
1249         .resource = bfin_crc0_resources,
1250 };
1251
1252 static struct resource bfin_crc1_resources[] = {
1253         {
1254                 .start = REG_CRC1_CTL,
1255                 .end = REG_CRC1_REVID+4,
1256                 .flags = IORESOURCE_MEM,
1257         },
1258         {
1259                 .start = IRQ_CRC1_DCNTEXP,
1260                 .end = IRQ_CRC1_DCNTEXP,
1261                 .flags = IORESOURCE_IRQ,
1262         },
1263         {
1264                 .start = CH_MEM_STREAM1_SRC_CRC1,
1265                 .end = CH_MEM_STREAM1_SRC_CRC1,
1266                 .flags = IORESOURCE_DMA,
1267         },
1268         {
1269                 .start = CH_MEM_STREAM1_DEST_CRC1,
1270                 .end = CH_MEM_STREAM1_DEST_CRC1,
1271                 .flags = IORESOURCE_DMA,
1272         },
1273 };
1274
1275 static struct platform_device bfin_crc1_device = {
1276         .name = BFIN_CRC_NAME,
1277         .id = 1,
1278         .num_resources = ARRAY_SIZE(bfin_crc1_resources),
1279         .resource = bfin_crc1_resources,
1280 };
1281 #endif
1282
1283 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1284 #define BFIN_CRYPTO_CRC_NAME            "bfin-hmac-crc"
1285 #define BFIN_CRYPTO_CRC_POLY_DATA       0x5c5c5c5c
1286
1287 static struct resource bfin_crypto_crc_resources[] = {
1288         {
1289                 .start = REG_CRC0_CTL,
1290                 .end = REG_CRC0_REVID+4,
1291                 .flags = IORESOURCE_MEM,
1292         },
1293         {
1294                 .start = IRQ_CRC0_DCNTEXP,
1295                 .end = IRQ_CRC0_DCNTEXP,
1296                 .flags = IORESOURCE_IRQ,
1297         },
1298         {
1299                 .start = CH_MEM_STREAM0_SRC_CRC0,
1300                 .end = CH_MEM_STREAM0_SRC_CRC0,
1301                 .flags = IORESOURCE_DMA,
1302         },
1303 };
1304
1305 static struct platform_device bfin_crypto_crc_device = {
1306         .name = BFIN_CRYPTO_CRC_NAME,
1307         .id = 0,
1308         .num_resources = ARRAY_SIZE(bfin_crypto_crc_resources),
1309         .resource = bfin_crypto_crc_resources,
1310         .dev = {
1311                 .platform_data = (void *)BFIN_CRYPTO_CRC_POLY_DATA,
1312         },
1313 };
1314 #endif
1315
1316 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1317 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
1318         .model                  = 7877,
1319         .vref_delay_usecs       = 50,   /* internal, no capacitor */
1320         .x_plate_ohms           = 419,
1321         .y_plate_ohms           = 486,
1322         .pressure_max           = 1000,
1323         .pressure_min           = 0,
1324         .stopacq_polarity       = 1,
1325         .first_conversion_delay = 3,
1326         .acquisition_time       = 1,
1327         .averaging              = 1,
1328         .pen_down_acc_interval  = 1,
1329 };
1330 #endif
1331
1332 #ifdef CONFIG_PINCTRL_ADI2
1333
1334 # define ADI_PINT_DEVNAME "adi-gpio-pint"
1335 # define ADI_GPIO_DEVNAME "adi-gpio"
1336 # define ADI_PINCTRL_DEVNAME "pinctrl-adi2"
1337
1338 static struct platform_device bfin_pinctrl_device = {
1339         .name = ADI_PINCTRL_DEVNAME,
1340         .id = 0,
1341 };
1342
1343 static struct resource bfin_pint0_resources[] = {
1344         {
1345                 .start = PINT0_MASK_SET,
1346                 .end = PINT0_LATCH + 3,
1347                 .flags = IORESOURCE_MEM,
1348         },
1349         {
1350                 .start = IRQ_PINT0,
1351                 .end = IRQ_PINT0,
1352                 .flags = IORESOURCE_IRQ,
1353         },
1354 };
1355
1356 static struct platform_device bfin_pint0_device = {
1357         .name = ADI_PINT_DEVNAME,
1358         .id = 0,
1359         .num_resources = ARRAY_SIZE(bfin_pint0_resources),
1360         .resource = bfin_pint0_resources,
1361 };
1362
1363 static struct resource bfin_pint1_resources[] = {
1364         {
1365                 .start = PINT1_MASK_SET,
1366                 .end = PINT1_LATCH + 3,
1367                 .flags = IORESOURCE_MEM,
1368         },
1369         {
1370                 .start = IRQ_PINT1,
1371                 .end = IRQ_PINT1,
1372                 .flags = IORESOURCE_IRQ,
1373         },
1374 };
1375
1376 static struct platform_device bfin_pint1_device = {
1377         .name = ADI_PINT_DEVNAME,
1378         .id = 1,
1379         .num_resources = ARRAY_SIZE(bfin_pint1_resources),
1380         .resource = bfin_pint1_resources,
1381 };
1382
1383 static struct resource bfin_pint2_resources[] = {
1384         {
1385                 .start = PINT2_MASK_SET,
1386                 .end = PINT2_LATCH + 3,
1387                 .flags = IORESOURCE_MEM,
1388         },
1389         {
1390                 .start = IRQ_PINT2,
1391                 .end = IRQ_PINT2,
1392                 .flags = IORESOURCE_IRQ,
1393         },
1394 };
1395
1396 static struct platform_device bfin_pint2_device = {
1397         .name = ADI_PINT_DEVNAME,
1398         .id = 2,
1399         .num_resources = ARRAY_SIZE(bfin_pint2_resources),
1400         .resource = bfin_pint2_resources,
1401 };
1402
1403 static struct resource bfin_pint3_resources[] = {
1404         {
1405                 .start = PINT3_MASK_SET,
1406                 .end = PINT3_LATCH + 3,
1407                 .flags = IORESOURCE_MEM,
1408         },
1409         {
1410                 .start = IRQ_PINT3,
1411                 .end = IRQ_PINT3,
1412                 .flags = IORESOURCE_IRQ,
1413         },
1414 };
1415
1416 static struct platform_device bfin_pint3_device = {
1417         .name = ADI_PINT_DEVNAME,
1418         .id = 3,
1419         .num_resources = ARRAY_SIZE(bfin_pint3_resources),
1420         .resource = bfin_pint3_resources,
1421 };
1422
1423 static struct resource bfin_pint4_resources[] = {
1424         {
1425                 .start = PINT4_MASK_SET,
1426                 .end = PINT4_LATCH + 3,
1427                 .flags = IORESOURCE_MEM,
1428         },
1429         {
1430                 .start = IRQ_PINT4,
1431                 .end = IRQ_PINT4,
1432                 .flags = IORESOURCE_IRQ,
1433         },
1434 };
1435
1436 static struct platform_device bfin_pint4_device = {
1437         .name = ADI_PINT_DEVNAME,
1438         .id = 4,
1439         .num_resources = ARRAY_SIZE(bfin_pint4_resources),
1440         .resource = bfin_pint4_resources,
1441 };
1442
1443 static struct resource bfin_pint5_resources[] = {
1444         {
1445                 .start = PINT5_MASK_SET,
1446                 .end = PINT5_LATCH + 3,
1447                 .flags = IORESOURCE_MEM,
1448         },
1449         {
1450                 .start = IRQ_PINT5,
1451                 .end = IRQ_PINT5,
1452                 .flags = IORESOURCE_IRQ,
1453         },
1454 };
1455
1456 static struct platform_device bfin_pint5_device = {
1457         .name = ADI_PINT_DEVNAME,
1458         .id = 5,
1459         .num_resources = ARRAY_SIZE(bfin_pint5_resources),
1460         .resource = bfin_pint5_resources,
1461 };
1462
1463 static struct resource bfin_gpa_resources[] = {
1464         {
1465                 .start = PORTA_FER,
1466                 .end = PORTA_MUX + 3,
1467                 .flags = IORESOURCE_MEM,
1468         },
1469         {       /* optional */
1470                 .start = IRQ_PA0,
1471                 .end = IRQ_PA0,
1472                 .flags = IORESOURCE_IRQ,
1473         },
1474 };
1475
1476 static struct adi_pinctrl_gpio_platform_data bfin_gpa_pdata = {
1477         .port_pin_base  = GPIO_PA0,
1478         .port_width     = GPIO_BANKSIZE,
1479         .pint_id        = 0,            /* PINT0 */
1480         .pint_assign    = true,         /* PINT upper 16 bit */
1481         .pint_map       = 0,            /* mapping mask in PINT */
1482 };
1483
1484 static struct platform_device bfin_gpa_device = {
1485         .name = ADI_GPIO_DEVNAME,
1486         .id = 0,
1487         .num_resources = ARRAY_SIZE(bfin_gpa_resources),
1488         .resource = bfin_gpa_resources,
1489         .dev = {
1490                 .platform_data = &bfin_gpa_pdata, /* Passed to driver */
1491         },
1492 };
1493
1494 static struct resource bfin_gpb_resources[] = {
1495         {
1496                 .start = PORTB_FER,
1497                 .end = PORTB_MUX + 3,
1498                 .flags = IORESOURCE_MEM,
1499         },
1500         {
1501                 .start = IRQ_PB0,
1502                 .end = IRQ_PB0,
1503                 .flags = IORESOURCE_IRQ,
1504         },
1505 };
1506
1507 static struct adi_pinctrl_gpio_platform_data bfin_gpb_pdata = {
1508         .port_pin_base  = GPIO_PB0,
1509         .port_width     = GPIO_BANKSIZE,
1510         .pint_id        = 0,
1511         .pint_assign    = false,
1512         .pint_map       = 1,
1513 };
1514
1515 static struct platform_device bfin_gpb_device = {
1516         .name = ADI_GPIO_DEVNAME,
1517         .id = 1,
1518         .num_resources = ARRAY_SIZE(bfin_gpb_resources),
1519         .resource = bfin_gpb_resources,
1520         .dev = {
1521                 .platform_data = &bfin_gpb_pdata, /* Passed to driver */
1522         },
1523 };
1524
1525 static struct resource bfin_gpc_resources[] = {
1526         {
1527                 .start = PORTC_FER,
1528                 .end = PORTC_MUX + 3,
1529                 .flags = IORESOURCE_MEM,
1530         },
1531         {
1532                 .start = IRQ_PC0,
1533                 .end = IRQ_PC0,
1534                 .flags = IORESOURCE_IRQ,
1535         },
1536 };
1537
1538 static struct adi_pinctrl_gpio_platform_data bfin_gpc_pdata = {
1539         .port_pin_base  = GPIO_PC0,
1540         .port_width     = GPIO_BANKSIZE,
1541         .pint_id        = 1,
1542         .pint_assign    = false,
1543         .pint_map       = 1,
1544 };
1545
1546 static struct platform_device bfin_gpc_device = {
1547         .name = ADI_GPIO_DEVNAME,
1548         .id = 2,
1549         .num_resources = ARRAY_SIZE(bfin_gpc_resources),
1550         .resource = bfin_gpc_resources,
1551         .dev = {
1552                 .platform_data = &bfin_gpc_pdata, /* Passed to driver */
1553         },
1554 };
1555
1556 static struct resource bfin_gpd_resources[] = {
1557         {
1558                 .start = PORTD_FER,
1559                 .end = PORTD_MUX + 3,
1560                 .flags = IORESOURCE_MEM,
1561         },
1562         {
1563                 .start = IRQ_PD0,
1564                 .end = IRQ_PD0,
1565                 .flags = IORESOURCE_IRQ,
1566         },
1567 };
1568
1569 static struct adi_pinctrl_gpio_platform_data bfin_gpd_pdata = {
1570         .port_pin_base  = GPIO_PD0,
1571         .port_width     = GPIO_BANKSIZE,
1572         .pint_id        = 2,
1573         .pint_assign    = false,
1574         .pint_map       = 1,
1575 };
1576
1577 static struct platform_device bfin_gpd_device = {
1578         .name = ADI_GPIO_DEVNAME,
1579         .id = 3,
1580         .num_resources = ARRAY_SIZE(bfin_gpd_resources),
1581         .resource = bfin_gpd_resources,
1582         .dev = {
1583                 .platform_data = &bfin_gpd_pdata, /* Passed to driver */
1584         },
1585 };
1586
1587 static struct resource bfin_gpe_resources[] = {
1588         {
1589                 .start = PORTE_FER,
1590                 .end = PORTE_MUX + 3,
1591                 .flags = IORESOURCE_MEM,
1592         },
1593         {
1594                 .start = IRQ_PE0,
1595                 .end = IRQ_PE0,
1596                 .flags = IORESOURCE_IRQ,
1597         },
1598 };
1599
1600 static struct adi_pinctrl_gpio_platform_data bfin_gpe_pdata = {
1601         .port_pin_base  = GPIO_PE0,
1602         .port_width     = GPIO_BANKSIZE,
1603         .pint_id        = 3,
1604         .pint_assign    = false,
1605         .pint_map       = 1,
1606 };
1607
1608 static struct platform_device bfin_gpe_device = {
1609         .name = ADI_GPIO_DEVNAME,
1610         .id = 4,
1611         .num_resources = ARRAY_SIZE(bfin_gpe_resources),
1612         .resource = bfin_gpe_resources,
1613         .dev = {
1614                 .platform_data = &bfin_gpe_pdata, /* Passed to driver */
1615         },
1616 };
1617
1618 static struct resource bfin_gpf_resources[] = {
1619         {
1620                 .start = PORTF_FER,
1621                 .end = PORTF_MUX + 3,
1622                 .flags = IORESOURCE_MEM,
1623         },
1624         {
1625                 .start = IRQ_PF0,
1626                 .end = IRQ_PF0,
1627                 .flags = IORESOURCE_IRQ,
1628         },
1629 };
1630
1631 static struct adi_pinctrl_gpio_platform_data bfin_gpf_pdata = {
1632         .port_pin_base  = GPIO_PF0,
1633         .port_width     = GPIO_BANKSIZE,
1634         .pint_id        = 4,
1635         .pint_assign    = false,
1636         .pint_map       = 1,
1637 };
1638
1639 static struct platform_device bfin_gpf_device = {
1640         .name = ADI_GPIO_DEVNAME,
1641         .id = 5,
1642         .num_resources = ARRAY_SIZE(bfin_gpf_resources),
1643         .resource = bfin_gpf_resources,
1644         .dev = {
1645                 .platform_data = &bfin_gpf_pdata, /* Passed to driver */
1646         },
1647 };
1648
1649 static struct resource bfin_gpg_resources[] = {
1650         {
1651                 .start = PORTG_FER,
1652                 .end = PORTG_MUX + 3,
1653                 .flags = IORESOURCE_MEM,
1654         },
1655         {
1656                 .start = IRQ_PG0,
1657                 .end = IRQ_PG0,
1658                 .flags = IORESOURCE_IRQ,
1659         },
1660 };
1661
1662 static struct adi_pinctrl_gpio_platform_data bfin_gpg_pdata = {
1663         .port_pin_base  = GPIO_PG0,
1664         .port_width     = GPIO_BANKSIZE,
1665         .pint_id        = 5,
1666         .pint_assign    = false,
1667         .pint_map       = 1,
1668 };
1669
1670 static struct platform_device bfin_gpg_device = {
1671         .name = ADI_GPIO_DEVNAME,
1672         .id = 6,
1673         .num_resources = ARRAY_SIZE(bfin_gpg_resources),
1674         .resource = bfin_gpg_resources,
1675         .dev = {
1676                 .platform_data = &bfin_gpg_pdata, /* Passed to driver */
1677         },
1678 };
1679
1680 #endif
1681
1682 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1683 #include <linux/input.h>
1684 #include <linux/gpio_keys.h>
1685
1686 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1687         {BTN_0, GPIO_PB10, 1, "gpio-keys: BTN0"},
1688         {BTN_1, GPIO_PE1, 1, "gpio-keys: BTN1"},
1689 };
1690
1691 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1692         .buttons        = bfin_gpio_keys_table,
1693         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
1694 };
1695
1696 static struct platform_device bfin_device_gpiokeys = {
1697         .name      = "gpio-keys",
1698         .dev = {
1699                 .platform_data = &bfin_gpio_keys_data,
1700         },
1701 };
1702 #endif
1703
1704 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1705 #if defined(CONFIG_MTD_M25P80) \
1706         || defined(CONFIG_MTD_M25P80_MODULE)
1707         {
1708                 /* the modalias must be the same as spi device driver name */
1709                 .modalias = "m25p80", /* Name of spi_driver for this device */
1710                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
1711                 .bus_num = 0, /* Framework bus number */
1712                 .chip_select = MAX_CTRL_CS + GPIO_PD11, /* SPI_SSEL1*/
1713                 .platform_data = &bfin_spi_flash_data,
1714                 .controller_data = &spi_flash_chip_info,
1715                 .mode = SPI_MODE_3,
1716         },
1717 #endif
1718 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1719         {
1720                 .modalias               = "ad7877",
1721                 .platform_data          = &bfin_ad7877_ts_info,
1722                 .irq                    = IRQ_PD9,
1723                 .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
1724                 .bus_num                = 0,
1725                 .chip_select            = MAX_CTRL_CS + GPIO_PC15, /* SPI_SSEL4 */
1726         },
1727 #endif
1728 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1729         {
1730                 .modalias = "spidev",
1731                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
1732                 .bus_num = 0,
1733                 .chip_select = MAX_CTRL_CS + GPIO_PD11, /* SPI_SSEL1*/
1734                 .controller_data = &spidev_chip_info,
1735         },
1736 #endif
1737 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1738         {
1739                 .modalias               = "adxl34x",
1740                 .platform_data          = &adxl34x_info,
1741                 .irq                    = IRQ_PC5,
1742                 .max_speed_hz           = 5000000,     /* max spi clock (SCK) speed in HZ */
1743                 .bus_num                = 1,
1744                 .chip_select            = 2,
1745                 .mode = SPI_MODE_3,
1746         },
1747 #endif
1748 };
1749 #if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1750 /* SPI (0) */
1751 static struct resource bfin_spi0_resource[] = {
1752         {
1753                 .start = SPI0_REGBASE,
1754                 .end   = SPI0_REGBASE + 0xFF,
1755                 .flags = IORESOURCE_MEM,
1756         },
1757         {
1758                 .start = CH_SPI0_TX,
1759                 .end   = CH_SPI0_TX,
1760                 .flags = IORESOURCE_DMA,
1761         },
1762         {
1763                 .start = CH_SPI0_RX,
1764                 .end   = CH_SPI0_RX,
1765                 .flags = IORESOURCE_DMA,
1766         },
1767 };
1768
1769 /* SPI (1) */
1770 static struct resource bfin_spi1_resource[] = {
1771         {
1772                 .start = SPI1_REGBASE,
1773                 .end   = SPI1_REGBASE + 0xFF,
1774                 .flags = IORESOURCE_MEM,
1775         },
1776         {
1777                 .start = CH_SPI1_TX,
1778                 .end   = CH_SPI1_TX,
1779                 .flags = IORESOURCE_DMA,
1780         },
1781         {
1782                 .start = CH_SPI1_RX,
1783                 .end   = CH_SPI1_RX,
1784                 .flags = IORESOURCE_DMA,
1785         },
1786
1787 };
1788
1789 /* SPI controller data */
1790 static struct bfin_spi3_master bf60x_spi_master_info0 = {
1791         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1792         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1793 };
1794
1795 static struct platform_device bf60x_spi_master0 = {
1796         .name = "bfin-spi3",
1797         .id = 0, /* Bus number */
1798         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1799         .resource = bfin_spi0_resource,
1800         .dev = {
1801                 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1802         },
1803 };
1804
1805 static struct bfin_spi3_master bf60x_spi_master_info1 = {
1806         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1807         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1808 };
1809
1810 static struct platform_device bf60x_spi_master1 = {
1811         .name = "bfin-spi3",
1812         .id = 1, /* Bus number */
1813         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1814         .resource = bfin_spi1_resource,
1815         .dev = {
1816                 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1817         },
1818 };
1819 #endif  /* spi master and devices */
1820
1821 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1822 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1823
1824 static struct resource bfin_twi0_resource[] = {
1825         [0] = {
1826                 .start = TWI0_CLKDIV,
1827                 .end   = TWI0_CLKDIV + 0xFF,
1828                 .flags = IORESOURCE_MEM,
1829         },
1830         [1] = {
1831                 .start = IRQ_TWI0,
1832                 .end   = IRQ_TWI0,
1833                 .flags = IORESOURCE_IRQ,
1834         },
1835 };
1836
1837 static struct platform_device i2c_bfin_twi0_device = {
1838         .name = "i2c-bfin-twi",
1839         .id = 0,
1840         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1841         .resource = bfin_twi0_resource,
1842         .dev = {
1843                 .platform_data = &bfin_twi0_pins,
1844         },
1845 };
1846
1847 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1848
1849 static struct resource bfin_twi1_resource[] = {
1850         [0] = {
1851                 .start = TWI1_CLKDIV,
1852                 .end   = TWI1_CLKDIV + 0xFF,
1853                 .flags = IORESOURCE_MEM,
1854         },
1855         [1] = {
1856                 .start = IRQ_TWI1,
1857                 .end   = IRQ_TWI1,
1858                 .flags = IORESOURCE_IRQ,
1859         },
1860 };
1861
1862 static struct platform_device i2c_bfin_twi1_device = {
1863         .name = "i2c-bfin-twi",
1864         .id = 1,
1865         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1866         .resource = bfin_twi1_resource,
1867         .dev = {
1868                 .platform_data = &bfin_twi1_pins,
1869         },
1870 };
1871 #endif
1872
1873 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1874 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1875         {
1876                 I2C_BOARD_INFO("adxl34x", 0x53),
1877                 .irq = IRQ_PC5,
1878                 .platform_data = (void *)&adxl34x_info,
1879         },
1880 #endif
1881 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1882         {
1883                 I2C_BOARD_INFO("adau1761", 0x38),
1884                 .platform_data = (void *)&adau1761_info
1885         },
1886 #endif
1887 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1888         {
1889                 I2C_BOARD_INFO("ssm2602", 0x1b),
1890         },
1891 #endif
1892 };
1893
1894 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1895 };
1896
1897 static const unsigned int cclk_vlev_datasheet[] =
1898 {
1899 /*
1900  * Internal VLEV BF54XSBBC1533
1901  ****temporarily using these values until data sheet is updated
1902  */
1903         VRPAIR(VLEV_085, 150000000),
1904         VRPAIR(VLEV_090, 250000000),
1905         VRPAIR(VLEV_110, 276000000),
1906         VRPAIR(VLEV_115, 301000000),
1907         VRPAIR(VLEV_120, 525000000),
1908         VRPAIR(VLEV_125, 550000000),
1909         VRPAIR(VLEV_130, 600000000),
1910 };
1911
1912 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1913         .tuple_tab = cclk_vlev_datasheet,
1914         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1915         .vr_settling_time = 25 /* us */,
1916 };
1917
1918 static struct platform_device bfin_dpmc = {
1919         .name = "bfin dpmc",
1920         .dev = {
1921                 .platform_data = &bfin_dmpc_vreg_data,
1922         },
1923 };
1924
1925 static struct platform_device *ezkit_devices[] __initdata = {
1926
1927         &bfin_dpmc,
1928 #if defined(CONFIG_PINCTRL_ADI2)
1929         &bfin_pinctrl_device,
1930         &bfin_pint0_device,
1931         &bfin_pint1_device,
1932         &bfin_pint2_device,
1933         &bfin_pint3_device,
1934         &bfin_pint4_device,
1935         &bfin_pint5_device,
1936         &bfin_gpa_device,
1937         &bfin_gpb_device,
1938         &bfin_gpc_device,
1939         &bfin_gpd_device,
1940         &bfin_gpe_device,
1941         &bfin_gpf_device,
1942         &bfin_gpg_device,
1943 #endif
1944
1945 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1946         &rtc_device,
1947 #endif
1948
1949 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1950 #ifdef CONFIG_SERIAL_BFIN_UART0
1951         &bfin_uart0_device,
1952 #endif
1953 #ifdef CONFIG_SERIAL_BFIN_UART1
1954         &bfin_uart1_device,
1955 #endif
1956 #endif
1957
1958 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1959 #ifdef CONFIG_BFIN_SIR0
1960         &bfin_sir0_device,
1961 #endif
1962 #ifdef CONFIG_BFIN_SIR1
1963         &bfin_sir1_device,
1964 #endif
1965 #endif
1966
1967 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1968         &bfin_eth_device,
1969 #endif
1970
1971 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1972         &musb_device,
1973 #endif
1974
1975 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1976         &bfin_isp1760_device,
1977 #endif
1978
1979 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1980 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1981         &bfin_sport0_uart_device,
1982 #endif
1983 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1984         &bfin_sport1_uart_device,
1985 #endif
1986 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1987         &bfin_sport2_uart_device,
1988 #endif
1989 #endif
1990
1991 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1992         &bfin_can0_device,
1993 #endif
1994
1995 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1996         &bfin_nand_device,
1997 #endif
1998
1999 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
2000         &bfin_sdh_device,
2001 #endif
2002
2003 #if IS_ENABLED(CONFIG_SPI_BFIN_V3)
2004         &bf60x_spi_master0,
2005         &bf60x_spi_master1,
2006 #endif
2007
2008 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
2009         &bfin_rotary_device,
2010 #endif
2011
2012 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2013         &i2c_bfin_twi0_device,
2014 #if !defined(CONFIG_BF542)
2015         &i2c_bfin_twi1_device,
2016 #endif
2017 #endif
2018
2019 #if defined(CONFIG_BFIN_CRC)
2020         &bfin_crc0_device,
2021         &bfin_crc1_device,
2022 #endif
2023 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
2024         &bfin_crypto_crc_device,
2025 #endif
2026
2027 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2028         &bfin_device_gpiokeys,
2029 #endif
2030
2031 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2032         &ezkit_flash_device,
2033 #endif
2034 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2035         &bfin_i2s_pcm,
2036 #endif
2037 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
2038         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
2039         &bfin_i2s,
2040 #endif
2041 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
2042         defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2043         &bfin_ad1836_machine,
2044 #endif
2045 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
2046         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
2047         &adau1761_device,
2048 #endif
2049 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
2050         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
2051         &bfin_capture_device,
2052 #endif
2053 #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \
2054         || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE)
2055         &bfin_display_device,
2056 #endif
2057
2058 };
2059
2060 /* Pin control settings */
2061 static struct pinctrl_map __initdata bfin_pinmux_map[] = {
2062         /* per-device maps */
2063         PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.0",  "pinctrl-adi2.0", NULL, "uart0"),
2064         PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1",  "pinctrl-adi2.0", NULL, "uart1"),
2065         PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.0",  "pinctrl-adi2.0", NULL, "uart0"),
2066         PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.1",  "pinctrl-adi2.0", NULL, "uart1"),
2067         PIN_MAP_MUX_GROUP_DEFAULT("bfin-sdh.0",  "pinctrl-adi2.0", NULL, "rsi0"),
2068         PIN_MAP_MUX_GROUP_DEFAULT("stmmaceth.0",  "pinctrl-adi2.0", NULL, "eth0"),
2069         PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.0",  "pinctrl-adi2.0", NULL, "spi0"),
2070         PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.1",  "pinctrl-adi2.0", NULL, "spi1"),
2071         PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.0",  "pinctrl-adi2.0", NULL, "twi0"),
2072         PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.1",  "pinctrl-adi2.0", NULL, "twi1"),
2073         PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary",  "pinctrl-adi2.0", NULL, "rotary"),
2074         PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0",  "pinctrl-adi2.0", NULL, "can0"),
2075         PIN_MAP_MUX_GROUP_DEFAULT("physmap-flash.0",  "pinctrl-adi2.0", NULL, "smc0"),
2076         PIN_MAP_MUX_GROUP_DEFAULT("bf609_nl8048.2",  "pinctrl-adi2.0", NULL, "ppi2_16b"),
2077         PIN_MAP_MUX_GROUP_DEFAULT("bfin_display.0",  "pinctrl-adi2.0", NULL, "ppi0_16b"),
2078 #if defined(CONFIG_VIDEO_MT9M114) || defined(CONFIG_VIDEO_MT9M114_MODULE)
2079         PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", NULL, "ppi0_8b"),
2080 #elif defined(CONFIG_VIDEO_VS6624) || defined(CONFIG_VIDEO_VS6624_MODULE)
2081         PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", NULL, "ppi0_16b"),
2082 #else
2083         PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", NULL, "ppi0_24b"),
2084 #endif
2085         PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0",  "pinctrl-adi2.0", NULL, "sport0"),
2086         PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0",  "pinctrl-adi2.0", NULL, "sport0"),
2087         PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.1",  "pinctrl-adi2.0", NULL, "sport1"),
2088         PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.1",  "pinctrl-adi2.0", NULL, "sport1"),
2089         PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.2",  "pinctrl-adi2.0", NULL, "sport2"),
2090         PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.2",  "pinctrl-adi2.0", NULL, "sport2"),
2091 };
2092
2093 static int __init ezkit_init(void)
2094 {
2095         printk(KERN_INFO "%s(): registering device resources\n", __func__);
2096
2097         /* Initialize pinmuxing */
2098         pinctrl_register_mappings(bfin_pinmux_map,
2099                                 ARRAY_SIZE(bfin_pinmux_map));
2100
2101         i2c_register_board_info(0, bfin_i2c_board_info0,
2102                                 ARRAY_SIZE(bfin_i2c_board_info0));
2103         i2c_register_board_info(1, bfin_i2c_board_info1,
2104                                 ARRAY_SIZE(bfin_i2c_board_info1));
2105
2106         platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
2107
2108         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
2109
2110         return 0;
2111 }
2112
2113 arch_initcall(ezkit_init);
2114
2115 static struct platform_device *ezkit_early_devices[] __initdata = {
2116 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2117 #ifdef CONFIG_SERIAL_BFIN_UART0
2118         &bfin_uart0_device,
2119 #endif
2120 #ifdef CONFIG_SERIAL_BFIN_UART1
2121         &bfin_uart1_device,
2122 #endif
2123 #endif
2124 };
2125
2126 void __init native_machine_early_platform_add_devices(void)
2127 {
2128         printk(KERN_INFO "register early platform devices\n");
2129         early_platform_add_devices(ezkit_early_devices,
2130                 ARRAY_SIZE(ezkit_early_devices));
2131 }