Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/bcm11351.dtsi

   1 /*
   2  * Copyright (C) 2012-2013 Broadcom Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation version 2.
   7  *
   8  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
   9  * kind, whether express or implied; without even the implied warranty
  10  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <dt-bindings/interrupt-controller/arm-gic.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16
  17 #include "skeleton.dtsi"
  18
  19 / {
  20         model = "BCM11351 SoC";
  21         compatible = "brcm,bcm11351";
  22         interrupt-parent = <&gic>;
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,115200n8";
  26         };
  27
  28         gic: interrupt-controller@3ff00100 {
  29                 compatible = "arm,cortex-a9-gic";
  30                 #interrupt-cells = <3>;
  31                 #address-cells = <0>;
  32                 interrupt-controller;
  33                 reg = <0x3ff01000 0x1000>,
  34                       <0x3ff00100 0x100>;
  35         };
  36
  37         smc@0x3404c000 {
  38                 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
  39                 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
  40         };
  41
  42         uart@3e000000 {
  43                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  44                 status = "disabled";
  45                 reg = <0x3e000000 0x1000>;
  46                 clocks = <&uartb_clk>;
  47                 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
  48                 reg-shift = <2>;
  49                 reg-io-width = <4>;
  50         };
  51
  52         uart@3e001000 {
  53                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  54                 status = "disabled";
  55                 reg = <0x3e001000 0x1000>;
  56                 clocks = <&uartb2_clk>;
  57                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
  58                 reg-shift = <2>;
  59                 reg-io-width = <4>;
  60         };
  61
  62         uart@3e002000 {
  63                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  64                 status = "disabled";
  65                 reg = <0x3e002000 0x1000>;
  66                 clocks = <&uartb3_clk>;
  67                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
  68                 reg-shift = <2>;
  69                 reg-io-width = <4>;
  70         };
  71
  72         uart@3e003000 {
  73                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  74                 status = "disabled";
  75                 reg = <0x3e003000 0x1000>;
  76                 clocks = <&uartb4_clk>;
  77                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
  78                 reg-shift = <2>;
  79                 reg-io-width = <4>;
  80         };
  81
  82         L2: l2-cache {
  83                 compatible = "brcm,bcm11351-a2-pl310-cache";
  84                 reg = <0x3ff20000 0x1000>;
  85                 cache-unified;
  86                 cache-level = <2>;
  87         };
  88
  89         watchdog@35002f40 {
  90                 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
  91                 reg = <0x35002f40 0x6c>;
  92         };
  93
  94         timer@35006000 {
  95                 compatible = "brcm,kona-timer";
  96                 reg = <0x35006000 0x1000>;
  97                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  98                 clocks = <&hub_timer_clk>;
  99         };
 100
 101         gpio: gpio@35003000 {
 102                 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
 103                 reg = <0x35003000 0x800>;
 104                 interrupts =
 105                        <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
 106                         GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
 107                         GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
 108                         GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 109                         GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
 110                         GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 111                 #gpio-cells = <2>;
 112                 #interrupt-cells = <2>;
 113                 gpio-controller;
 114                 interrupt-controller;
 115         };
 116
 117         sdio1: sdio@3f180000 {
 118                 compatible = "brcm,kona-sdhci";
 119                 reg = <0x3f180000 0x10000>;
 120                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 121                 clocks = <&sdio1_clk>;
 122                 status = "disabled";
 123         };
 124
 125         sdio2: sdio@3f190000 {
 126                 compatible = "brcm,kona-sdhci";
 127                 reg = <0x3f190000 0x10000>;
 128                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 129                 clocks = <&sdio2_clk>;
 130                 status = "disabled";
 131         };
 132
 133         sdio3: sdio@3f1a0000 {
 134                 compatible = "brcm,kona-sdhci";
 135                 reg = <0x3f1a0000 0x10000>;
 136                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 137                 clocks = <&sdio3_clk>;
 138                 status = "disabled";
 139         };
 140
 141         sdio4: sdio@3f1b0000 {
 142                 compatible = "brcm,kona-sdhci";
 143                 reg = <0x3f1b0000 0x10000>;
 144                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 145                 clocks = <&sdio4_clk>;
 146                 status = "disabled";
 147         };
 148
 149         i2c@3e016000 {
 150                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 151                 reg = <0x3e016000 0x80>;
 152                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 clocks = <&bsc1_clk>;
 156                 status = "disabled";
 157         };
 158
 159         i2c@3e017000 {
 160                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 161                 reg = <0x3e017000 0x80>;
 162                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 163                 #address-cells = <1>;
 164                 #size-cells = <0>;
 165                 clocks = <&bsc2_clk>;
 166                 status = "disabled";
 167         };
 168
 169         i2c@3e018000 {
 170                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 171                 reg = <0x3e018000 0x80>;
 172                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 173                 #address-cells = <1>;
 174                 #size-cells = <0>;
 175                 clocks = <&bsc3_clk>;
 176                 status = "disabled";
 177         };
 178
 179         i2c@3500d000 {
 180                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 181                 reg = <0x3500d000 0x80>;
 182                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 183                 #address-cells = <1>;
 184                 #size-cells = <0>;
 185                 clocks = <&pmu_bsc_clk>;
 186                 status = "disabled";
 187         };
 188
 189         clocks {
 190                 bsc1_clk: bsc1 {
 191                         compatible = "fixed-clock";
 192                         clock-frequency = <13000000>;
 193                         #clock-cells = <0>;
 194                 };
 195
 196                 bsc2_clk: bsc2 {
 197                         compatible = "fixed-clock";
 198                         clock-frequency = <13000000>;
 199                         #clock-cells = <0>;
 200                 };
 201
 202                 bsc3_clk: bsc3 {
 203                         compatible = "fixed-clock";
 204                         clock-frequency = <13000000>;
 205                         #clock-cells = <0>;
 206                 };
 207
 208                 pmu_bsc_clk: pmu_bsc {
 209                         compatible = "fixed-clock";
 210                         clock-frequency = <13000000>;
 211                         #clock-cells = <0>;
 212                 };
 213
 214                 hub_timer_clk: hub_timer {
 215                         compatible = "fixed-clock";
 216                         clock-frequency = <32768>;
 217                         #clock-cells = <0>;
 218                 };
 219
 220                 pwm_clk: pwm {
 221                         compatible = "fixed-clock";
 222                         clock-frequency = <26000000>;
 223                         #clock-cells = <0>;
 224                 };
 225
 226                 sdio1_clk: sdio1 {
 227                         compatible = "fixed-clock";
 228                         clock-frequency = <48000000>;
 229                         #clock-cells = <0>;
 230                 };
 231
 232                 sdio2_clk: sdio2 {
 233                         compatible = "fixed-clock";
 234                         clock-frequency = <48000000>;
 235                         #clock-cells = <0>;
 236                 };
 237
 238                 sdio3_clk: sdio3 {
 239                         compatible = "fixed-clock";
 240                         clock-frequency = <48000000>;
 241                         #clock-cells = <0>;
 242                 };
 243
 244                 sdio4_clk: sdio4 {
 245                         compatible = "fixed-clock";
 246                         clock-frequency = <48000000>;
 247                         #clock-cells = <0>;
 248                 };
 249
 250                 tmon_1m_clk: tmon_1m {
 251                         compatible = "fixed-clock";
 252                         clock-frequency = <1000000>;
 253                         #clock-cells = <0>;
 254                 };
 255
 256                 uartb_clk: uartb {
 257                         compatible = "fixed-clock";
 258                         clock-frequency = <13000000>;
 259                         #clock-cells = <0>;
 260                 };
 261
 262                 uartb2_clk: uartb2 {
 263                         compatible = "fixed-clock";
 264                         clock-frequency = <13000000>;
 265                         #clock-cells = <0>;
 266                 };
 267
 268                 uartb3_clk: uartb3 {
 269                         compatible = "fixed-clock";
 270                         clock-frequency = <13000000>;
 271                         #clock-cells = <0>;
 272                 };
 273
 274                 uartb4_clk: uartb4 {
 275                         compatible = "fixed-clock";
 276                         clock-frequency = <13000000>;
 277                         #clock-cells = <0>;
 278                 };
 279
 280                 usb_otg_ahb_clk: usb_otg_ahb {
 281                         compatible = "fixed-clock";
 282                         clock-frequency = <52000000>;
 283                         #clock-cells = <0>;
 284                 };
 285         };
 286
 287         usbotg: usb@3f120000 {
 288                 compatible = "snps,dwc2";
 289                 reg = <0x3f120000 0x10000>;
 290                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 291                 clocks = <&usb_otg_ahb_clk>;
 292                 clock-names = "otg";
 293                 phys = <&usbphy>;
 294                 phy-names = "usb2-phy";
 295                 status = "disabled";
 296         };
 297
 298         usbphy: usb-phy@3f130000 {
 299                 compatible = "brcm,kona-usb2-phy";
 300                 reg = <0x3f130000 0x28>;
 301                 #phy-cells = <0>;
 302                 status = "disabled";
 303         };
 304 };