]> Pileus Git - ~andy/csm213a-hw/blobdiff - vis/device.py
GTK+ 3 support
[~andy/csm213a-hw] / vis / device.py
index 3d19ab24f2af66245f85ac57b17b09ed249af1f0..cf2d16d409c983de12b79e388fdac5ca1e17ddb2 100644 (file)
@@ -79,7 +79,7 @@ class Frame:
                    TYP_U8:  'B', TYP_U16: 'H', TYP_U32: 'I',
                    TYP_F32: 'f', TYP_F64: 'd'}
 
-        sampleNum= {SNS_ACC:   0,
+       sampleNum= {SNS_ACC:   0,
                    SNS_MAG:   0,
                    SNS_LGT:   0,
                    SNS_TCH:   0,
@@ -161,12 +161,12 @@ class Frame:
                self.values = unpack('<'+fmt, self.binary)
 
                # Print debug output
-                self.sampleNum[self.bits_sns] += 1
+               self.sampleNum[self.bits_sns] += 1
                #if self.sampleNum[self.bits_sns] == 1000:
                if self.sampleNum[self.bits_sns] == 1000:
-                        print('convert: %3s = \'%3s\'%%[%s] -> [%s]' %
-                              (sns, fmt, hexDump(self.binary), fltDump(self.values)))
-                        self.sampleNum[self.bits_sns] = 0
+                       print('convert: %3s = \'%3s\'%%[%s] -> [%s]' %
+                               (sns, fmt, hexDump(self.binary), fltDump(self.values)))
+                       self.sampleNum[self.bits_sns] = 0
 
                # Create state
                state = State()