* Signal generation *
*********************/
-// for 50 Mhz clock 50/1000 = 1/20 (PLL/2)
+// for 50 MHz clock 50/1000 = 1/20 (PLL/2)
-// for 48 Mhz clock 48/1000 = 6/125 (FLL)
-// for 24 Mhz clock, 24/1000 = 3/125
-// for 12 Mhz clock, 12/1000 = 3/250
-// for 6 Mhz clock, 6/1000 = 3/500
-// for 3 Mhz clock, 3/1000 = 3/1000
+// for 48 MHz clock 48/1000 = 6/125 (FLL)
+// for 24 MHz clock, 24/1000 = 3/125
+// for 12 MHz clock, 12/1000 = 3/250
+// for 6 MHz clock, 6/1000 = 3/500
+// for 3 MHz clock, 3/1000 = 3/1000
#define EMIT_PS 1
TPM1->MOD = TPM_MOD_MOD(0xFFFF);
TPM1->CONTROLS[0].CnSC = TPM_CnSC_CHF_MASK // clear flag
- | TPM_CnSC_MSB_MASK // set output highon match,
+ | TPM_CnSC_MSB_MASK // set output high on match,
| TPM_CnSC_ELSB_MASK // cleared on overflow
| TPM_CnSC_ELSA_MASK; // ..