]> Pileus Git - ~andy/linux/commit
ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE
authorWill Deacon <will.deacon@arm.com>
Tue, 17 Dec 2013 18:17:11 +0000 (19:17 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 29 Dec 2013 12:46:47 +0000 (12:46 +0000)
commite1a5848e3398dca135f3ae77fe2e01145f9d8826
treeb022e51a78e1d923c4ba7ddd342ff209df154174
parenta472b09dd5bb00f7da3087f2a324eb963e8eaa9f
ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE

With the new ASID allocation algorithm, active ASIDs at the time of a
rollover event will be marked as reserved, so active mm_structs can
continue to operate with the same ASID as before. This in turn means
that we don't need to worry about allocating a new ASID to an mm that
is currently active (installed in TTBR0).

Since updating the pgd and ASID is atomic on LPAE systems (by virtue of
the two being fields in the same hardware register), we can dispose of
the reserved TTBR0 and rely on whatever tables we currently have live.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/context.c