]> Pileus Git - ~andy/linux/commit
ixgbe: Clear head write-back registers on VF reset
authorAlexander Duyck <alexander.h.duyck@intel.com>
Thu, 16 Jan 2014 01:38:41 +0000 (17:38 -0800)
committerDavid S. Miller <davem@davemloft.net>
Thu, 16 Jan 2014 05:48:18 +0000 (21:48 -0800)
commitdbf231af81a789645f7c8d7e3ddce48e1ef08083
treedc0cdd6a5e7d3f0b8628069a756e779ca0319803
parent87397379d566d5d8692df1bfc22bef95fd64ae3b
ixgbe: Clear head write-back registers on VF reset

The Tx head write-back registers are not cleared during an FLR or VF reset.
As a result a configuration that had head write-back enabled can leave the
registers set after the driver is unloaded.  If the next driver loaded doesn't
use the write-back registers this can lead to a bad configuration where
head write-back is enabled, but the driver didn't request it.

To avoid this situation the PF should be resetting the Tx head write-back
registers when the VF requests a reset.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h