]> Pileus Git - ~andy/linux/commit
spi/pxa2xx: Restore private register bits.
authorChew, Chiau Ee <chiau.ee.chew@intel.com>
Thu, 28 Nov 2013 18:13:11 +0000 (02:13 +0800)
committerMark Brown <broonie@linaro.org>
Thu, 28 Nov 2013 11:23:37 +0000 (11:23 +0000)
commitc50325f7bcb8a3ceaacb9dbc41180b1cbbae7b5e
treea1a133a87129f779abad37eaa3861b84f7ddc816
parent54acbd9688e6324470671525c7916011f1ff8081
spi/pxa2xx: Restore private register bits.

The Intel LPSS SPI private register bits have to be restored
when system resume from S3 suspend.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
drivers/spi/spi-pxa2xx.c