]> Pileus Git - ~andy/linux/commit
arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Thu, 6 Jun 2013 09:21:23 +0000 (11:21 +0200)
committerJason Cooper <jason@lakedaemon.net>
Thu, 6 Jun 2013 19:09:00 +0000 (19:09 +0000)
commit5f1f3d5088316f827591764aa6a5e7161eb514bd
tree9ed6528b33dd6051d63ed304eeb040956cb27b86
parent4089fe95bfed295c8ad38251d5fe02b6b0ba684c
arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range

The ranges DT entry needed by the PCIe controller is defined at the
SoC .dtsi level. However, some boards have a NOR flash, and to support
it, they need to override the SoC-level ranges property to add an
additional range. Since PCIe and NOR support came separately, some
boards were not properly changed to include the PCIe range in their
ranges property at the .dts level.

This commit fixes those platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-xp-gp.dts
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts