]> Pileus Git - ~andy/linux/commit
MIPS: fix blast_icache32 on loongson2
authorAaro Koskinen <aaro.koskinen@iki.fi>
Wed, 15 Jan 2014 01:56:38 +0000 (17:56 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Wed, 15 Jan 2014 07:19:42 +0000 (14:19 +0700)
commit43a06847b9d277e9f2c3bf8052b44b74e17526c7
tree0a6b948cd56efe2dcbfe17d90f016986f8bca99b
parentbad009fe354a00e6b2bf87328995ec76e59ab970
MIPS: fix blast_icache32 on loongson2

Commit 14bd8c082016 ("MIPS: Loongson: Get rid of Loongson 2 #ifdefery
all over arch/mips") failed to add Loongson2 specific blast_icache32
functions.  Fix that.

The patch fixes the following crash seen with 3.13-rc1:

  Reserved instruction in kernel code[#1]:
  [...]
  Call Trace:
    blast_icache32_page+0x8/0xb0
    r4k_flush_cache_page+0x19c/0x200
    do_wp_page.isra.97+0x47c/0xe08
    handle_mm_fault+0x938/0x1118
    __do_page_fault+0x140/0x540
    resume_userspace_check+0x0/0x10
  Code: 00200825  64834000  00200825 <bc900000bc900020  bc900040  bc900060  bc900080  bc9000a0

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
arch/mips/include/asm/r4kcache.h
arch/mips/mm/c-r4k.c