#define WM8994_FLL1_CONTROL_3 0x222
#define WM8994_FLL1_CONTROL_4 0x223
#define WM8994_FLL1_CONTROL_5 0x224
+#define WM8958_FLL1_EFS_1 0x226
+#define WM8958_FLL1_EFS_2 0x227
#define WM8994_FLL2_CONTROL_1 0x240
#define WM8994_FLL2_CONTROL_2 0x241
#define WM8994_FLL2_CONTROL_3 0x242
#define WM8994_FLL2_CONTROL_4 0x243
#define WM8994_FLL2_CONTROL_5 0x244
+#define WM8958_FLL2_EFS_1 0x246
+#define WM8958_FLL2_EFS_2 0x247
#define WM8994_AIF1_CONTROL_1 0x300
#define WM8994_AIF1_CONTROL_2 0x301
#define WM8994_AIF1_MASTER_SLAVE 0x302
#define WM8994_AIF2DAC_LRCLK 0x315
#define WM8994_AIF2DAC_DATA 0x316
#define WM8994_AIF2ADC_DATA 0x317
+#define WM1811_AIF2TX_CONTROL 0x318
#define WM8958_AIF3_CONTROL_1 0x320
#define WM8958_AIF3_CONTROL_2 0x321
#define WM8958_AIF3DAC_DATA 0x322
#define WM8994_AIF1_DAC1_EQ_BAND_5_A 0x491
#define WM8994_AIF1_DAC1_EQ_BAND_5_B 0x492
#define WM8994_AIF1_DAC1_EQ_BAND_5_PG 0x493
+#define WM8994_AIF1_DAC1_EQ_BAND_1_C 0x494
#define WM8994_AIF1_DAC2_EQ_GAINS_1 0x4A0
#define WM8994_AIF1_DAC2_EQ_GAINS_2 0x4A1
#define WM8994_AIF1_DAC2_EQ_BAND_1_A 0x4A2
#define WM8994_AIF1_DAC2_EQ_BAND_5_A 0x4B1
#define WM8994_AIF1_DAC2_EQ_BAND_5_B 0x4B2
#define WM8994_AIF1_DAC2_EQ_BAND_5_PG 0x4B3
+#define WM8994_AIF1_DAC2_EQ_BAND_1_C 0x4B4
#define WM8994_AIF2_ADC_LEFT_VOLUME 0x500
#define WM8994_AIF2_ADC_RIGHT_VOLUME 0x501
#define WM8994_AIF2_DAC_LEFT_VOLUME 0x502
#define WM8994_AIF2_EQ_BAND_5_A 0x591
#define WM8994_AIF2_EQ_BAND_5_B 0x592
#define WM8994_AIF2_EQ_BAND_5_PG 0x593
+#define WM8994_AIF2_EQ_BAND_1_C 0x594
#define WM8994_DAC1_MIXER_VOLUMES 0x600
#define WM8994_DAC1_LEFT_MIXER_ROUTING 0x601
#define WM8994_DAC1_RIGHT_MIXER_ROUTING 0x602
#define WM8958_DSP2_RELEASETIME 0xA03
#define WM8958_DSP2_VERMAJMIN 0xA04
#define WM8958_DSP2_VERBUILD 0xA05
+#define WM8958_DSP2_TESTREG 0xA06
+#define WM8958_DSP2_XORREG 0xA07
+#define WM8958_DSP2_SHIFTMAXX 0xA08
+#define WM8958_DSP2_SHIFTMAXY 0xA09
+#define WM8958_DSP2_SHIFTMAXZ 0xA0A
+#define WM8958_DSP2_SHIFTMAXEXTLO 0xA0B
+#define WM8958_DSP2_AESSELECT 0xA0C
#define WM8958_DSP2_EXECCONTROL 0xA0D
+#define WM8958_DSP2_SAMPLEBREAK 0xA0E
+#define WM8958_DSP2_COUNTBREAK 0xA0F
+#define WM8958_DSP2_INTSTATUS 0xA10
+#define WM8958_DSP2_EVENTSTATUS 0xA11
+#define WM8958_DSP2_INTMASK 0xA12
+#define WM8958_DSP2_CONFIGDWIDTH 0xA13
+#define WM8958_DSP2_CONFIGINSTR 0xA14
+#define WM8958_DSP2_CONFIGDMEM 0xA15
+#define WM8958_DSP2_CONFIGDELAYS 0xA16
+#define WM8958_DSP2_CONFIGNUMIO 0xA17
+#define WM8958_DSP2_CONFIGEXTDEPTH 0xA18
+#define WM8958_DSP2_CONFIGMULTIPLIER 0xA19
+#define WM8958_DSP2_CONFIGCTRLDWIDTH 0xA1A
+#define WM8958_DSP2_CONFIGPIPELINE 0xA1B
+#define WM8958_DSP2_SHIFTMAXEXTHI 0xA1C
+#define WM8958_DSP2_SWVERSIONREG 0xA1D
+#define WM8958_DSP2_CONFIGXMEM 0xA1E
+#define WM8958_DSP2_CONFIGYMEM 0xA1F
+#define WM8958_DSP2_CONFIGZMEM 0xA20
+#define WM8958_FW_BUILD_1 0x2000
+#define WM8958_FW_BUILD_0 0x2001
+#define WM8958_FW_ID_1 0x2002
+#define WM8958_FW_ID_0 0x2003
+#define WM8958_FW_MAJOR_1 0x2004
+#define WM8958_FW_MAJOR_0 0x2005
+#define WM8958_FW_MINOR_1 0x2006
+#define WM8958_FW_MINOR_0 0x2007
+#define WM8958_FW_PATCH_1 0x2008
+#define WM8958_FW_PATCH_0 0x2009
#define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1 0x2200
#define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_2 0x2201
#define WM8958_MBC_BAND_2_LOWER_CUTOFF_C2_1 0x2202
#define WM8958_MBC_B2_PG2_2 0x242D
#define WM8958_MBC_B1_PG2_1 0x242E
#define WM8958_MBC_B1_PG2_2 0x242F
+#define WM8958_MBC_CROSSOVER_1 0x2600
+#define WM8958_MBC_CROSSOVER_2 0x2601
+#define WM8958_MBC_HPF_1 0x2602
+#define WM8958_MBC_HPF_2 0x2603
+#define WM8958_MBC_LPF_1 0x2606
+#define WM8958_MBC_LPF_2 0x2607
+#define WM8958_MBC_RMS_LIMIT_1 0x260A
+#define WM8958_MBC_RMS_LIMIT_2 0x260B
#define WM8994_WRITE_SEQUENCER_0 0x3000
#define WM8994_WRITE_SEQUENCER_1 0x3001
#define WM8994_WRITE_SEQUENCER_2 0x3002
/*
* R548 (0x224) - FLL1 Control (5)
*/
+#define WM8958_FLL1_BYP 0x8000 /* FLL1_BYP */
+#define WM8958_FLL1_BYP_MASK 0x8000 /* FLL1_BYP */
+#define WM8958_FLL1_BYP_SHIFT 15 /* FLL1_BYP */
+#define WM8958_FLL1_BYP_WIDTH 1 /* FLL1_BYP */
#define WM8994_FLL1_FRC_NCO_VAL_MASK 0x1F80 /* FLL1_FRC_NCO_VAL - [12:7] */
#define WM8994_FLL1_FRC_NCO_VAL_SHIFT 7 /* FLL1_FRC_NCO_VAL - [12:7] */
#define WM8994_FLL1_FRC_NCO_VAL_WIDTH 6 /* FLL1_FRC_NCO_VAL - [12:7] */
#define WM8994_FLL1_REFCLK_SRC_SHIFT 0 /* FLL1_REFCLK_SRC - [1:0] */
#define WM8994_FLL1_REFCLK_SRC_WIDTH 2 /* FLL1_REFCLK_SRC - [1:0] */
+/*
+ * R550 (0x226) - FLL1 EFS 1
+ */
+#define WM8958_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
+#define WM8958_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
+#define WM8958_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */
+
+/*
+ * R551 (0x227) - FLL1 EFS 2
+ */
+#define WM8958_FLL1_LFSR_SEL_MASK 0x0006 /* FLL1_LFSR_SEL - [2:1] */
+#define WM8958_FLL1_LFSR_SEL_SHIFT 1 /* FLL1_LFSR_SEL - [2:1] */
+#define WM8958_FLL1_LFSR_SEL_WIDTH 2 /* FLL1_LFSR_SEL - [2:1] */
+#define WM8958_FLL1_EFS_ENA 0x0001 /* FLL1_EFS_ENA */
+#define WM8958_FLL1_EFS_ENA_MASK 0x0001 /* FLL1_EFS_ENA */
+#define WM8958_FLL1_EFS_ENA_SHIFT 0 /* FLL1_EFS_ENA */
+#define WM8958_FLL1_EFS_ENA_WIDTH 1 /* FLL1_EFS_ENA */
+
/*
* R576 (0x240) - FLL2 Control (1)
*/
/*
* R580 (0x244) - FLL2 Control (5)
*/
+#define WM8958_FLL2_BYP 0x8000 /* FLL2_BYP */
+#define WM8958_FLL2_BYP_MASK 0x8000 /* FLL2_BYP */
+#define WM8958_FLL2_BYP_SHIFT 15 /* FLL2_BYP */
+#define WM8958_FLL2_BYP_WIDTH 1 /* FLL2_BYP */
#define WM8994_FLL2_FRC_NCO_VAL_MASK 0x1F80 /* FLL2_FRC_NCO_VAL - [12:7] */
#define WM8994_FLL2_FRC_NCO_VAL_SHIFT 7 /* FLL2_FRC_NCO_VAL - [12:7] */
#define WM8994_FLL2_FRC_NCO_VAL_WIDTH 6 /* FLL2_FRC_NCO_VAL - [12:7] */
#define WM8994_FLL2_REFCLK_SRC_SHIFT 0 /* FLL2_REFCLK_SRC - [1:0] */
#define WM8994_FLL2_REFCLK_SRC_WIDTH 2 /* FLL2_REFCLK_SRC - [1:0] */
+/*
+ * R582 (0x246) - FLL2 EFS 1
+ */
+#define WM8958_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */
+#define WM8958_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */
+#define WM8958_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */
+
+/*
+ * R583 (0x247) - FLL2 EFS 2
+ */
+#define WM8958_FLL2_LFSR_SEL_MASK 0x0006 /* FLL2_LFSR_SEL - [2:1] */
+#define WM8958_FLL2_LFSR_SEL_SHIFT 1 /* FLL2_LFSR_SEL - [2:1] */
+#define WM8958_FLL2_LFSR_SEL_WIDTH 2 /* FLL2_LFSR_SEL - [2:1] */
+#define WM8958_FLL2_EFS_ENA 0x0001 /* FLL2_EFS_ENA */
+#define WM8958_FLL2_EFS_ENA_MASK 0x0001 /* FLL2_EFS_ENA */
+#define WM8958_FLL2_EFS_ENA_SHIFT 0 /* FLL2_EFS_ENA */
+#define WM8958_FLL2_EFS_ENA_WIDTH 1 /* FLL2_EFS_ENA */
+
/*
* R768 (0x300) - AIF1 Control (1)
*/
projects / ~andy / linux / blobdiff