Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

[~andy/linux] / drivers / char / agp / intel-gtt.c

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 078968d8d07d933b974c8183b6cbd1f9a7163011..5c85350f4c3d065e9c9bdf9ba762667604b7c0f3 100644 (file)
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -64,7 +64,7 @@ static struct _intel_private {
        struct pci_dev *pcidev; /* device one */
        struct pci_dev *bridge_dev;
        u8 __iomem *registers;
-       phys_addr_t gtt_bus_addr;
+       phys_addr_t gtt_phys_addr;
        u32 PGETBL_save;
        u32 __iomem *gtt;               /* I915G */
        bool clear_fake_agp; /* on first access via agp, fill with scratch */
@@ -174,7 +174,7 @@ static void i8xx_destroy_pages(struct page *page)
 #define I810_GTT_ORDER 4
 static int i810_setup(void)
 {
-       u32 reg_addr;
+       phys_addr_t reg_addr;
        char *gtt_table;
 
        /* i81x does not preallocate the gtt. It's always 64kb in size. */
@@ -183,8 +183,7 @@ static int i810_setup(void)
                return -ENOMEM;
        intel_private.i81x_gtt_table = gtt_table;
 
-       pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &reg_addr);
-       reg_addr &= 0xfff80000;
+       reg_addr = pci_resource_start(intel_private.pcidev, I810_MMADR_BAR);
 
        intel_private.registers = ioremap(reg_addr, KB(64));
        if (!intel_private.registers)
@@ -193,7 +192,7 @@ static int i810_setup(void)
        writel(virt_to_phys(gtt_table) | I810_PGETBL_ENABLED,
               intel_private.registers+I810_PGETBL_CTL);
 
-       intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
+       intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE;
 
        if ((readl(intel_private.registers+I810_DRAM_CTL)
                & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
@@ -612,9 +611,8 @@ static bool intel_gtt_can_wc(void)
 
 static int intel_gtt_init(void)
 {
-       u32 gma_addr;
        u32 gtt_map_size;
-       int ret;
+       int ret, bar;
 
        ret = intel_private.driver->setup();
        if (ret != 0)
@@ -640,10 +638,10 @@ static int intel_gtt_init(void)
 
        intel_private.gtt = NULL;
        if (intel_gtt_can_wc())
-               intel_private.gtt = ioremap_wc(intel_private.gtt_bus_addr,
+               intel_private.gtt = ioremap_wc(intel_private.gtt_phys_addr,
                                               gtt_map_size);
        if (intel_private.gtt == NULL)
-               intel_private.gtt = ioremap(intel_private.gtt_bus_addr,
+               intel_private.gtt = ioremap(intel_private.gtt_phys_addr,
                                            gtt_map_size);
        if (intel_private.gtt == NULL) {
                intel_private.driver->cleanup();
@@ -666,14 +664,11 @@ static int intel_gtt_init(void)
        }
 
        if (INTEL_GTT_GEN <= 2)
-               pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
-                                     &gma_addr);
+               bar = I810_GMADR_BAR;
        else
-               pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
-                                     &gma_addr);
-
-       intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
+               bar = I915_GMADR_BAR;
 
+       intel_private.gma_bus_addr = pci_bus_address(intel_private.pcidev, bar);
        return 0;
 }
 
@@ -795,16 +790,15 @@ EXPORT_SYMBOL(intel_enable_gtt);
 
 static int i830_setup(void)
 {
-       u32 reg_addr;
+       phys_addr_t reg_addr;
 
-       pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &reg_addr);
-       reg_addr &= 0xfff80000;
+       reg_addr = pci_resource_start(intel_private.pcidev, I810_MMADR_BAR);
 
        intel_private.registers = ioremap(reg_addr, KB(64));
        if (!intel_private.registers)
                return -ENOMEM;
 
-       intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
+       intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE;
 
        return 0;
 }
@@ -1122,12 +1116,10 @@ static void i965_write_entry(dma_addr_t addr,
 
 static int i9xx_setup(void)
 {
-       u32 reg_addr, gtt_addr;
+       phys_addr_t reg_addr;
        int size = KB(512);
 
-       pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &reg_addr);
-
-       reg_addr &= 0xfff80000;
+       reg_addr = pci_resource_start(intel_private.pcidev, I915_MMADR_BAR);
 
        intel_private.registers = ioremap(reg_addr, size);
        if (!intel_private.registers)
@@ -1135,15 +1127,14 @@ static int i9xx_setup(void)
 
        switch (INTEL_GTT_GEN) {
        case 3:
-               pci_read_config_dword(intel_private.pcidev,
-                                     I915_PTEADDR, &gtt_addr);
-               intel_private.gtt_bus_addr = gtt_addr;
+               intel_private.gtt_phys_addr =
+                       pci_resource_start(intel_private.pcidev, I915_PTE_BAR);
                break;
        case 5:
-               intel_private.gtt_bus_addr = reg_addr + MB(2);
+               intel_private.gtt_phys_addr = reg_addr + MB(2);
                break;
        default:
-               intel_private.gtt_bus_addr = reg_addr + KB(512);
+               intel_private.gtt_phys_addr = reg_addr + KB(512);
                break;
        }