From: Andy Spencer <andy753421@gmail.com>
Date: Wed, 12 Mar 2014 17:54:08 +0000 (+0000)
Subject: Debug TPM settings
X-Git-Url: http://pileus.org/git/?p=~andy%2Fcsm213a-hw;a=commitdiff_plain;h=87a59e170ee8c19870718cb371508d68bc58d10d

Debug TPM settings

- Disable prescaler
- Check FLL/PLL select in SOPT2
- Optimize CLOCK/NSEC conversion
- Set oscillator to high gain operation
- Add debug code for TPM/PIT counters
---

diff --git a/hw2/main.cpp b/hw2/main.cpp
index 52e84aa..47b701b 100644
--- a/hw2/main.cpp
+++ b/hw2/main.cpp
@@ -111,8 +111,11 @@ void time_printf(const char *label, uint64_t local)
  * Signal generation *
  *********************/
 
-#define EMIT_CLOCKS(nsec) ((uint16_t)((nsec) * 24 / 1000))
-#define EMIT_NSEC(clocks) ((uint16_t)((clocks) * 1000 / 24))
+// for 24 Mhz clock, 24/1000 = 3/125
+// for 48 Mhz clock  48/1000 = 6/125
+// for 50 Mhz clock  50/1000 = 1/20  (FLL/2)
+#define EMIT_CLOCKS(nsec) ((uint16_t)((nsec)   / 20))
+#define EMIT_NSEC(clocks) ((uint16_t)((clocks) * 20))
 
 static uint32_t *emit_pcr    = 0; // transmit pin name
 
@@ -132,6 +135,16 @@ void emit_init(int alt, PinName pin, PinMode mode)
 	SIM->SCGC6            |= SIM_SCGC6_TPM1_MASK;
 	SIM->SOPT2            |= SIM_SOPT2_TPMSRC(1);
 
+	// Debug print on SOPT2
+	// -- mbed may set PLLFLL when configuring UART0
+	sirq_printf("SOPT2: u0src=%d tpmsrc=%d %s %s clkos=%d %s\r\n",
+		(SIM->SOPT2 & SIM_SOPT2_UART0SRC_MASK)     >> SIM_SOPT2_UART0SRC_SHIFT,
+		(SIM->SOPT2 & SIM_SOPT2_TPMSRC_MASK)       >> SIM_SOPT2_TPMSRC_SHIFT,
+		(SIM->SOPT2 & SIM_SOPT2_UART0SRC_MASK)     ? "USBSRC" : "usbsrc",
+		(SIM->SOPT2 & SIM_SOPT2_PLLFLLSEL_MASK)    ? "PLL/2"  : "FLL",
+		(SIM->SOPT2 & SIM_SOPT2_CLKOUTSEL_MASK)    >> SIM_SOPT2_CLKOUTSEL_SHIFT,
+		(SIM->SOPT2 & SIM_SOPT2_RTCCLKOUTSEL_MASK) ? "RTCOS"  : "rtcos");
+
 	// Set pin mode
 	emit_pcr[0]            = PORT_PCR_ISF_MASK
 	                       | PORT_PCR_MUX(alt)
@@ -184,9 +197,22 @@ void emit_schedule(uint64_t when)
 
 	// Start the timer
 	TPM1->SC               = TPM_SC_TOF_MASK
-	                       | TPM_SC_PS(1)
+	                       | TPM_SC_PS(0)
 	                       | TPM_SC_CMOD(1);
 
+	// Clock testing
+	uint32_t test_tpm0 = TPM1->SC;
+	uint32_t test_pit0 = PIT->CHANNEL[1].CVAL;
+	for (int i = 0; i < 1000; i++)
+		asm("nop");
+	uint32_t test_tpm1 = TPM1->SC;
+	uint32_t test_pit1 = PIT->CHANNEL[1].CVAL;
+	uint32_t test_tpm  = test_tpm0 - test_tpm0;
+	uint32_t test_pit  = test_pit1 - test_pit0;
+	sirq_printf("pit/tpm: tpm=%04hx/%04hx=%d pit=%08x/%08x=%d\r\n",
+			test_tpm0, test_tpm1, test_tpm,
+			test_pit0, test_pit1, test_pit);
+
 	// Debug output
 	//sirq_printf("emitting event\r\n");
 }
@@ -649,6 +675,9 @@ int main(int argc, char **argv)
 	serial_tdma_rcv = tdma_rcv;
 	serial_tdma_xmt = tdma_xmt;
 
+	// configure crystal oscilator for high gain operation
+	MCG->C2 |= MCG_C2_HGO0_MASK;
+
 	// Test clocks
 	//MCG->C1    = 0x05; // was 0x1A
 	//MCG->C2    = 0x2C; // was 0x24