From: Andy Spencer Date: Sun, 9 Mar 2014 06:41:37 +0000 (+0000) Subject: Add dma timestamper X-Git-Url: http://pileus.org/git/?p=~andy%2Fcsm213a-hw;a=commitdiff_plain;h=016f9302e4a8fba1c55fee31dcb2662b370a9298 Add dma timestamper --- diff --git a/hw2/main.cpp b/hw2/main.cpp index d6a0742..006f852 100644 --- a/hw2/main.cpp +++ b/hw2/main.cpp @@ -1,5 +1,6 @@ #include "mbed.h" #include "serial_dma.h" +#include "timer_dma.h" /** * Mode of operation: @@ -18,38 +19,45 @@ * * Only port A, C, and D can do aysnc DMA (p. 67) * + * DMA Channel Allocation: + * Ch Trigger Description + * 0 gpio timestamp (async event) + * 1 uart1 transmit + * 2 uart2 tx timestamp (time sync xmt) + * 3 uart2 rx timestamp (time sync rcv) + * * Uart Sources: * UART 0 UART 1 UART 2 * xmt rcv xmt rcv xmt rcv * --- --- --- --- --- --- - * A2 A1 **A19 A18** - - + * A2 A1 --A19 A18-- - - * A14 A15 - - - - * B17 B16 - - - - - * - - **C4 C3** - - - * D7 D6 - - **D3 D2** <<< - * - - - - **D5 D4** - * E20 E21 E0 E1 E16 E17 - * - - - - E22 E23 + * - - **C4 C3-- - - + * D7 D6 - - **D3/3 D2/3** <<< + * - - - - **D5/3 D4/3** + * E20 E21 E0 E1 E16 E17 + * - - - - E22 E23 * * Pinout - * A1 B18 E30 C1 - * A2 B19 B20 C2 - * D3 C0 E23 B3 - * A12 C4 E22 B2 - * A4 C6 E21 B1 - * A5 C7 E20 B0 - * C8 C10 - * C9 C11 E2 P5-9V - * E3 GND - * A13 C13 E6 GND - * D2 C16 E16 P5V-USB - * D4 A7 E17 P3V3 - * D6 A6 E18 RST - * D7 A14 E19 P3V3 - * D5 A15 E31 SDA/D5 - * GND A15 - * VREFH A17 - * E0 B9 + * A1 B18 E30 C1 + * A2 B19 B20 C2 + * D3 C0 E23 B3 + * A12 C4 E22 B2 + * A4 C6 E21 B1 + * A5 C7 E20 B0 + * C8 C10 + * C9 C11 E2 P5-9V + * E3 GND + * A13 C13 E6 GND + * D2 C16 E16 P5V-USB + * D4 A7 E17 P3V3 + * D6 A6 E18 RST + * D7 A14 E19 P3V3 + * D5 A15 E31 SDA/D5 + * GND A15 + * VREFH A17 + * E0 B9 * E1 -- */ @@ -188,6 +196,12 @@ sdma_t *sdma0; sdma_t *sdma1; sdma_t *sdma2; +// Timer DMA +tdma_t *tdma0; +tdma_t *tdma1; +tdma_t *tdma2; +tdma_t *tdma3; + /******** * Main * ********/ @@ -338,13 +352,24 @@ void test_pit_run(void) uint64_t tm1 = ~((uint64_t)hi1 << 32 | lo1); double bus = 24E6; // 24 MHz bus clock - printf("tick %08lx:%08lx", (uint32_t)(tm0>>32), (uint32_t)tm0); - printf( " %08lx:%08lx", (uint32_t)(tm1>>32), (uint32_t)tm1); - printf( " %08lx", (uint32_t)(tm1-tm0)); - printf( " %f\r\n", (double)tm0 / bus); + printf(" - pit"); + printf(" %08lx:%08lx", (uint32_t)(tm0>>32), (uint32_t)tm0); + printf(" %08lx:%08lx", (uint32_t)(tm1>>32), (uint32_t)tm1); + printf(" %08lx", (uint32_t)(tm1-tm0)); + printf(" %f", (double)tm0 / bus); +} + +void test_sdma_init(void) +{ + sdma0 = sdma_open(SDMA_UART0, SDMA_CHANNEL0, SDMA_CHANNEL1); + sdma1 = sdma_open(SDMA_UART1, SDMA_CHANNEL0, SDMA_CHANNEL1); + sdma2 = sdma_open(SDMA_UART2, SDMA_CHANNEL2, SDMA_CHANNEL3); + + sdma_pinmap(sdma1, PTE0, PTE1); + sdma_pinmap(sdma2, PTD3, PTD2); } -void test_uart(void) +void test_sdma_run(void) { char xmt[32] = "hello, world"; char rcv[32] = {}; @@ -354,27 +379,59 @@ void test_uart(void) sdma_write(sdma1, xmt, strlen(xmt)); sdma_flush(sdma1, &tm1); - //sdma_read(sdma2, rcv, strlen(xmt)); + sdma_read(sdma2, rcv, strlen(xmt)); sdma_wait(sdma2, &tm2); - //printf("send: [%s] -> [%s] ", xmt, rcv); - //printf("time: %08lx / %08lx ", (uint32_t)tm1, (uint32_t)tm2); - //printf("tag: dir:%08lx in:%08lx\r\n", - // FPTD->PDDR, FPTD->PDIR); + printf("send: [%s] -> [%s] ", xmt, rcv); + printf("time: %08lx / %08lx ", (uint32_t)tm1, (uint32_t)tm2); + printf("tag: dir:%08lx in:%08lx\r\n", + FPTD->PDDR, FPTD->PDIR); (void)xmt; (void)rcv; (void)tm1; (void)tm2; } -void test_leds(void) +void test_tdma_init(void) { - led1 = 1; led2 = 0; wait(0.1); - led1 = 0; led2 = 1; wait(0.1); + tdma_init(); + + tdma0 = tdma_open(TDMA_CHAN0, PTA1, PullNone); + tdma1 = tdma_open(TDMA_CHAN1, PTC1, PullNone); + tdma2 = tdma_open(TDMA_CHAN2, PTD3, PullUp); + tdma3 = tdma_open(TDMA_CHAN3, PTD2, PullUp); } -void test_irq(void) +void test_tdma_run(void) { - printf("\r\nirq"); + static uint32_t time0[2]; + static uint32_t time1[2]; + static uint32_t time2[2]; + static uint32_t time3[2]; + + tdma_stamp(tdma0, (uint64_t*)&time0); + tdma_stamp(tdma1, (uint64_t*)&time1); + tdma_stamp(tdma2, (uint64_t*)&time2); + tdma_stamp(tdma3, (uint64_t*)&time3); + + tdma_reset(tdma0); + tdma_reset(tdma1); + tdma_reset(tdma2); + tdma_reset(tdma3); + + printf(" - timer:"); + printf(" %08lx:%08lx", time0[1], time0[0]); + printf(" %08lx:%08lx", time1[1], time1[0]); + printf(" %08lx:%08lx", time2[1], time2[0]); + printf(" %08lx:%08lx", time3[1], time3[0]); + //printf(" do:%08lx", FPTD->PDOR); + //printf(" di:%08lx", FPTD->PDIR); + //printf(" dd:%08lx", FPTD->PDDR); +} + +void test_leds(void) +{ + led1 = 1; led2 = 0; wait(0.1); + led1 = 0; led2 = 1; wait(0.1); } int main(int argc, char **argv) @@ -383,23 +440,20 @@ int main(int argc, char **argv) uart1.baud(115200); uart2.baud(115200); - //sdma0 = sdma_open(SDMA_UART0, SDMA_CHANNEL0, SDMA_CHANNEL1); - sdma1 = sdma_open(SDMA_UART1, SDMA_CHANNEL0, SDMA_CHANNEL1); - sdma2 = sdma_open(SDMA_UART2, SDMA_CHANNEL2, SDMA_CHANNEL3); - - sdma_pinmap(sdma1, PTE0, PTE1); - sdma_pinmap(sdma2, PTD3, PTD2); - - //test_uart(); - //test_leds(); - test_pit_init(); + printf("init\r\n"); //test_tpm_init(); + //test_pit_init(); + //test_sdma_init(); + test_tdma_init(); - while (1) { - test_uart(); + printf("run\r\n"); + for (int i = 0; true; i++) { + printf("%8d", i); //test_leds(); - //test_pit_run(); //test_tpm_run(); + //test_pit_run(); + //test_sdma_run(); + test_tdma_run(); printf("\r\n"); } } diff --git a/hw2/makefile b/hw2/makefile index 1185448..d27995c 100644 --- a/hw2/makefile +++ b/hw2/makefile @@ -1,5 +1,5 @@ PROG = mbed -OBJS = main.o serial_dma.o +OBJS = main.o serial_dma.o timer_dma.o CPPFLAGS = LDFLAGS = -lm diff --git a/hw2/timer_dma.c b/hw2/timer_dma.c new file mode 100644 index 0000000..23f11e2 --- /dev/null +++ b/hw2/timer_dma.c @@ -0,0 +1,144 @@ +#include + +#include +#include +#include +#include + +#include "timer_dma.h" + +/* Defines */ +enum { + TDMA_REQ_PTA = 49, + TDMA_REQ_PTC = 51, + TDMA_REQ_PTD = 52, +}; + +/* Port structure */ +struct tdma_t { + /* DMA channel */ + struct { + uint32_t sar; // offset 0x00, Source Address Register + uint32_t dar; // offset 0x04, Destination Address Register + uint32_t dsr; // offset 0x08, DMA Status Register / Byte Count Register + uint32_t dcr; // offset 0x0C, DMA Control Register + } *dma; + + /* DMA mux */ + struct { + uint8_t cfg; // offset 0x00, Channel Configuration register + } *mux; + + /* Pin names */ + struct { + uint32_t pcr; // offset 0x00, Pin Control register + } *pin; + + /* Time stamping */ + uint32_t time[2]; +}; + +/* Port data */ +static tdma_t tdma_ports[TDMA_NUM_CHAN]; + +/* Global timer initialization */ +void tdma_init(void) +{ + // Enable DMA Cock + SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; + SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; + SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; + SIM->SCGC6 |= SIM_SCGC6_DMAMUX_MASK; + SIM->SCGC7 |= SIM_SCGC7_DMA_MASK; + + // Enable timer Clock + SIM->SCGC6 |= SIM_SCGC6_PIT_MASK; + + // Enable PIT + PIT->MCR = 0; + + // Channel 0 + PIT->CHANNEL[0].LDVAL = 0xFFFFFFFF; + PIT->CHANNEL[0].TCTRL = 0; + + // Channel 1 + PIT->CHANNEL[1].LDVAL = 0xFFFFFFFF; + PIT->CHANNEL[1].TCTRL = PIT_TCTRL_CHN_MASK; + + // Start timers + PIT->CHANNEL[0].TCTRL |= PIT_TCTRL_TEN_MASK; + PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK; +} + +/* DMA Functions */ +tdma_t *tdma_open(tdma_chan_t chan, PinName pin, PinMode mode) +{ + int req = pin >= PTD0 ? TDMA_REQ_PTD : + pin >= PTC0 ? TDMA_REQ_PTC : + pin >= PTA0 ? TDMA_REQ_PTA : 0; + + int ircq = mode == PullUp ? 2 : 1; + + // Allocate port + tdma_t *port = &tdma_ports[chan]; + + // Setup port pointers + port->dma = (void*)&DMA0->DMA[chan]; + port->mux = (void*)&DMAMUX0->CHCFG[chan]; + port->pin = (void*)(PORTA_BASE + pin); + + // Reset DMA channel + port->dma->dsr = DMA_DSR_BCR_DONE_MASK; + + // Configure DMA channel + port->dma->dcr = DMA_DCR_SINC_MASK // Source increment + | DMA_DCR_DINC_MASK // Dest increment + | DMA_DCR_SSIZE(0) // 32-bit access + | DMA_DCR_DSIZE(0) // 32-bit access + | DMA_DCR_ERQ_MASK; // Enable port request + + // Setup and enable DMA MUX + port->mux->cfg = DMAMUX_CHCFG_SOURCE(req) // Request source + | DMAMUX_CHCFG_ENBL_MASK; // Enable DMA mux + + // Set pin to generate DMA req + port->pin->pcr = PORT_PCR_ISF_MASK // Clear ISR flag + | PORT_PCR_MUX(3) // Pin mapping + | PORT_PCR_IRQC(ircq) // DMA on falling edge + | mode; // Pin pull up/down + + return port; +} + +void tdma_reset(tdma_t *port) +{ + // Clear previous time + port->time[0] = 0; + port->time[1] = 0; + + // Reset DMA channel + port->dma->dsr = DMA_DSR_BCR_DONE_MASK; + + // Set addresses and size + port->dma->sar = (uint32_t)&PIT->LTMR64H; // Global timer + port->dma->dar = (uint32_t)&port->time; // Temp timer buffer + port->dma->dsr = DMA_DSR_BCR_BCR(8); // 64-bit timer +} + +int tdma_stamp(tdma_t *port, uint64_t *time) +{ + if (port->dma->dsr & DMA_DSR_BCR_BCR_MASK) + return 0; + + // Read the timestamp + *time = ((uint64_t)~port->time[0]) << 32 + | ((uint64_t)~port->time[1]) << 0; + + // Debug output.. + //printf(" - sar:%08lx dar:%08lx pcr:%08lx dsr:%08lx time:%08lx:%08lx", + // port->dma->sar, port->dma->dar, + // port->pin->pcr, port->dma->dsr, + // (uint32_t)(*time >> 32), (uint32_t)*time); + + return 1; +} diff --git a/hw2/timer_dma.h b/hw2/timer_dma.h new file mode 100644 index 0000000..cf672d0 --- /dev/null +++ b/hw2/timer_dma.h @@ -0,0 +1,40 @@ +#ifndef TIMER_DMA_H +#define TIMER_DMA_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Sizes */ +#define TDMA_NUM_CHAN 4 + +/* DMA Channels */ +typedef enum { + TDMA_CHAN0, + TDMA_CHAN1, + TDMA_CHAN2, + TDMA_CHAN3, +} tdma_chan_t; + +/* Port */ +typedef struct tdma_t tdma_t; + +/* Open */ +void tdma_init(void); + +/* Open */ +tdma_t *tdma_open(tdma_chan_t chan, PinName pin, PinMode mode); + +/* Flush/Wait */ +void tdma_reset(tdma_t *port); +int tdma_stamp(tdma_t *port, uint64_t *time); + +#ifdef __cplusplus +} +#endif + +#endif