]> Pileus Git - ~andy/csm213a-hw/commitdiff
Move testing code out of main
authorAndy Spencer <andy753421@gmail.com>
Sun, 9 Mar 2014 06:57:59 +0000 (06:57 +0000)
committerAndy Spencer <andy753421@gmail.com>
Mon, 10 Mar 2014 01:02:02 +0000 (01:02 +0000)
hw2/main.cpp
hw2/makefile
hw2/test.cpp [new file with mode: 0644]

index 006f85269dfcf1e55788f1a2027c7b8e461f4018..4f42dd26110b517d368c74bc9754b04b519a07ae 100644 (file)
-#include "mbed.h"\r
-#include "serial_dma.h"\r
-#include "timer_dma.h"\r
-\r
-/**\r
- * Mode of operation:\r
- *   Devices 1 and 2 synchronize clocks using serial messages.\r
- *\r
- *   1. Each serial message timestamped using the hardware timer capture\r
- *      registers in both the sender and receiver.\r
- *   2. The sender transmits the send timestamp during the next time-sync\r
- *      message.\r
- *   3. The receiver then compares the senders timestamp with it's own\r
- *      timestamp for the corresponding messages and calculates an offset.\r
- *   4. The offset is used to compensate the receivers local clock.\r
- *\r
- *   Time synchronization is performed in both directions.\r
- *\r
- *\r
- * Only port A, C, and D can do aysnc DMA (p. 67)\r
- *\r
- * DMA Channel Allocation:\r
- *     Ch  Trigger    Description\r
- *     0   gpio       timestamp (async event)\r
- *     1   uart1      transmit\r
- *     2   uart2 tx   timestamp (time sync xmt)\r
- *     3   uart2 rx   timestamp (time sync rcv)\r
- *\r
- * Uart Sources:\r
- *      UART 0     UART 1     UART 2\r
- *     xmt  rcv   xmt  rcv   xmt  rcv\r
- *     ---  ---   ---  ---   ---  ---\r
- *     A2   A1  --A19  A18-- -    -\r
- *     A14  A15   -    -     -    -\r
- *     B17  B16   -    -     -    -\r
- *     -    -   **C4   C3--  -    -\r
- *     D7   D6    -    -   **D3/3 D2/3** <<<\r
- *     -    -     -    -   **D5/3 D4/3**\r
- *     E20  E21   E0   E1    E16  E17\r
- *     -    -     -    -     E22  E23\r
- *\r
- * Pinout\r
- *     A1    B18        E30  C1\r
- *     A2    B19        B20  C2\r
- *     D3    C0         E23  B3\r
- *     A12   C4         E22  B2\r
- *     A4    C6         E21  B1\r
- *     A5    C7         E20  B0\r
- *     C8    C10\r
- *     C9    C11        E2   P5-9V\r
- *                      E3   GND\r
- *     A13   C13        E6   GND\r
- *     D2    C16        E16  P5V-USB\r
- *     D4    A7         E17  P3V3\r
- *     D6    A6         E18  RST\r
- *     D7    A14        E19  P3V3\r
- *     D5    A15        E31  SDA/D5\r
- *     GND   A15\r
- *     VREFH A17\r
- *     E0    B9\r
- *     E1    --\r
- */\r
-\r
-/* Trigger select options */\r
-\r
-#define TMP_CONF_TRGSEL_EXTRG 0x0 // 0b0000 External trigger pin input (EXTRG_IN)\r
-#define TMP_CONF_TRGSEL_CMP0  0x1 // 0b0001 CMP0 output\r
-#define TMP_CONF_TRGSEL_PIT0  0x4 // 0b0100 PIT trigger 0\r
-#define TMP_CONF_TRGSEL_PIT1  0x5 // 0b0101 PIT trigger 1\r
-#define TMP_CONF_TRGSEL_TPM0  0x8 // 0b1000 TPM0 overflow\r
-#define TMP_CONF_TRGSEL_TPM1  0x9 // 0b1001 TPM1 overflow\r
-#define TMP_CONF_TRGSEL_TPM2  0xA // 0b1010 TPM2 overflow\r
-#define TMP_CONF_TRGSEL_RTCA  0xC // 0b1100 RTC alarm\r
-#define TMP_CONF_TRGSEL_RTCS  0xD // 0b1101 RTC seconds\r
-#define TMP_CONF_TRGSEL_LPTMR 0xE // 0b1110 LPTMR trigger\r
-\r
-/***********************\r
- * Message Definitions *\r
- ***********************/\r
-\r
-#define MSG_HEADER 0x1234\r
-\r
-typedef enum {\r
-       MSG_ID_SYNC,       // Time synchronization\r
-       MSG_ID_EVENT,      // Event occurred\r
-} msgid_t;\r
-\r
-typedef struct {\r
-       uint32_t seconds;  // Seconds since 1970 (without leap seconds)\r
-       uint32_t nanosec;  // Nanoseconds since 'seconds'\r
-} ntime_t;\r
-\r
-typedef struct {\r
-       uint16_t header;   // Message Header\r
-       uint16_t mesgid;   // Message ID\r
-       uint16_t length;   // Body length\r
-       uint16_t cksum;    // Body checksum\r
-} header_t;\r
-\r
-typedef struct {\r
-       uint16_t seq;      // Current sequence counter\r
-       uint16_t prev;     // Sequence of previous message\r
-       ntime_t  time;     // Time of previous message\r
-} sync_msg_t;\r
-\r
-typedef struct {\r
-       uint16_t device;   // Device ID\r
-       uint16_t event;    // Event ID\r
-       ntime_t  time;     // Timestamp\r
-} event_msg_t;\r
-\r
-/*******************\r
- * Timer functions *\r
- *******************/\r
-\r
-/**\r
- * Generate time stamp for an async event:\r
- *   time:  drift compensated wall-clock time\r
- *   stamp: event timestamp from Timer/PWM Module\r
- */\r
-void time_stamp(ntime_t *time, uint32_t stamp)\r
-{\r
-       // todo\r
-}\r
-\r
-/**\r
- * Compensate the Real-Time-Clock oscillator for\r
- * temperature and drift errors. Called at 1Hz and\r
- * synchronous to the RTC 1Hz output.\r
- */\r
-void time_rtc_comp(void)\r
-{\r
-       // todo\r
-}\r
-\r
-/**\r
- * Synchronize the timer internal state with updates\r
- * from an external time sync message.\r
- *   ours: our internal timestamp for the event\r
- *   ref:  reference timestamp from the other device\r
- */\r
-void time_ext_sync(ntime_t *ours, ntime_t *ref)\r
-{\r
-       // todo\r
-}\r
-\r
-/************************\r
- * Serial I/O functions *\r
- ************************/\r
-\r
-/**\r
- * Output time sync message\r
- */\r
-void serial_send_sync(void)\r
-{\r
-}\r
-\r
-/**\r
- * Output external event received message\r
- *   event: id of the received event\r
- *   time:  compensated timestamp of the event\r
- */\r
-void serial_send_event(uint16_t event, ntime_t *time)\r
-{\r
-}\r
-\r
-/**\r
- * Process serial receive messages\r
- */\r
-void serial_receive(void)\r
-{\r
-}\r
-\r
-/***********************\r
- * Timestamp functions *\r
- ***********************/\r
-\r
-//void stamp() {\r
-//}\r
-\r
-/********************\r
- * Data definitions *\r
- ********************/\r
-\r
-// LEDs\r
-DigitalOut led1(LED1);\r
-DigitalOut led2(LED2);\r
-\r
-// UARTs         tx      rx\r
-Serial     uart0(USBTX,  USBRX);\r
-Serial     uart1(PTE0,   PTE1);\r
-Serial     uart2(PTD3,   PTD2);\r
-\r
-// Serial DMA\r
-sdma_t    *sdma0;\r
-sdma_t    *sdma1;\r
-sdma_t    *sdma2;\r
-\r
-// Timer DMA\r
-tdma_t    *tdma0;\r
-tdma_t    *tdma1;\r
-tdma_t    *tdma2;\r
-tdma_t    *tdma3;\r
-\r
-/********\r
- * Main *\r
- ********/\r
-\r
-void test_tpm_init(void)\r
-{\r
-       // EXTRG_IN - PTB8 - alt 3\r
-       //            PTC0 - alt 3\r
-       //            PTC6 - alt 3\r
-\r
-       // Setup System Integration Module\r
-       SIM_Type *sim = SIM;\r
-\r
-       sim->SCGC5 |= SIM_SCGC5_PORTA_MASK\r
-                  |  SIM_SCGC5_PORTB_MASK\r
-                  |  SIM_SCGC5_PORTC_MASK\r
-                  |  SIM_SCGC5_PORTD_MASK\r
-                  |  SIM_SCGC5_PORTE_MASK\r
-                  |  SIM_SCGC5_LPTMR_MASK;\r
-\r
-       sim->SCGC6 |= SIM_SCGC6_TPM0_MASK\r
-                  |  SIM_SCGC6_TPM1_MASK\r
-                  |  SIM_SCGC6_TPM2_MASK\r
-                  |  SIM_SCGC6_DAC0_MASK\r
-                  |  SIM_SCGC6_ADC0_MASK\r
-                  |  SIM_SCGC6_PIT_MASK\r
-                  |  SIM_SCGC6_DMAMUX_MASK\r
-                  |  SIM_SCGC6_RTC_MASK;\r
-\r
-       sim->SOPT2 |= SIM_SOPT2_TPMSRC(1);\r
-\r
-       sim->SOPT4  = SIM_SOPT4_TPM1CLKSEL_MASK\r
-                  |  SIM_SOPT4_TPM1CH0SRC(3);\r
-\r
-       printf("SOPT2:%08lx SCGC5:%08lx SCGC6:%08lx\r\n",\r
-                       sim->SOPT2, sim->SCGC5, sim->SCGC6);\r
-       //SOPT2:05010000 SCGC5:00003f83 SCGC6:07800001\r
-\r
-       //sim->SOPT7 |= SIM_SOPT7_ADC0TRGSEL(TMP_CONF_TRGSEL_EXTRG);\r
-\r
-       // Setup Port Control\r
-       PORT_Type *port = PORTC;\r
-\r
-       PORTE->PCR[25] = PORT_PCR_ISF_MASK\r
-                      | PORT_PCR_IRQC(0x1)\r
-                      | PORT_PCR_MUX(3) ;\r
-\r
-       port->PCR[0]   = PORT_PCR_ISF_MASK\r
-                      | PORT_PCR_IRQC(0x1)\r
-                      | PORT_PCR_MUX(3)\r
-                      | PORT_PCR_PE_MASK;\r
-\r
-       // Setup Timer/PWM Module\r
-       volatile TPM_Type *tpm = TPM1;\r
-\r
-       tpm->SC               = TPM_SC_PS(0x7)\r
-                             | TPM_SC_TOF_MASK;\r
-\r
-       tpm->CNT              = TPM_CNT_COUNT(0);\r
-\r
-       tpm->MOD              = TPM_CNT_COUNT(0xFFFF);\r
-\r
-       tpm->CONTROLS[1].CnV  = 0x1234;\r
-       tpm->CONTROLS[1].CnSC = TPM_CnSC_CHF_MASK\r
-                             | TPM_CnSC_CHIE_MASK\r
-                             | TPM_CnSC_ELSA_MASK;\r
-\r
-       //tpm->CONTROLS[0].CnSC = TPM_CnSC_CHF_MASK\r
-       //                    | TPM_CnSC_CHIE_MASK\r
-       //                    | TPM_CnSC_MSB_MASK\r
-       //                    | TPM_CnSC_MSA_MASK\r
-       //                    | TPM_CnSC_ELSB_MASK\r
-       //                    | TPM_CnSC_ELSA_MASK;\r
-\r
-       tpm->STATUS           = TPM_STATUS_CH0F_MASK\r
-                              | TPM_STATUS_CH1F_MASK\r
-                              | TPM_STATUS_CH2F_MASK\r
-                              | TPM_STATUS_CH3F_MASK\r
-                              | TPM_STATUS_CH4F_MASK\r
-                              | TPM_STATUS_CH5F_MASK\r
-                              | TPM_STATUS_TOF_MASK;\r
-\r
-       tpm->CONF             = TPM_CONF_TRGSEL(TMP_CONF_TRGSEL_EXTRG)\r
-                             | TPM_CONF_CSOO_MASK\r
-                             | TPM_CONF_CSOT_MASK\r
-                             | TPM_CONF_GTBEEN_MASK\r
-                             | TPM_CONF_DBGMODE_MASK;\r
-\r
-       tpm->SC               = TPM_SC_CMOD(1)\r
-                             | TPM_SC_PS(0x7)\r
-                             | TPM_SC_TOF_MASK;\r
-\r
-       printf("test - %02lx %08lx\r\n", tpm->CONTROLS[1].CnSC, tpm->CONTROLS[1].CnV); wait(0.1);\r
-}\r
-\r
-void test_tpm_run(void)\r
-{\r
-       //static DigitalIn pin(PTC0);\r
-       //static DigitalIn pin(PTC2);\r
-       //static int pin = 0;\r
-\r
-       printf("PTC0:%08lx GPCR:%08lx:%08lx - SC:%04lx CNT:%04lx MOD:%04lx STATUS:%04lx CONF:%08lx - CnSC:%02lx CnV:%04lx\r\n",\r
-                       PORTC->PCR[0], PORTC->GPCHR, PORTC->GPCLR,\r
-                       TPM1->SC, TPM1->CNT, TPM1->MOD, TPM1->STATUS, TPM1->CONF,\r
-                       TPM1->CONTROLS[1].CnSC, TPM1->CONTROLS[1].CnV);\r
-       TPM1->SC     |= TPM_STATUS_TOF_MASK;\r
-       TPM1->STATUS |= TPM_STATUS_TOF_MASK;\r
-}\r
-\r
-void test_pit_init(void)\r
-{\r
-       //printf("test_pit_init\r\n");\r
-\r
-       // Enable\r
-       SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;\r
-       PIT->MCR    = 0;\r
-\r
-       // Channel 0\r
-       PIT->CHANNEL[0].LDVAL = 0xFFFFFFFF;\r
-       PIT->CHANNEL[0].TCTRL = 0;\r
-\r
-       // Channel 1\r
-       PIT->CHANNEL[1].LDVAL = 0xFFFFFFFF;\r
-       PIT->CHANNEL[1].TCTRL = PIT_TCTRL_CHN_MASK;\r
-\r
-       // Start timers\r
-       PIT->CHANNEL[0].TCTRL |= PIT_TCTRL_TEN_MASK;\r
-       PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK;\r
-\r
-}\r
-\r
-void test_pit_run(void)\r
-{\r
-       register volatile uint32_t *tmh asm("r4") = &PIT->LTMR64H;\r
-       register volatile uint32_t *tml asm("r5") = &PIT->LTMR64L;\r
-\r
-       register uint32_t hi0 asm("r0"), lo0 asm("r1");\r
-       register uint32_t hi1 asm("r2"), lo1 asm("r3");\r
-\r
-       asm("ldr %0, [%4]\n\t" // Two clocks per load\r
-           "ldr %1, [%5]\n\t"\r
-           "ldr %2, [%4]\n\t"\r
-           "ldr %3, [%5]\n\t"\r
-           : "=r"(hi0), "=r"(lo0), "=r"(hi1), "=r"(lo1)\r
-           :  "r"(tmh),  "r"(tml));\r
-\r
-       uint64_t tm0 = ~((uint64_t)hi0 << 32 | lo0);\r
-       uint64_t tm1 = ~((uint64_t)hi1 << 32 | lo1);\r
-       double   bus = 24E6;   // 24 MHz bus clock\r
-\r
-       printf(" - pit");\r
-       printf("  %08lx:%08lx", (uint32_t)(tm0>>32), (uint32_t)tm0);\r
-       printf("  %08lx:%08lx", (uint32_t)(tm1>>32), (uint32_t)tm1);\r
-       printf("  %08lx",       (uint32_t)(tm1-tm0));\r
-       printf("  %f",          (double)tm0 / bus);\r
-}\r
-\r
-void test_sdma_init(void)\r
-{\r
-       sdma0 = sdma_open(SDMA_UART0, SDMA_CHANNEL0, SDMA_CHANNEL1);\r
-       sdma1 = sdma_open(SDMA_UART1, SDMA_CHANNEL0, SDMA_CHANNEL1);\r
-       sdma2 = sdma_open(SDMA_UART2, SDMA_CHANNEL2, SDMA_CHANNEL3);\r
-\r
-       sdma_pinmap(sdma1, PTE0, PTE1);\r
-       sdma_pinmap(sdma2, PTD3, PTD2);\r
-}\r
-\r
-void test_sdma_run(void)\r
-{\r
-       char xmt[32] = "hello, world";\r
-       char rcv[32] = {};\r
-\r
-       uint64_t tm1, tm2;\r
-\r
-       sdma_write(sdma1, xmt, strlen(xmt));\r
-       sdma_flush(sdma1, &tm1);\r
-\r
-       sdma_read(sdma2, rcv, strlen(xmt));\r
-       sdma_wait(sdma2, &tm2);\r
-\r
-       printf("send: [%s] -> [%s] ", xmt, rcv);\r
-       printf("time: %08lx / %08lx ", (uint32_t)tm1, (uint32_t)tm2);\r
-       printf("tag: dir:%08lx in:%08lx\r\n",\r
-                       FPTD->PDDR, FPTD->PDIR);\r
-\r
-       (void)xmt; (void)rcv;\r
-       (void)tm1; (void)tm2;\r
-}\r
-\r
-void test_tdma_init(void)\r
-{\r
-       tdma_init();\r
-\r
-       tdma0 = tdma_open(TDMA_CHAN0, PTA1, PullNone);\r
-       tdma1 = tdma_open(TDMA_CHAN1, PTC1, PullNone);\r
-       tdma2 = tdma_open(TDMA_CHAN2, PTD3, PullUp);\r
-       tdma3 = tdma_open(TDMA_CHAN3, PTD2, PullUp);\r
-}\r
-\r
-void test_tdma_run(void)\r
-{\r
-       static uint32_t time0[2];\r
-       static uint32_t time1[2];\r
-       static uint32_t time2[2];\r
-       static uint32_t time3[2];\r
-\r
-       tdma_stamp(tdma0, (uint64_t*)&time0);\r
-       tdma_stamp(tdma1, (uint64_t*)&time1);\r
-       tdma_stamp(tdma2, (uint64_t*)&time2);\r
-       tdma_stamp(tdma3, (uint64_t*)&time3);\r
-\r
-       tdma_reset(tdma0);\r
-       tdma_reset(tdma1);\r
-       tdma_reset(tdma2);\r
-       tdma_reset(tdma3);\r
-\r
-       printf(" - timer:");\r
-       printf(" %08lx:%08lx", time0[1], time0[0]);\r
-       printf(" %08lx:%08lx", time1[1], time1[0]);\r
-       printf(" %08lx:%08lx", time2[1], time2[0]);\r
-       printf(" %08lx:%08lx", time3[1], time3[0]);\r
-       //printf(" do:%08lx", FPTD->PDOR);\r
-       //printf(" di:%08lx", FPTD->PDIR);\r
-       //printf(" dd:%08lx", FPTD->PDDR);\r
-}\r
-\r
-void test_leds(void)\r
-{\r
-       led1 = 1; led2 = 0; wait(0.1);\r
-       led1 = 0; led2 = 1; wait(0.1);\r
-}\r
-\r
-int main(int argc, char **argv)\r
-{\r
-       uart0.baud(115200);\r
-       uart1.baud(115200);\r
-       uart2.baud(115200);\r
-\r
-       printf("init\r\n");\r
-       //test_tpm_init();\r
-       //test_pit_init();\r
-       //test_sdma_init();\r
-       test_tdma_init();\r
-\r
-       printf("run\r\n");\r
-       for (int i = 0; true; i++) {\r
-               printf("%8d", i);\r
-               //test_leds();\r
-               //test_tpm_run();\r
-               //test_pit_run();\r
-               //test_sdma_run();\r
-               test_tdma_run();\r
-               printf("\r\n");\r
-       }\r
-}\r
+#include "mbed.h"
+#include "serial_dma.h"
+#include "timer_dma.h"
+
+/**
+ * Mode of operation:
+ *   Devices 1 and 2 synchronize clocks using serial messages.
+ *
+ *   1. Each serial message timestamped using the hardware timer capture
+ *      registers in both the sender and receiver.
+ *   2. The sender transmits the send timestamp during the next time-sync
+ *      message.
+ *   3. The receiver then compares the senders timestamp with it's own
+ *      timestamp for the corresponding messages and calculates an offset.
+ *   4. The offset is used to compensate the receivers local clock.
+ *
+ *   Time synchronization is performed in both directions.
+ */
+
+/***********************
+ * Message Definitions *
+ ***********************/
+
+#define MSG_HEADER 0x1234
+
+typedef enum {
+       MSG_ID_SYNC,       // Time synchronization
+       MSG_ID_EVENT,      // Event occurred
+} msgid_t;
+
+typedef struct {
+       uint32_t seconds;  // Seconds since 1970 (without leap seconds)
+       uint32_t nanosec;  // Nanoseconds since 'seconds'
+} ntime_t;
+
+typedef struct {
+       uint16_t header;   // Message Header
+       uint16_t mesgid;   // Message ID
+       uint16_t length;   // Body length
+       uint16_t cksum;    // Body checksum
+} header_t;
+
+typedef struct {
+       uint16_t seq;      // Current sequence counter
+       uint16_t prev;     // Sequence of previous message
+       ntime_t  time;     // Time of previous message
+} sync_msg_t;
+
+typedef struct {
+       uint16_t device;   // Device ID
+       uint16_t event;    // Event ID
+       ntime_t  time;     // Timestamp
+} event_msg_t;
+
+/*******************
+ * Timer functions *
+ *******************/
+
+/**
+ * Generate time stamp for an async event:
+ *   time:  drift compensated wall-clock time
+ *   stamp: event timestamp from Timer/PWM Module
+ */
+void time_stamp(ntime_t *time, uint32_t stamp)
+{
+       // todo
+}
+
+/**
+ * Compensate the Real-Time-Clock oscillator for
+ * temperature and drift errors. Called at 1Hz and
+ * synchronous to the RTC 1Hz output.
+ */
+void time_rtc_comp(void)
+{
+       // todo
+}
+
+/**
+ * Synchronize the timer internal state with updates
+ * from an external time sync message.
+ *   ours: our internal timestamp for the event
+ *   ref:  reference timestamp from the other device
+ */
+void time_ext_sync(ntime_t *ours, ntime_t *ref)
+{
+       // todo
+}
+
+/************************
+ * Serial I/O functions *
+ ************************/
+
+/**
+ * Output time sync message
+ */
+void serial_send_sync(void)
+{
+}
+
+/**
+ * Output external event received message
+ *   event: id of the received event
+ *   time:  compensated timestamp of the event
+ */
+void serial_send_event(uint16_t event, ntime_t *time)
+{
+}
+
+/**
+ * Process serial receive messages
+ */
+void serial_receive(void)
+{
+}
+
+/********************
+ * Data definitions *
+ ********************/
+
+// LEDs
+DigitalOut led1(LED1);
+DigitalOut led2(LED2);
+
+// UARTs         tx      rx
+Serial     uart0(USBTX,  USBRX);
+Serial     uart1(PTE0,   PTE1);
+Serial     uart2(PTD3,   PTD2);
+
+// Serial DMA
+sdma_t    *sdma0;
+sdma_t    *sdma1;
+sdma_t    *sdma2;
+
+// Timer DMA
+tdma_t    *tdma0;
+tdma_t    *tdma1;
+tdma_t    *tdma2;
+tdma_t    *tdma3;
+
+/********
+ * Main *
+ ********/
+
+void test_main(void);
+
+int main(int argc, char **argv)
+{
+       uart0.baud(115200);
+       uart1.baud(115200);
+       uart2.baud(115200);
+
+       test_main();
+
+       return 0;
+}
index d27995c52cfbc902908b5ad019ee0f898421ae97..0f9b65d4c80e4f2bac64d3747e6f18b2a882aca7 100644 (file)
@@ -1,5 +1,5 @@
 PROG = mbed
-OBJS = main.o serial_dma.o timer_dma.o
+OBJS = main.o test.o serial_dma.o timer_dma.o
 
 CPPFLAGS =
 LDFLAGS  = -lm
diff --git a/hw2/test.cpp b/hw2/test.cpp
new file mode 100644 (file)
index 0000000..3cfb701
--- /dev/null
@@ -0,0 +1,338 @@
+#include "mbed.h"\r
+#include "serial_dma.h"\r
+#include "timer_dma.h"\r
+\r
+/**\r
+ *\r
+ * Only port A, C, and D can do aysnc DMA (p. 67)\r
+ *\r
+ * DMA Channel Allocation:\r
+ *     Ch  Trigger    Description\r
+ *     0   gpio       timestamp (async event)\r
+ *     1   uart1      transmit\r
+ *     2   uart2 tx   timestamp (time sync xmt)\r
+ *     3   uart2 rx   timestamp (time sync rcv)\r
+ *\r
+ * Uart Sources:\r
+ *      UART 0     UART 1     UART 2\r
+ *     xmt  rcv   xmt  rcv   xmt  rcv\r
+ *     ---  ---   ---  ---   ---  ---\r
+ *     A2   A1  --A19  A18-- -    -\r
+ *     A14  A15   -    -     -    -\r
+ *     B17  B16   -    -     -    -\r
+ *     -    -   **C4   C3--  -    -\r
+ *     D7   D6    -    -   **D3/3 D2/3** <<<\r
+ *     -    -     -    -   **D5/3 D4/3**\r
+ *     E20  E21   E0   E1    E16  E17\r
+ *     -    -     -    -     E22  E23\r
+ *\r
+ * Pinout\r
+ *     A1    B18        E30  C1\r
+ *     A2    B19        B20  C2\r
+ *     D3    C0         E23  B3\r
+ *     A12   C4         E22  B2\r
+ *     A4    C6         E21  B1\r
+ *     A5    C7         E20  B0\r
+ *     C8    C10\r
+ *     C9    C11        E2   P5-9V\r
+ *                      E3   GND\r
+ *     A13   C13        E6   GND\r
+ *     D2    C16        E16  P5V-USB\r
+ *     D4    A7         E17  P3V3\r
+ *     D6    A6         E18  RST\r
+ *     D7    A14        E19  P3V3\r
+ *     D5    A15        E31  SDA/D5\r
+ *     GND   A15\r
+ *     VREFH A17\r
+ *     E0    B9\r
+ *     E1    --\r
+ */\r
+\r
+/* Trigger select options */\r
+\r
+#define TMP_CONF_TRGSEL_EXTRG 0x0 // 0b0000 External trigger pin input (EXTRG_IN)\r
+#define TMP_CONF_TRGSEL_CMP0  0x1 // 0b0001 CMP0 output\r
+#define TMP_CONF_TRGSEL_PIT0  0x4 // 0b0100 PIT trigger 0\r
+#define TMP_CONF_TRGSEL_PIT1  0x5 // 0b0101 PIT trigger 1\r
+#define TMP_CONF_TRGSEL_TPM0  0x8 // 0b1000 TPM0 overflow\r
+#define TMP_CONF_TRGSEL_TPM1  0x9 // 0b1001 TPM1 overflow\r
+#define TMP_CONF_TRGSEL_TPM2  0xA // 0b1010 TPM2 overflow\r
+#define TMP_CONF_TRGSEL_RTCA  0xC // 0b1100 RTC alarm\r
+#define TMP_CONF_TRGSEL_RTCS  0xD // 0b1101 RTC seconds\r
+#define TMP_CONF_TRGSEL_LPTMR 0xE // 0b1110 LPTMR trigger\r
+\r
+/********************\r
+ * Data definitions *\r
+ ********************/\r
+\r
+// LEDs\r
+extern DigitalOut led1;\r
+extern DigitalOut led2;\r
+\r
+// UARTs\r
+extern Serial     uart0;\r
+extern Serial     uart1;\r
+extern Serial     uart2;\r
+\r
+// Serial DMA\r
+extern sdma_t    *sdma0;\r
+extern sdma_t    *sdma1;\r
+extern sdma_t    *sdma2;\r
+\r
+// Timer DMA\r
+extern tdma_t    *tdma0;\r
+extern tdma_t    *tdma1;\r
+extern tdma_t    *tdma2;\r
+extern tdma_t    *tdma3;\r
+\r
+/********\r
+ * Main *\r
+ ********/\r
+\r
+void test_tpm_init(void)\r
+{\r
+       // EXTRG_IN - PTB8 - alt 3\r
+       //            PTC0 - alt 3\r
+       //            PTC6 - alt 3\r
+\r
+       // Setup System Integration Module\r
+       SIM_Type *sim = SIM;\r
+\r
+       sim->SCGC5 |= SIM_SCGC5_PORTA_MASK\r
+                  |  SIM_SCGC5_PORTB_MASK\r
+                  |  SIM_SCGC5_PORTC_MASK\r
+                  |  SIM_SCGC5_PORTD_MASK\r
+                  |  SIM_SCGC5_PORTE_MASK\r
+                  |  SIM_SCGC5_LPTMR_MASK;\r
+\r
+       sim->SCGC6 |= SIM_SCGC6_TPM0_MASK\r
+                  |  SIM_SCGC6_TPM1_MASK\r
+                  |  SIM_SCGC6_TPM2_MASK\r
+                  |  SIM_SCGC6_DAC0_MASK\r
+                  |  SIM_SCGC6_ADC0_MASK\r
+                  |  SIM_SCGC6_PIT_MASK\r
+                  |  SIM_SCGC6_DMAMUX_MASK\r
+                  |  SIM_SCGC6_RTC_MASK;\r
+\r
+       sim->SOPT2 |= SIM_SOPT2_TPMSRC(1);\r
+\r
+       sim->SOPT4  = SIM_SOPT4_TPM1CLKSEL_MASK\r
+                  |  SIM_SOPT4_TPM1CH0SRC(3);\r
+\r
+       printf("SOPT2:%08lx SCGC5:%08lx SCGC6:%08lx\r\n",\r
+                       sim->SOPT2, sim->SCGC5, sim->SCGC6);\r
+       //SOPT2:05010000 SCGC5:00003f83 SCGC6:07800001\r
+\r
+       //sim->SOPT7 |= SIM_SOPT7_ADC0TRGSEL(TMP_CONF_TRGSEL_EXTRG);\r
+\r
+       // Setup Port Control\r
+       PORT_Type *port = PORTC;\r
+\r
+       PORTE->PCR[25] = PORT_PCR_ISF_MASK\r
+                      | PORT_PCR_IRQC(0x1)\r
+                      | PORT_PCR_MUX(3) ;\r
+\r
+       port->PCR[0]   = PORT_PCR_ISF_MASK\r
+                      | PORT_PCR_IRQC(0x1)\r
+                      | PORT_PCR_MUX(3)\r
+                      | PORT_PCR_PE_MASK;\r
+\r
+       // Setup Timer/PWM Module\r
+       volatile TPM_Type *tpm = TPM1;\r
+\r
+       tpm->SC               = TPM_SC_PS(0x7)\r
+                             | TPM_SC_TOF_MASK;\r
+\r
+       tpm->CNT              = TPM_CNT_COUNT(0);\r
+\r
+       tpm->MOD              = TPM_CNT_COUNT(0xFFFF);\r
+\r
+       tpm->CONTROLS[1].CnV  = 0x1234;\r
+       tpm->CONTROLS[1].CnSC = TPM_CnSC_CHF_MASK\r
+                             | TPM_CnSC_CHIE_MASK\r
+                             | TPM_CnSC_ELSA_MASK;\r
+\r
+       //tpm->CONTROLS[0].CnSC = TPM_CnSC_CHF_MASK\r
+       //                    | TPM_CnSC_CHIE_MASK\r
+       //                    | TPM_CnSC_MSB_MASK\r
+       //                    | TPM_CnSC_MSA_MASK\r
+       //                    | TPM_CnSC_ELSB_MASK\r
+       //                    | TPM_CnSC_ELSA_MASK;\r
+\r
+       tpm->STATUS           = TPM_STATUS_CH0F_MASK\r
+                              | TPM_STATUS_CH1F_MASK\r
+                              | TPM_STATUS_CH2F_MASK\r
+                              | TPM_STATUS_CH3F_MASK\r
+                              | TPM_STATUS_CH4F_MASK\r
+                              | TPM_STATUS_CH5F_MASK\r
+                              | TPM_STATUS_TOF_MASK;\r
+\r
+       tpm->CONF             = TPM_CONF_TRGSEL(TMP_CONF_TRGSEL_EXTRG)\r
+                             | TPM_CONF_CSOO_MASK\r
+                             | TPM_CONF_CSOT_MASK\r
+                             | TPM_CONF_GTBEEN_MASK\r
+                             | TPM_CONF_DBGMODE_MASK;\r
+\r
+       tpm->SC               = TPM_SC_CMOD(1)\r
+                             | TPM_SC_PS(0x7)\r
+                             | TPM_SC_TOF_MASK;\r
+\r
+       printf("test - %02lx %08lx\r\n", tpm->CONTROLS[1].CnSC, tpm->CONTROLS[1].CnV); wait(0.1);\r
+}\r
+\r
+void test_tpm_run(void)\r
+{\r
+       //static DigitalIn pin(PTC0);\r
+       //static DigitalIn pin(PTC2);\r
+       //static int pin = 0;\r
+\r
+       printf("PTC0:%08lx GPCR:%08lx:%08lx - SC:%04lx CNT:%04lx MOD:%04lx STATUS:%04lx CONF:%08lx - CnSC:%02lx CnV:%04lx\r\n",\r
+                       PORTC->PCR[0], PORTC->GPCHR, PORTC->GPCLR,\r
+                       TPM1->SC, TPM1->CNT, TPM1->MOD, TPM1->STATUS, TPM1->CONF,\r
+                       TPM1->CONTROLS[1].CnSC, TPM1->CONTROLS[1].CnV);\r
+       TPM1->SC     |= TPM_STATUS_TOF_MASK;\r
+       TPM1->STATUS |= TPM_STATUS_TOF_MASK;\r
+}\r
+\r
+void test_pit_init(void)\r
+{\r
+       //printf("test_pit_init\r\n");\r
+\r
+       // Enable\r
+       SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;\r
+       PIT->MCR    = 0;\r
+\r
+       // Channel 0\r
+       PIT->CHANNEL[0].LDVAL = 0xFFFFFFFF;\r
+       PIT->CHANNEL[0].TCTRL = 0;\r
+\r
+       // Channel 1\r
+       PIT->CHANNEL[1].LDVAL = 0xFFFFFFFF;\r
+       PIT->CHANNEL[1].TCTRL = PIT_TCTRL_CHN_MASK;\r
+\r
+       // Start timers\r
+       PIT->CHANNEL[0].TCTRL |= PIT_TCTRL_TEN_MASK;\r
+       PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK;\r
+\r
+}\r
+\r
+void test_pit_run(void)\r
+{\r
+       register volatile uint32_t *tmh asm("r4") = &PIT->LTMR64H;\r
+       register volatile uint32_t *tml asm("r5") = &PIT->LTMR64L;\r
+\r
+       register uint32_t hi0 asm("r0"), lo0 asm("r1");\r
+       register uint32_t hi1 asm("r2"), lo1 asm("r3");\r
+\r
+       asm("ldr %0, [%4]\n\t" // Two clocks per load\r
+           "ldr %1, [%5]\n\t"\r
+           "ldr %2, [%4]\n\t"\r
+           "ldr %3, [%5]\n\t"\r
+           : "=r"(hi0), "=r"(lo0), "=r"(hi1), "=r"(lo1)\r
+           :  "r"(tmh),  "r"(tml));\r
+\r
+       uint64_t tm0 = ~((uint64_t)hi0 << 32 | lo0);\r
+       uint64_t tm1 = ~((uint64_t)hi1 << 32 | lo1);\r
+       double   bus = 24E6;   // 24 MHz bus clock\r
+\r
+       printf(" - pit");\r
+       printf("  %08lx:%08lx", (uint32_t)(tm0>>32), (uint32_t)tm0);\r
+       printf("  %08lx:%08lx", (uint32_t)(tm1>>32), (uint32_t)tm1);\r
+       printf("  %08lx",       (uint32_t)(tm1-tm0));\r
+       printf("  %f",          (double)tm0 / bus);\r
+}\r
+\r
+void test_sdma_init(void)\r
+{\r
+       sdma0 = sdma_open(SDMA_UART0, SDMA_CHANNEL0, SDMA_CHANNEL1);\r
+       sdma1 = sdma_open(SDMA_UART1, SDMA_CHANNEL0, SDMA_CHANNEL1);\r
+       sdma2 = sdma_open(SDMA_UART2, SDMA_CHANNEL2, SDMA_CHANNEL3);\r
+\r
+       sdma_pinmap(sdma1, PTE0, PTE1);\r
+       sdma_pinmap(sdma2, PTD3, PTD2);\r
+}\r
+\r
+void test_sdma_run(void)\r
+{\r
+       char xmt[32] = "hello, world";\r
+       char rcv[32] = {};\r
+\r
+       uint64_t tm1, tm2;\r
+\r
+       sdma_write(sdma1, xmt, strlen(xmt));\r
+       sdma_flush(sdma1, &tm1);\r
+\r
+       sdma_read(sdma2, rcv, strlen(xmt));\r
+       sdma_wait(sdma2, &tm2);\r
+\r
+       printf("send: [%s] -> [%s] ", xmt, rcv);\r
+       printf("time: %08lx / %08lx ", (uint32_t)tm1, (uint32_t)tm2);\r
+       printf("tag: dir:%08lx in:%08lx\r\n",\r
+                       FPTD->PDDR, FPTD->PDIR);\r
+\r
+       (void)xmt; (void)rcv;\r
+       (void)tm1; (void)tm2;\r
+}\r
+\r
+void test_tdma_init(void)\r
+{\r
+       tdma_init();\r
+\r
+       tdma0 = tdma_open(TDMA_CHAN0, 3, PTA1, PullNone);\r
+       tdma1 = tdma_open(TDMA_CHAN1, 3, PTC1, PullNone);\r
+       tdma2 = tdma_open(TDMA_CHAN2, 3, PTD3, PullUp);\r
+       tdma3 = tdma_open(TDMA_CHAN3, 3, PTD2, PullUp);\r
+}\r
+\r
+void test_tdma_run(void)\r
+{\r
+       static uint32_t time0[2];\r
+       static uint32_t time1[2];\r
+       static uint32_t time2[2];\r
+       static uint32_t time3[2];\r
+\r
+       tdma_stamp(tdma0, (uint64_t*)&time0);\r
+       tdma_stamp(tdma1, (uint64_t*)&time1);\r
+       tdma_stamp(tdma2, (uint64_t*)&time2);\r
+       tdma_stamp(tdma3, (uint64_t*)&time3);\r
+\r
+       tdma_reset(tdma0);\r
+       tdma_reset(tdma1);\r
+       tdma_reset(tdma2);\r
+       tdma_reset(tdma3);\r
+\r
+       printf(" - timer:");\r
+       printf(" %08lx:%08lx", time0[1], time0[0]);\r
+       printf(" %08lx:%08lx", time1[1], time1[0]);\r
+       printf(" %08lx:%08lx", time2[1], time2[0]);\r
+       printf(" %08lx:%08lx", time3[1], time3[0]);\r
+       //printf(" do:%08lx", FPTD->PDOR);\r
+       //printf(" di:%08lx", FPTD->PDIR);\r
+       //printf(" dd:%08lx", FPTD->PDDR);\r
+}\r
+\r
+void test_leds(void)\r
+{\r
+       led1 = 1; led2 = 0; wait(0.1);\r
+       led1 = 0; led2 = 1; wait(0.1);\r
+}\r
+\r
+void test_main(void)\r
+{\r
+       printf("init\r\n");\r
+       //test_tpm_init();\r
+       //test_pit_init();\r
+       //test_sdma_init();\r
+       //test_tdma_init();\r
+\r
+       printf("run\r\n");\r
+       for (int i = 0; true; i++) {\r
+               printf("%8d", i);\r
+               test_leds();\r
+               //test_tpm_run();\r
+               //test_pit_run();\r
+               //test_sdma_run();\r
+               //test_tdma_run();\r
+               printf("\r\n");\r
+       }\r
+}\r