Olof Johansson [Thu, 18 Apr 2013 16:19:26 +0000 (09:19 -0700)]
Merge tag 'imx-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
From Shawn Guo:
The imx device tree changes for 3.10:
* The huge diff stat is introduced by the pinctrl changes. With DTC
macro support ready, we're moving those huge mount of data about pins
out of pinctrl driver.
* Device tree source updates for GPI, LDB, SRC, cpufreq-cpu0.
* Initial imx6dl device tree support
* Board level DTS changes for some imx27 and imx51 platforms.
* tag 'imx-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (605 commits)
ARM: dts: imx6dl-wandboard: Add USB Host support
ARM: dts: imx51 cpu node
ARM: dts: Add missing imx27-phytec-phycore dtb target
ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
ARM: i.MX51: Add PATA support
ARM: dts: Add initial support for Wandboard Dual-Lite
ARM: dts: imx: add initial imx6dl-sabreauto support
ARM: dts: imx: add initial imx6dl-sabresd support
ARM: dts: imx: make sabreauto and sabresd common
pinctrl: add pinctrl driver for imx6sl
pinctrl: add pinctrl driver for imx6dl
ARM: dts: imx53: fix SD2_DATA1 pad AUDMUX_AUD4 configuration
ARM: dts: MicroSys sbc6x support (i.MX6)
ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree
ARM i.MX6q: Link system reset controller (SRC) to IPU in DT
ARM i.MX6q: Add LDB device to device tree
ARM: imx5 DT init cpufreq-cpu0 device
ARM: imx27 DT init cpufreq-cpu0 device
ARM i.MX53: Add LDB device to device tree
...
Olof Johansson [Thu, 18 Apr 2013 06:24:18 +0000 (23:24 -0700)]
Merge tag 'dt-3.10-3' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper:
mvebu dt for v3.10 round 3
- mvebu PCIe DT support
from round 2 (no pr was sent):
- 64bit dts skeleton
- mvebu devicebus additions
- mvebu thermal nodes
- mirabox gpio leds
- orion5x xor and ehci
- use mvsdio on guruplug dt
* tag 'dt-3.10-3' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: PCIe Device Tree informations for Armada XP GP
arm: mvebu: PCIe Device Tree informations for Armada 370 DB
arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
arm: mvebu: PCIe Device Tree informations for Armada XP DB
arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
arm: mvebu: add PCIe Device Tree informations for Armada XP
arm: mvebu: add PCIe Device Tree informations for Armada 370
ARM: dts: Add a 64 bits version of the skeleton device tree
ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig
ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
ARM: configs: Update mvebu defconfig for thermal
ARM: mvebu: Add thermal support to Armada 370 device tree
ARM: mvebu: Add thermal support to Armada XP device tree
arm: mvebu: Add GPIO LEDs to Mirabox board
arm: orion5x: enable xor for orion5x platform
arm: orion5x: add ehci bindings to dtsi
ARM: kirkwood: make use of DT mvsdio on guruplug board
ARM: mvebu: Add button on Armada 370 Reference Design board
arm: mvebu: PCIe Device Tree informations for Armada 370 DB
The Marvell evaluation board (DB) for the Armada 370 SoC has 2
physical full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
The Globalscale Mirabox platform uses one PCIe interface for an
available mini-PCIe slot, and the other PCIe interface for an internal
USB 3.0 controller. We add the necessary Device Tree informations to
enable those two interfaces.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arm: mvebu: PCIe Device Tree informations for Armada XP DB
The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
The PlatHome OpenBlocks AX3-4 has an internal mini-PCIe slot that can
be used to plug mini-PCIe devices. We therefore enable the PCIe
interface that corresponds to this slot.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arm: mvebu: add PCIe Device Tree informations for Armada XP
The Armada XP SoCs have multiple PCIe interfaces. The MV78230 has 2
PCIe units (one 4x or quad 1x, the other 1x only), the MV78260 has 3
PCIe units (two 4x or quad 1x and one 4x/1x), the MV78460 has 4 PCIe
units (two 4x or quad 1x and two 4x/1x). We therefore add the
necessary Device Tree informations to make those PCIe interfaces
usable.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
The Plat'home Openblocks AX3 has a 128 MiB NOR flash device connected
to the Device Bus. This commit adds the device tree node to support this device.
The SoC supports a flexible and dynamic decoding window allocation scheme;
but since this feature is still not implemented we need to specify the window
base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
The Armada XP Development Board DB-MV784MP-GP has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
Armada 370 and Armada XP SoC have a Device Bus controller to
handle NOR, NAND, SRAM and FPGA devices.
This patch adds the device tree node to enable the controller.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Olof Johansson [Thu, 11 Apr 2013 10:48:25 +0000 (03:48 -0700)]
Merge tag 'sunxi-dt-for-3.10-3' of git://github.com/mripard/linux into next/dt
From Maxime Ripard:
SunXi dt additions for 3.10, take 3
- Remove sunxi.dtsi and only use one dtsi for each SoC
- Various compatible renamings to be consistent with the other platforms
Markus Pargmann [Sun, 7 Apr 2013 19:56:45 +0000 (21:56 +0200)]
ARM: dts: imx51 cpu node
This patch adds a cpus/cpu@0 node for imx51 with default operating
points for the cpufreq-cpu0 driver. There is currently no regulator
support, so the voltages are 0 here.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Thu, 21 Mar 2013 13:55:41 +0000 (21:55 +0800)]
pinctrl: add pinctrl driver for imx6dl
The imx6dl is a derivative of imx6q with very limited difference. These
two SoCs are so compatible that they can be handled as one platform in
software. That said, we will not have target SOC_IMX6DL but just
reusing SOC_IMX6Q. That's why the pinctrl-imx6dl driver is added here
with symbol PINCTRL_IMX6Q controlling the build of it.
Philipp Zabel [Thu, 28 Mar 2013 16:35:22 +0000 (17:35 +0100)]
ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus
the IPU2 reset line and multi core CPU reset/enable bits.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Philipp Zabel [Thu, 28 Mar 2013 16:35:23 +0000 (17:35 +0100)]
ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree
Also, link SRC to IPU via phandle.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Philipp Zabel [Thu, 28 Mar 2013 16:35:20 +0000 (17:35 +0100)]
ARM i.MX6q: Link system reset controller (SRC) to IPU in DT
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Sascha Hauer [Thu, 14 Mar 2013 12:08:57 +0000 (13:08 +0100)]
ARM: i.MX27: Add GPT devicetree nodes
The GPT is the GPT timer found on i.MX SoCs.
This adds the missing GPT devicetree nodes. Also fixup the watchdog
register map size along the way. it's 0x1000, not 0x4000. This didn't
hurt before as the region was not occupied by another device, but now
overlaps with the GPT.
Shawn Guo [Wed, 20 Feb 2013 02:32:52 +0000 (10:32 +0800)]
pinctrl: imx: move hard-coding data into device tree
Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function. Every time a new imx SoC support is
added, we need to add such a big mount of data. With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.
With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.
The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.
As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.
Replace /include/ (dtc) with #include (C pre-processor) for all imx DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.
This allows future use of #defines and header files in order to define
names for various constants, such as pinctrl settings. Use of those
features will increase the readability of the device tree files.
Dirk Behme [Fri, 15 Feb 2013 14:10:01 +0000 (15:10 +0100)]
ARM: dts: imx6q: add PMU
Add ARM Cortex A9 Performance Monitor Unit (PMU) support.
On i.MX6 a combined interrupt on hardware line #126 is used
(i.MX6 TRM: Performance Unit interrupt).
For more details see Documentation/devicetree/bindings/arm/pmu.txt
* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
Merge tag 'tegra-for-3.10-fixes-for-mmc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: DT-related fixes needed by the MMC tree
In order to convert the Tegra MMC driver to using mmc_of_parse(), some
bugs in the Tegra device-tree content need to be fixed first; it's
currently wrong but unused, and mmc_of_parse() causes that data to be
used for the first time.
* tag 'tegra-for-3.10-fixes-for-mmc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre <nicolas.ferre@atmel.com>:
One macb DT node move for 9x5 family: 9g15 doesn't
have an Ethernet interface.
Little fixes mainly related to at91sam9x5 DT, IIO ADC bindings,
pinctrl for at91sam9260/g20 DT and the RTC addition.
Addition of the Acme Systems Aria G25 board.
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91/at91sam9260.dtsi: fix u(s)art pinctrl encoding
ARM: at91: dts: add adc resolution stuff
ARM: at91: add Acme Systems Aria G25 board
ARM: at91/dt: fix macb node declaration
ARM: at91: remove partial parameter in bootargs for at91sam9x5ek.dtsi
ARM: at91/trivial: fix model name for SAM9G15-EK
ARM: at91/trivial: typos in compatible property
ARM: at91/at91sam9x5: add RTC node
Maxime Ripard [Wed, 13 Mar 2013 19:07:37 +0000 (20:07 +0100)]
ARM: sunxi: dt: Reorganize the dtsi
In the early days, the A10 and A13 shared quite some code. Nowadays it
shares less and less code, the A31 diverging even more, so it doesn't
make much sense to continue to maintain this structure, just use one
DTSI for every SoC, and that's it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Merge tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: bcm2835: device tree updates
This branch adds two devices to the BCM2835 SoC device tree: the SPI
controller and the HW random number generator.
The SPI controller isn't actually instantiated in the Raspberry Pi
device tree, since there are no on-board SPI devices; it's up to the
end-user to modify their own device-tree to describe whatever they
have attached.
* tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree
ARM: bcm2835: add SPI device to DT
Stephen Warren [Wed, 6 Mar 2013 17:58:37 +0000 (10:58 -0700)]
kbuild: always run gcc -E on *.dts, remove cmd_dtc_cpp
Replace cmd_dtc with cmd_dtc_cpp, and delete the latter.
Previously, a special file extension (.dtsp) was required to trigger
the C pre-processor to run on device tree files. This was ugly. Now that
previous changes have enhanced cmd_dtc_cpp to collect dependency
information from both gcc -E and dtc, we can transparently run the pre-
processor on all device tree files, irrespective of whether they
use /include/ or #include syntax to include *.dtsi.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
Stephen Warren [Wed, 6 Mar 2013 17:28:02 +0000 (10:28 -0700)]
kbuild: cmd_dtc_cpp: extract deps from both gcc -E and dtc
Prior to this change, when compiling *.dts to *.dtb, the dependency
output from dtc would be used, and when compiling *.dtsp to *.dtb, the
dependency output from gcc -E alone would be used, despite dtc also
being invoked (on a temporary file that was guaranteed to have no
dependencies).
With this change, when compiling *.dtsp to *.dtb, the dependency files
from both gcc -E and dtc are used. This will allow cmd_dtc_cpp to
replace cmd_dtc in a future change. In turn, that will allow the C pre-
processor to be run transparently on *.dts, without the need to a
separate rule or file extension to trigger it.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
Stephen Warren [Wed, 6 Mar 2013 17:27:45 +0000 (10:27 -0700)]
kbuild: fixdep: support concatenated dep files
The current use-case for fixdep is: a source file is run through a single
processing step, which creates a single dependency file as a side-effect,
which fixdep transforms into the file used by the kernel build process.
In order to transparently run the C pre-processor on device-tree files,
we wish to run both gcc -E and dtc on a source file in a single rule.
This generates two dependency files, which must be transformed together
into the file used by the kernel build process. This change modifies
fixdep so it can process the concatenation of multiple separate input
dependency files, and produce a correct unified output.
The code changes have the slight benefit of transforming the loop in
parse_dep_file() into more of a lexer/tokenizer, with the loop body being
more of a parser. Previously, some of this logic was mixed together
before the loop. I also added some comments, which I hope are useful.
Benchmarking shows that on a cross-compiled ARM tegra_defconfig build,
there is less than 0.5 seconds speed decrease with this change, on top
of a build time of ~2m24s. This is probably within the noise.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
Stephen Warren [Wed, 20 Feb 2013 20:39:41 +0000 (13:39 -0700)]
kbuild: create an "include chroot" for DT bindings
The recent dtc+cpp support allows header files and C pre-processor
defines/macros to be used when compiling device tree files. These
headers will typically define various constants that are part of the
device tree bindings.
The original patch which set up the dtc+cpp include path only considered
using those headers from device tree files. However, most are also
useful for kernel code which needs to interpret the device tree.
In both the DT files and the kernel, I'd like to include the DT-related
headers in the same way, for example, <dt-bindings/gpio/tegra-gpio.h>.
That will simplify any text which discusses the DT header locations.
Creating a <dt-bindings/> for kernel source to use is as simple as
placing files into include/dt-bindings/.
However, when compiling DT files, the include path should be restricted
so that only the dt-bindings path is available; arbitrary kernel headers
shouldn't be exposed. For this reason, create a specific include
directory for use by dtc+cpp, and symlink dt-bindings from there to the
actual location of include/dt-bindings/. For want of a better location,
place this "include chroot" into the existing dts/ directory.
Some headers used by device tree files may not be useful to the kernel;
they may be used simply to aid in constructing the DT file (e.g. macros
to create a node), but not define any information that the kernel needs
to share. These may be placed directly into arch/*/boot/dts/ along with
the DT files themselves.
Acked-by: Michal Marek <mmarek@suse.cz> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Nicolas Ferre [Fri, 22 Mar 2013 13:47:54 +0000 (14:47 +0100)]
ARM: at91/dt: fix macb node declaration
Macb0 node cannot be activated in generic sam9x5ek.dtsi file
as the sam9g15 does not have one.
Move the macb0 & macb1 activation in board .dts file that
support them.
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ezequiel Garcia [Tue, 26 Mar 2013 10:16:28 +0000 (07:16 -0300)]
ARM: configs: Update mvebu defconfig for thermal
The thermal management driver for Armada XP/370 has been added
so we update the defconfig to reflect this.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Tue, 26 Mar 2013 10:16:27 +0000 (07:16 -0300)]
ARM: mvebu: Add thermal support to Armada 370 device tree
This patch adds support for the thermal controller available in
all Armada 370 boards. This controller has two 4-byte registers:
one to read the thermal sensor, the other for sensor initialization.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Tue, 26 Mar 2013 10:16:26 +0000 (07:16 -0300)]
ARM: mvebu: Add thermal support to Armada XP device tree
This patch adds support for the thermal controller available in
all Armada XP boards. This controller has two 4-byte registers:
one to read the thermal sensor, the other for sensor initialization.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Shawn Guo [Wed, 13 Mar 2013 05:25:43 +0000 (13:25 +0800)]
ARM: imx: remove duplicated function declaration
Commit 13eed98 (arm/imx6q: add device tree machine support) added
duplicated function declaration for imx_enable_cpu() and
imx_set_cpu_jump(). Remove them.
Linus Torvalds [Sun, 31 Mar 2013 18:41:47 +0000 (11:41 -0700)]
Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine fixes from Vinod Koul:
"Two fixes for slave-dmaengine.
The first one is for making slave_id value correct for dw_dmac and
the other one fixes the endieness in DT parsing"
* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
dw_dmac: adjust slave_id accordingly to request line base
dmaengine: dw_dma: fix endianess for DT xlate function
Linus Torvalds [Sun, 31 Mar 2013 18:40:33 +0000 (11:40 -0700)]
Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"For a some fixes for Kernel 3.9:
- subsystem build fix when VIDEO_DEV=y, VIDEO_V4L2=m and I2C=m
- compilation fix for arm multiarch preventing IR_RX51 to be selected
- regression fix at bttv crop logic
- s5p-mfc/m5mols/exynos: a few fixes for cameras on exynos hardware"
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] [REGRESSION] bt8xx: Fix too large height in cropcap
[media] fix compilation with both V4L2 and I2C as 'm'
[media] m5mols: Fix bug in stream on handler
[media] s5p-fimc: Do not attempt to disable not enabled media pipeline
[media] s5p-mfc: Fix encoder control 15 issue
[media] s5p-mfc: Fix frame skip bug
[media] s5p-fimc: send valid m2m ctx to fimc_m2m_job_finish
[media] exynos-gsc: send valid m2m ctx to gsc_m2m_job_finish
[media] fimc-lite: Fix the variable type to avoid possible crash
[media] fimc-lite: Initialize 'step' field in fimc_lite_ctrl structure
[media] ir: IR_RX51 only works on OMAP2
projects / ~andy / linux / log