From: Olof Johansson Date: Sun, 28 Apr 2013 22:06:56 +0000 (-0700) Subject: Merge branch 'gic/cleanup' into next/soc X-Git-Tag: v3.10-rc1~123^2 X-Git-Url: http://pileus.org/git/?a=commitdiff_plain;h=e0d20b69d3fa74a21ec363989612bddd58b930b8;p=~andy%2Flinux Merge branch 'gic/cleanup' into next/soc Merge in the gic cleanup since it has a handful of annoying internal conflicts with soc development branches. All of them are delete/delete conflicts. * gic/cleanup: irqchip: vic: add include of linux/irq.h irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h Signed-off-by: Olof Johansson Conflicts: arch/arm/mach-shmobile/smp-emev2.c arch/arm/mach-shmobile/smp-r8a7779.c arch/arm/mach-shmobile/smp-sh73a0.c arch/arm/mach-socfpga/platsmp.c --- e0d20b69d3fa74a21ec363989612bddd58b930b8 diff --cc arch/arm/mach-shmobile/smp-emev2.c index 8225c16b371,384e27dd360..e38691b4d0d --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@@ -31,14 -30,71 +30,9 @@@ #define EMEV2_SCU_BASE 0x1e000000 - static void __cpuinit emev2_secondary_init(unsigned int cpu) -static DEFINE_SPINLOCK(scu_lock); -static void __iomem *scu_base; - -static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) --{ - gic_secondary_init(0); - unsigned long tmp; - - /* we assume this code is running on a different cpu - * than the one that is changing coherency setting */ - spin_lock(&scu_lock); - tmp = readl(scu_base + 8); - tmp &= ~clr; - tmp |= set; - writel(tmp, scu_base + 8); - spin_unlock(&scu_lock); - -} - -static unsigned int __init emev2_get_core_count(void) -{ - if (!scu_base) { - scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); - emev2_clock_init(); /* need ioremapped SMU */ - } - - WARN_ON_ONCE(!scu_base); - - return scu_base ? scu_get_core_count(scu_base) : 1; -} - -static int emev2_platform_cpu_kill(unsigned int cpu) -{ - return 0; /* not supported yet */ -} - -static int __maybe_unused emev2_cpu_kill(unsigned int cpu) -{ - int k; - - /* this function is running on another CPU than the offline target, - * here we need wait for shutdown code in platform_cpu_die() to - * finish before asking SoC-specific code to power off the CPU core. - */ - for (k = 0; k < 1000; k++) { - if (shmobile_cpu_is_dead(cpu)) - return emev2_platform_cpu_kill(cpu); - mdelay(1); - } - - return 0; --} - -- static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) { - cpu = cpu_logical_map(cpu); - - /* enable cache coherency */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); - - /* Tell ROM loader about our vector (in headsmp.S) */ - emev2_set_boot_vector(__pa(shmobile_secondary_vector)); - - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); return 0; } @@@ -69,6 -118,10 +63,5 @@@ static void __init emev2_smp_init_cpus( struct smp_operations emev2_smp_ops __initdata = { .smp_init_cpus = emev2_smp_init_cpus, .smp_prepare_cpus = emev2_smp_prepare_cpus, - .smp_secondary_init = emev2_secondary_init, .smp_boot_secondary = emev2_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_kill = emev2_cpu_kill, - .cpu_die = shmobile_cpu_die, - .cpu_disable = shmobile_cpu_disable, -#endif }; diff --cc arch/arm/mach-shmobile/smp-r8a7779.c index ea4535a5c4e,994906560ed..a853bf182ed --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@@ -23,10 -23,8 +23,9 @@@ #include #include #include - #include #include #include +#include #include #include #include @@@ -82,11 -112,25 +81,6 @@@ static int r8a7779_platform_cpu_kill(un return ret ? ret : 1; } - static void __cpuinit r8a7779_secondary_init(unsigned int cpu) -static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu) --{ - gic_secondary_init(0); - int k; - - /* this function is running on another CPU than the offline target, - * here we need wait for shutdown code in platform_cpu_die() to - * finish before asking SoC-specific code to power off the CPU core. - */ - for (k = 0; k < 1000; k++) { - if (shmobile_cpu_is_dead(cpu)) - return r8a7779_platform_cpu_kill(cpu); - - mdelay(1); - } - - return 0; --} - -- static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) { struct r8a7779_pm_ch *ch = NULL; diff --cc arch/arm/mach-shmobile/smp-sh73a0.c index 5ae502b1643,d0f9aca2247..bf79626ee5a --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@@ -49,11 -51,13 +48,6 @@@ void __init sh73a0_register_twd(void } #endif - static void __cpuinit sh73a0_secondary_init(unsigned int cpu) -static unsigned int __init sh73a0_get_core_count(void) --{ - gic_secondary_init(0); - void __iomem *scu_base = scu_base_addr(); - - return scu_get_core_count(scu_base); --} -- static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) { cpu = cpu_logical_map(cpu); diff --cc arch/arm/mach-socfpga/platsmp.c index b907fb986d9,ca14d1d5ac7..b51ce8c7929 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c @@@ -30,16 -29,9 +29,6 @@@ #include "core.h" - static void __cpuinit socfpga_secondary_init(unsigned int cpu) - { - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - } -extern void __iomem *sys_manager_base_addr; -extern void __iomem *rst_manager_base_addr; -- static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) { int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; diff --cc arch/arm/mach-tegra/platsmp.c index 516aab28fe3,9348d3c496a..0c4963bd4b4 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@@ -34,17 -34,15 +33,10 @@@ #include "common.h" #include "iomap.h" -extern void tegra_secondary_startup(void); - static cpumask_t tegra_cpu_init_mask; -#define EVP_CPU_RESET_VECTOR \ - (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) - static void __cpuinit tegra_secondary_init(unsigned int cpu) { - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - cpumask_set_cpu(cpu, &tegra_cpu_init_mask); }