From: Russell King Date: Mon, 8 Mar 2010 20:21:04 +0000 (+0000) Subject: Merge branch 'origin' into devel-stable X-Git-Tag: v2.6.34-rc2~66^2~1 X-Git-Url: http://pileus.org/git/?a=commitdiff_plain;h=988addf82e4c03739375279de73929580a2d4a6a;p=~andy%2Flinux Merge branch 'origin' into devel-stable Conflicts: arch/arm/mach-mx2/devices.c arch/arm/mach-mx2/devices.h sound/soc/pxa/pxa-ssp.c --- 988addf82e4c03739375279de73929580a2d4a6a diff --cc arch/arm/mach-mx2/devices.c index a4b809b82fa,3956d82b7c4..b91e412f7b3 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c @@@ -267,41 -377,66 +268,38 @@@ struct platform_device mxc_pwm_device .resource = mxc_pwm_resources, }; --/* -- * Resource definition for the MXC SDHC -- */ -static struct resource mxc_sdhc1_resources[] = { - { - .start = SDHC1_BASE_ADDR, - .end = SDHC1_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_SDHC1, - .end = MXC_INT_SDHC1, - .flags = IORESOURCE_IRQ, - }, { - .start = DMA_REQ_SDHC1, - .end = DMA_REQ_SDHC1, - .flags = IORESOURCE_DMA, - }, -}; - -static u64 mxc_sdhc1_dmamask = DMA_BIT_MASK(32); - -struct platform_device mxc_sdhc_device0 = { - .name = "mxc-mmc", - .id = 0, - .dev = { - .dma_mask = &mxc_sdhc1_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(mxc_sdhc1_resources), - .resource = mxc_sdhc1_resources, -}; - -static struct resource mxc_sdhc2_resources[] = { - { - .start = SDHC2_BASE_ADDR, - .end = SDHC2_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_SDHC2, - .end = MXC_INT_SDHC2, - .flags = IORESOURCE_IRQ, - }, { - .start = DMA_REQ_SDHC2, - .end = DMA_REQ_SDHC2, - .flags = IORESOURCE_DMA, - }, -}; - -static u64 mxc_sdhc2_dmamask = DMA_BIT_MASK(32); +#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \ + static struct resource mxc_sdhc_resources ## n[] = { \ + { \ + .start = baseaddr, \ + .end = baseaddr + SZ_4K - 1, \ + .flags = IORESOURCE_MEM, \ + }, { \ + .start = irq, \ + .end = irq, \ + .flags = IORESOURCE_IRQ, \ + }, { \ + .start = dmareq, \ + .end = dmareq, \ + .flags = IORESOURCE_DMA, \ + }, \ + }; \ + \ - static u64 mxc_sdhc ## n ## _dmamask = 0xffffffffUL; \ ++ static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32); \ + \ + struct platform_device mxc_sdhc_device ## n = { \ + .name = "mxc-mmc", \ + .id = n, \ + .dev = { \ + .dma_mask = &mxc_sdhc ## n ## _dmamask, \ - .coherent_dma_mask = 0xffffffff, \ ++ .coherent_dma_mask = DMA_BIT_MASK(32), \ + }, \ + .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \ + .resource = mxc_sdhc_resources ## n, \ + } -struct platform_device mxc_sdhc_device1 = { - .name = "mxc-mmc", - .id = 1, - .dev = { - .dma_mask = &mxc_sdhc2_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(mxc_sdhc2_resources), - .resource = mxc_sdhc2_resources, -}; +DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1); +DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2); #ifdef CONFIG_MACH_MX27 static struct resource otg_resources[] = { @@@ -469,15 -641,32 +467,42 @@@ DEFINE_MXC_GPIO_PORTS(MX27, imx27) int __init mxc_register_gpios(void) { - return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); +#ifdef CONFIG_MACH_MX21 + if (cpu_is_mx21()) + return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports)); + else +#endif +#ifdef CONFIG_MACH_MX27 + if (cpu_is_mx27()) + return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports)); + else +#endif + return 0; } + + #ifdef CONFIG_MACH_MX21 + static struct resource mx21_usbhc_resources[] = { + { - .start = USBOTG_BASE_ADDR, - .end = USBOTG_BASE_ADDR + 0x1FFF, ++ .start = MX21_BASE_ADDR, ++ .end = MX21_BASE_ADDR + 0x1FFF, + .flags = IORESOURCE_MEM, + }, + { - .start = MXC_INT_USBHOST, - .end = MXC_INT_USBHOST, ++ .start = MX21_INT_USBHOST, ++ .end = MX21_INT_USBHOST, + .flags = IORESOURCE_IRQ, + }, + }; + + struct platform_device mx21_usbhc_device = { + .name = "imx21-hcd", + .id = 0, + .dev = { + .dma_mask = &mx21_usbhc_device.dev.coherent_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(mx21_usbhc_resources), + .resource = mx21_usbhc_resources, + }; + #endif + diff --cc arch/arm/mach-mx2/devices.h index f15df2aaae4,f12694b0736..84ed5138017 --- a/arch/arm/mach-mx2/devices.h +++ b/arch/arm/mach-mx2/devices.h @@@ -34,8 -25,7 +34,9 @@@ extern struct platform_device mxc_usbh1 extern struct platform_device mxc_usbh2; extern struct platform_device mxc_spi_device0; extern struct platform_device mxc_spi_device1; +#ifdef CONFIG_MACH_MX27 extern struct platform_device mxc_spi_device2; +#endif + extern struct platform_device mx21_usbhc_device; extern struct platform_device imx_ssi_device0; extern struct platform_device imx_ssi_device1; diff --cc arch/arm/mach-s5pc100/include/mach/vmalloc.h index 61b95158a43,00000000000..be9df79903e mode 100644,000000..100644 --- a/arch/arm/mach-s5pc100/include/mach/vmalloc.h +++ b/arch/arm/mach-s5pc100/include/mach/vmalloc.h @@@ -1,17 -1,0 +1,17 @@@ +/* arch/arm/mach-s5pc100/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C6400 vmalloc definition +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + - #define VMALLOC_END (0xE0000000) ++#define VMALLOC_END (0xe0000000UL) + +#endif /* __ASM_ARCH_VMALLOC_H */ diff --cc arch/arm/mach-s5pv210/include/mach/debug-macro.S index 8aec853310a,00000000000..7872f5c3dfc mode 100644,000000..100644 --- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S @@@ -1,42 -1,0 +1,42 @@@ +/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#include +#include + + /* note, for the boot process to work we have to keep the UART + * virtual address aligned to an 1MiB boundary for the L1 + * mapping the head code makes. We keep the UART virtual address + * aligned and add in the offset when we load the value here. + */ + - .macro addruart, rx ++ .macro addruart, rx, tmp + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + ldreq \rx, = S3C_PA_UART + ldrne \rx, = S3C_VA_UART +#if CONFIG_DEBUG_S3C_UART != 0 + add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +#define fifo_full fifo_full_s5pv210 +#define fifo_level fifo_level_s5pv210 + +/* include the reset of the code which will do the work, we're only + * compiling for a single cpu processor type so the default of s3c2440 + * will be fine with us. + */ + +#include diff --cc arch/arm/plat-mxc/include/mach/debug-macro.S index 133d66bfb53,5a6ae1b9e1e..0b6e11eaeb8 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@@ -60,9 -50,9 +60,9 @@@ #endif #include #define UART_PADDR MXC91231_UART2_BASE_ADDR -#define UART_VADDR MXC91231_AIPS1_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) +#define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) #endif - .macro addruart,rx + .macro addruart, rx, tmp mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? ldreq \rx, =UART_PADDR @ physical diff --cc drivers/sh/intc.c index 926013bece1,3a5a17db947..c2750391fd3 --- a/drivers/sh/intc.c +++ b/drivers/sh/intc.c @@@ -656,12 -760,8 +760,12 @@@ static void __init intc_register_irq(st /* irq should be disabled by default */ d->chip.mask(irq); - if (desc->ack_regs) + if (desc->hw.ack_regs) ack_handle[irq] = intc_ack_data(desc, d, enum_id); + +#ifdef CONFIG_ARM + set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */ +#endif } static unsigned int __init save_reg(struct intc_desc_int *d, diff --cc sound/soc/pxa/pxa-ssp.c index cf00df9c40f,e69397f40f7..9e95e5117c8 --- a/sound/soc/pxa/pxa-ssp.c +++ b/sound/soc/pxa/pxa-ssp.c @@@ -152,39 -133,28 +152,40 @@@ static void pxa_ssp_shutdown(struct snd static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai) { struct ssp_priv *priv = cpu_dai->private_data; + struct ssp_device *ssp = priv->ssp; if (!cpu_dai->active) - return 0; - clk_enable(priv->dev.ssp->clk); ++ clk_enable(ssp->clk); - ssp_save_state(&priv->dev, &priv->state); - clk_disable(priv->dev.ssp->clk); + priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0); + priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1); + priv->to = __raw_readl(ssp->mmio_base + SSTO); + priv->psp = __raw_readl(ssp->mmio_base + SSPSP); + ssp_disable(ssp); + clk_disable(ssp->clk); return 0; } static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai) { struct ssp_priv *priv = cpu_dai->private_data; + struct ssp_device *ssp = priv->ssp; + uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE; + - if (!cpu_dai->active) - return 0; - + clk_enable(ssp->clk); - clk_enable(priv->dev.ssp->clk); - ssp_restore_state(&priv->dev, &priv->state); + __raw_writel(sssr, ssp->mmio_base + SSSR); - + __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); + __raw_writel(priv->cr1, ssp->mmio_base + SSCR1); + __raw_writel(priv->to, ssp->mmio_base + SSTO); + __raw_writel(priv->psp, ssp->mmio_base + SSPSP); - __raw_writel(priv->cr0 | SSCR0_SSE, ssp->mmio_base + SSCR0); + + if (cpu_dai->active) - ssp_enable(&priv->dev); ++ ssp_enable(ssp); + else - clk_disable(priv->dev.ssp->clk); ++ clk_disable(ssp->clk); + return 0; }