From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu, 24 Sep 2009 17:30:41 +0000 (-0700)
Subject: Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt... 
X-Git-Tag: v2.6.32-rc1~52
X-Git-Url: http://pileus.org/git/?a=commitdiff_plain;h=94e0fb086fc5663c38bbc0fe86d698be8314f82f;p=~andy%2Flinux

Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel

* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (57 commits)
  drm/i915: Handle ERESTARTSYS during page fault
  drm/i915: Warn before mmaping a purgeable buffer.
  drm/i915: Track purged state.
  drm/i915: Remove eviction debug spam
  drm/i915: Immediately discard any backing storage for uneeded objects
  drm/i915: Do not mis-classify clean objects as purgeable
  drm/i915: Whitespace correction for madv
  drm/i915: BUG_ON page refleak during unbind
  drm/i915: Search harder for a reusable object
  drm/i915: Clean up evict from list.
  drm/i915: Add tracepoints
  drm/i915: framebuffer compression for GM45+
  drm/i915: split display functions by chip type
  drm/i915: Skip the sanity checks if the current relocation is valid
  drm/i915: Check that the relocation points to within the target
  drm/i915: correct FBC update when pipe base update occurs
  drm/i915: blacklist Acer AspireOne lid status
  ACPI: make ACPI button funcs no-ops if not built in
  drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks
  drm/i915: intel_display.c handle latency variable efficiently
  ...

Fix up trivial conflicts in drivers/gpu/drm/i915/{i915_dma.c|i915_drv.h}
---

94e0fb086fc5663c38bbc0fe86d698be8314f82f
diff --cc drivers/gpu/drm/i915/i915_dma.c
index 5a49a1867b3,ae7ec039002..45d507ebd3f
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -33,7 -33,7 +33,8 @@@
  #include "intel_drv.h"
  #include "i915_drm.h"
  #include "i915_drv.h"
+ #include "i915_trace.h"
 +#include <linux/vgaarb.h>
  
  /* Really want an OS-independent resettable timer.  Would like to have
   * this loop run for (eg) 3 sec, but have the timer reset every time
@@@ -1013,20 -1020,156 +1021,169 @@@ static int i915_probe_agp(struct drm_de
  	return 0;
  }
  
+ #define PTE_ADDRESS_MASK		0xfffff000
+ #define PTE_ADDRESS_MASK_HIGH		0x000000f0 /* i915+ */
+ #define PTE_MAPPING_TYPE_UNCACHED	(0 << 1)
+ #define PTE_MAPPING_TYPE_DCACHE		(1 << 1) /* i830 only */
+ #define PTE_MAPPING_TYPE_CACHED		(3 << 1)
+ #define PTE_MAPPING_TYPE_MASK		(3 << 1)
+ #define PTE_VALID			(1 << 0)
+ 
+ /**
+  * i915_gtt_to_phys - take a GTT address and turn it into a physical one
+  * @dev: drm device
+  * @gtt_addr: address to translate
+  *
+  * Some chip functions require allocations from stolen space but need the
+  * physical address of the memory in question.  We use this routine
+  * to get a physical address suitable for register programming from a given
+  * GTT address.
+  */
+ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
+ 				      unsigned long gtt_addr)
+ {
+ 	unsigned long *gtt;
+ 	unsigned long entry, phys;
+ 	int gtt_bar = IS_I9XX(dev) ? 0 : 1;
+ 	int gtt_offset, gtt_size;
+ 
+ 	if (IS_I965G(dev)) {
+ 		if (IS_G4X(dev) || IS_IGDNG(dev)) {
+ 			gtt_offset = 2*1024*1024;
+ 			gtt_size = 2*1024*1024;
+ 		} else {
+ 			gtt_offset = 512*1024;
+ 			gtt_size = 512*1024;
+ 		}
+ 	} else {
+ 		gtt_bar = 3;
+ 		gtt_offset = 0;
+ 		gtt_size = pci_resource_len(dev->pdev, gtt_bar);
+ 	}
+ 
+ 	gtt = ioremap_wc(pci_resource_start(dev->pdev, gtt_bar) + gtt_offset,
+ 			 gtt_size);
+ 	if (!gtt) {
+ 		DRM_ERROR("ioremap of GTT failed\n");
+ 		return 0;
+ 	}
+ 
+ 	entry = *(volatile u32 *)(gtt + (gtt_addr / 1024));
+ 
+ 	DRM_DEBUG("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
+ 
+ 	/* Mask out these reserved bits on this hardware. */
+ 	if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) ||
+ 	    IS_I945G(dev) || IS_I945GM(dev)) {
+ 		entry &= ~PTE_ADDRESS_MASK_HIGH;
+ 	}
+ 
+ 	/* If it's not a mapping type we know, then bail. */
+ 	if ((entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_UNCACHED &&
+ 	    (entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_CACHED)	{
+ 		iounmap(gtt);
+ 		return 0;
+ 	}
+ 
+ 	if (!(entry & PTE_VALID)) {
+ 		DRM_ERROR("bad GTT entry in stolen space\n");
+ 		iounmap(gtt);
+ 		return 0;
+ 	}
+ 
+ 	iounmap(gtt);
+ 
+ 	phys =(entry & PTE_ADDRESS_MASK) |
+ 		((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4));
+ 
+ 	DRM_DEBUG("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
+ 
+ 	return phys;
+ }
+ 
+ static void i915_warn_stolen(struct drm_device *dev)
+ {
+ 	DRM_ERROR("not enough stolen space for compressed buffer, disabling\n");
+ 	DRM_ERROR("hint: you may be able to increase stolen memory size in the BIOS to avoid this\n");
+ }
+ 
+ static void i915_setup_compression(struct drm_device *dev, int size)
+ {
+ 	struct drm_i915_private *dev_priv = dev->dev_private;
+ 	struct drm_mm_node *compressed_fb, *compressed_llb;
+ 	unsigned long cfb_base, ll_base;
+ 
+ 	/* Leave 1M for line length buffer & misc. */
+ 	compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
+ 	if (!compressed_fb) {
+ 		i915_warn_stolen(dev);
+ 		return;
+ 	}
+ 
+ 	compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
+ 	if (!compressed_fb) {
+ 		i915_warn_stolen(dev);
+ 		return;
+ 	}
+ 
+ 	cfb_base = i915_gtt_to_phys(dev, compressed_fb->start);
+ 	if (!cfb_base) {
+ 		DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
+ 		drm_mm_put_block(compressed_fb);
+ 	}
+ 
+ 	if (!IS_GM45(dev)) {
+ 		compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096,
+ 						    4096, 0);
+ 		if (!compressed_llb) {
+ 			i915_warn_stolen(dev);
+ 			return;
+ 		}
+ 
+ 		compressed_llb = drm_mm_get_block(compressed_llb, 4096, 4096);
+ 		if (!compressed_llb) {
+ 			i915_warn_stolen(dev);
+ 			return;
+ 		}
+ 
+ 		ll_base = i915_gtt_to_phys(dev, compressed_llb->start);
+ 		if (!ll_base) {
+ 			DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
+ 			drm_mm_put_block(compressed_fb);
+ 			drm_mm_put_block(compressed_llb);
+ 		}
+ 	}
+ 
+ 	dev_priv->cfb_size = size;
+ 
+ 	if (IS_GM45(dev)) {
+ 		g4x_disable_fbc(dev);
+ 		I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
+ 	} else {
+ 		i8xx_disable_fbc(dev);
+ 		I915_WRITE(FBC_CFB_BASE, cfb_base);
+ 		I915_WRITE(FBC_LL_BASE, ll_base);
+ 	}
+ 
+ 	DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,
+ 		  ll_base, size >> 20);
+ }
+ 
 +/* true = enable decode, false = disable decoder */
 +static unsigned int i915_vga_set_decode(void *cookie, bool state)
 +{
 +	struct drm_device *dev = cookie;
 +
 +	intel_modeset_vga_set_state(dev, state);
 +	if (state)
 +		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
 +		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
 +	else
 +		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
 +}
 +
  static int i915_load_modeset_init(struct drm_device *dev,
+ 				  unsigned long prealloc_start,
  				  unsigned long prealloc_size,
  				  unsigned long agp_size)
  {
diff --cc drivers/gpu/drm/i915/i915_drv.h
index a0632f8e76a,93108727285..b24b2d145b7
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -766,7 -826,8 +826,9 @@@ static inline void opregion_enable_asle
  /* modesetting */
  extern void intel_modeset_init(struct drm_device *dev);
  extern void intel_modeset_cleanup(struct drm_device *dev);
 +extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
+ extern void i8xx_disable_fbc(struct drm_device *dev);
+ extern void g4x_disable_fbc(struct drm_device *dev);
  
  /**
   * Lock test for when it's just for synchronization of ring access.