From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Date: Fri, 22 May 2009 23:01:05 +0000 (+0100)
Subject: ASoC: Fix WM9081 PowerPC compiler issues
X-Git-Tag: v2.6.31-rc5~1^2~13^2~29^2~28
X-Git-Url: http://pileus.org/git/?a=commitdiff_plain;h=0154724d487586241c1ad57cfd348ed2ff2274e2;p=~andy%2Flinux

ASoC: Fix WM9081 PowerPC compiler issues

Ensure that we always set a new sysclk when using the FLL in master mode
and pick out the correct value for the sample rate in hw_params().

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---

diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c
index 83e3148c258..86fc57e25f9 100644
--- a/sound/soc/codecs/wm9081.c
+++ b/sound/soc/codecs/wm9081.c
@@ -702,9 +702,10 @@ static int configure_clock(struct snd_soc_codec *codec)
 			 * performance. */
 			for (i = 0; i < ARRAY_SIZE(clk_sys_rates); i++) {
 				target = wm9081->fs * clk_sys_rates[i].ratio;
+				new_sysclk = target;
 				if (target >= wm9081->bclk &&
 				    target > 3000000)
-					new_sysclk = target;
+					break;
 			}
 		} else if (wm9081->fs) {
 			for (i = 0; i < ARRAY_SIZE(clk_sys_rates); i++) {
@@ -1102,7 +1103,8 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
 	}
 	dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
 		sample_rates[best].rate);
-	clk_ctrl2 |= (sample_rates[i].sample_rate << WM9081_SAMPLE_RATE_SHIFT);
+	clk_ctrl2 |= (sample_rates[best].sample_rate
+			<< WM9081_SAMPLE_RATE_SHIFT);
 
 	/* BCLK_DIV */
 	best = 0;