From: Will Deacon Date: Thu, 19 Sep 2013 18:06:46 +0000 (+0100) Subject: lockref: use cmpxchg64 explicitly for lockless updates X-Git-Tag: v3.12-rc2~11 X-Git-Url: http://pileus.org/git/?a=commitdiff_plain;ds=sidebyside;h=8f4c344696b9f9f8471d7f342076ef10ed7f66a5;p=~andy%2Flinux lockref: use cmpxchg64 explicitly for lockless updates The cmpxchg() function tends not to support 64-bit arguments on 32-bit architectures. This could be either due to use of unsigned long arguments (like on ARM) or lack of instruction support (cmpxchgq on x86). However, these architectures may implement a specific cmpxchg64() function to provide 64-bit cmpxchg support instead. Since the lockref code requires a 64-bit cmpxchg and relies on the architecture selecting ARCH_USE_CMPXCHG_LOCKREF, move to using cmpxchg64 instead of cmpxchg and allow 32-bit architectures to make use of the lockless lockref implementation. Cc: Waiman Long Signed-off-by: Will Deacon Signed-off-by: Linus Torvalds --- diff --git a/lib/lockref.c b/lib/lockref.c index e2cd2c0a882..677d036cf3c 100644 --- a/lib/lockref.c +++ b/lib/lockref.c @@ -14,8 +14,8 @@ while (likely(arch_spin_value_unlocked(old.lock.rlock.raw_lock))) { \ struct lockref new = old, prev = old; \ CODE \ - old.lock_count = cmpxchg(&lockref->lock_count, \ - old.lock_count, new.lock_count); \ + old.lock_count = cmpxchg64(&lockref->lock_count, \ + old.lock_count, new.lock_count); \ if (likely(old.lock_count == prev.lock_count)) { \ SUCCESS; \ } \