]> Pileus Git - ~andy/linux/commitdiff
[SCSI] qla2xxx: Use PCI-X/PCI-Express read control interfaces.
authorAndrew Vasquez <andrew.vasquez@qlogic.com>
Thu, 19 Jul 2007 22:06:01 +0000 (15:06 -0700)
committerJames Bottomley <jejb@mulgrave.localdomain>
Fri, 20 Jul 2007 14:24:41 +0000 (09:24 -0500)
Original from Peter Oruba <peter.oruba@amd.com>.  Additional
cleanups included.

Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
drivers/scsi/qla2xxx/qla_init.c

index 401a8798ce5247f7145a5b7787e472e18057e5de..622cf8f15fc7e4bbeb3ae1047a495e7cbdfa2667 100644 (file)
@@ -255,7 +255,6 @@ qla24xx_pci_config(scsi_qla_host_t *ha)
        uint32_t d;
        unsigned long flags = 0;
        struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
-       int pcix_cmd_reg, pcie_dctl_reg;
 
        pci_set_master(ha->pdev);
        ret = pci_set_mwi(ha->pdev);
@@ -268,28 +267,12 @@ qla24xx_pci_config(scsi_qla_host_t *ha)
        pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
 
        /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
-       pcix_cmd_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX);
-       if (pcix_cmd_reg) {
-               uint16_t pcix_cmd;
-
-               pcix_cmd_reg += PCI_X_CMD;
-               pci_read_config_word(ha->pdev, pcix_cmd_reg, &pcix_cmd);
-               pcix_cmd &= ~PCI_X_CMD_MAX_READ;
-               pcix_cmd |= 0x0008;
-               pci_write_config_word(ha->pdev, pcix_cmd_reg, pcix_cmd);
-       }
+       if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
+               pcix_set_mmrbc(ha->pdev, 2048);
 
        /* PCIe -- adjust Maximum Read Request Size (2048). */
-       pcie_dctl_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
-       if (pcie_dctl_reg) {
-               uint16_t pcie_dctl;
-
-               pcie_dctl_reg += PCI_EXP_DEVCTL;
-               pci_read_config_word(ha->pdev, pcie_dctl_reg, &pcie_dctl);
-               pcie_dctl &= ~PCI_EXP_DEVCTL_READRQ;
-               pcie_dctl |= 0x4000;
-               pci_write_config_word(ha->pdev, pcie_dctl_reg, pcie_dctl);
-       }
+       if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
+               pcie_set_readrq(ha->pdev, 2048);
 
        /* Reset expansion ROM address decode enable */
        pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);