]> Pileus Git - ~andy/linux/commitdiff
b43: make forcing clock common (HT-PHY also uses that)
authorRafał Miłecki <zajec5@gmail.com>
Thu, 11 Aug 2011 22:03:26 +0000 (00:03 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 22 Aug 2011 18:45:59 +0000 (14:45 -0400)
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/b43/phy_common.c
drivers/net/wireless/b43/phy_common.h
drivers/net/wireless/b43/phy_n.c

index 07f009ff5ee2bfdf58a87002a24b6702c24e2b85..3ea44bb036844ef4a5da47b91ffd80ec8a18ec31 100644 (file)
@@ -448,6 +448,38 @@ bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type)
                channel_type == NL80211_CHAN_HT40PLUS);
 }
 
+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
+void b43_phy_force_clock(struct b43_wldev *dev, bool force)
+{
+       u32 tmp;
+
+       WARN_ON(dev->phy.type != B43_PHYTYPE_N &&
+               dev->phy.type != B43_PHYTYPE_HT);
+
+       switch (dev->dev->bus_type) {
+#ifdef CONFIG_B43_BCMA
+       case B43_BUS_BCMA:
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               if (force)
+                       tmp |= BCMA_IOCTL_FGC;
+               else
+                       tmp &= ~BCMA_IOCTL_FGC;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+               break;
+#endif
+#ifdef CONFIG_B43_SSB
+       case B43_BUS_SSB:
+               tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
+               if (force)
+                       tmp |= SSB_TMSLOW_FGC;
+               else
+                       tmp &= ~SSB_TMSLOW_FGC;
+               ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
+               break;
+#endif
+       }
+}
+
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */
 struct b43_c32 b43_cordic(int theta)
 {
index aa77ba612a92fac3e127c8a6f4a505e922438aba..9233b13fc16d8a205eb474a3870f59bc3b6b7e8c 100644 (file)
@@ -444,6 +444,8 @@ void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
 
 bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type);
 
+void b43_phy_force_clock(struct b43_wldev *dev, bool force);
+
 struct b43_c32 b43_cordic(int theta);
 
 #endif /* LINUX_B43_PHY_COMMON_H_ */
index 3b46360da99b5790dac9020ceaa055dad8131f2b..2eadadf5f4fc375ced006719086846a624182a04 100644 (file)
@@ -600,49 +600,17 @@ static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
        }
 }
 
-/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
-static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
-{
-       u32 tmp;
-
-       if (dev->phy.type != B43_PHYTYPE_N)
-               return;
-
-       switch (dev->dev->bus_type) {
-#ifdef CONFIG_B43_BCMA
-       case B43_BUS_BCMA:
-               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
-               if (force)
-                       tmp |= BCMA_IOCTL_FGC;
-               else
-                       tmp &= ~BCMA_IOCTL_FGC;
-               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
-               break;
-#endif
-#ifdef CONFIG_B43_SSB
-       case B43_BUS_SSB:
-               tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
-               if (force)
-                       tmp |= SSB_TMSLOW_FGC;
-               else
-                       tmp &= ~SSB_TMSLOW_FGC;
-               ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
-               break;
-#endif
-       }
-}
-
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
 static void b43_nphy_reset_cca(struct b43_wldev *dev)
 {
        u16 bbcfg;
 
-       b43_nphy_bmac_clock_fgc(dev, 1);
+       b43_phy_force_clock(dev, 1);
        bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
        b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
        udelay(1);
        b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
-       b43_nphy_bmac_clock_fgc(dev, 0);
+       b43_phy_force_clock(dev, 0);
        b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
 }
 
@@ -3715,11 +3683,11 @@ int b43_phy_initn(struct b43_wldev *dev)
        b43_nphy_workarounds(dev);
 
        /* Reset CCA, in init code it differs a little from standard way */
-       b43_nphy_bmac_clock_fgc(dev, 1);
+       b43_phy_force_clock(dev, 1);
        tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
        b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
        b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
-       b43_nphy_bmac_clock_fgc(dev, 0);
+       b43_phy_force_clock(dev, 0);
 
        b43_mac_phy_clock_set(dev, true);