]> Pileus Git - ~andy/linux/commitdiff
IXGBE: Set the SW prio_tc values at initialization to the HW setting.
authorAmir Hanania <amir.hanania@intel.com>
Thu, 18 Apr 2013 04:23:52 +0000 (04:23 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Tue, 21 May 2013 10:14:21 +0000 (03:14 -0700)
Set the SW prio_tc values at initialization to the HW setting.
Setting the SW prio_tc default values to be the HW setting by reading the
rtrup2tc register. For any TC change we need to reset the device.
This will remove the need to reset the device at the first
time we call ixgbe_dcbnl_ieee_setets.

Signed-off-by: Amir Hanania <amir.hanania@intel.com>
Tested-by: Jack Morgan<jack.morgan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h
drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h
drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c

index 1f2c805684dd3ee46027d49ca8289b8d4d63b4e9..e055e000131bdcf0c32280270361c957d0a4d8a0 100644 (file)
@@ -380,3 +380,26 @@ s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw,
        }
        return 0;
 }
+
+static void ixgbe_dcb_read_rtrup2tc_82599(struct ixgbe_hw *hw, u8 *map)
+{
+       u32 reg, i;
+
+       reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
+       for (i = 0; i < MAX_USER_PRIORITY; i++)
+               map[i] = IXGBE_RTRUP2TC_UP_MASK &
+                       (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT));
+       return;
+}
+
+void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
+{
+       switch (hw->mac.type) {
+       case ixgbe_mac_82599EB:
+       case ixgbe_mac_X540:
+               ixgbe_dcb_read_rtrup2tc_82599(hw, map);
+               break;
+       default:
+               break;
+       }
+}
index 1634de8b627f179a99b3836b37bd69af54fbbfaf..fc0a2dd5249956bf19ba836bad5c2d92d61b1b60 100644 (file)
@@ -159,6 +159,8 @@ s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,
 s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *tc_prio);
 s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *);
 
+void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map);
+
 /* DCB definitions for credit calculation */
 #define DCB_CREDIT_QUANTUM     64   /* DCB Quantum */
 #define MAX_CREDIT_REFILL       511  /* 0x1FF * 64B = 32704B */
index a4ef07631d1e349aafd5d8f0a110acdafdccd279..d71d9ce3e394b4199f297ebbcb493fa268092dd2 100644 (file)
@@ -45,6 +45,7 @@
 
 /* Receive UP2TC mapping */
 #define IXGBE_RTRUP2TC_UP_SHIFT 3
+#define IXGBE_RTRUP2TC_UP_MASK 7
 /* Transmit UP2TC mapping */
 #define IXGBE_RTTUP2TC_UP_SHIFT 3
 
index f3d68f9696ba0b9b6e430ec38574bd3472b75bce..edd89a1ef27f67f0f40d0cefba9ebed3e39f3185 100644 (file)
@@ -554,6 +554,9 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
                for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
                        adapter->ixgbe_ieee_ets->prio_tc[i] =
                                IEEE_8021QAZ_MAX_TCS;
+               /* if possible update UP2TC mappings from HW */
+               ixgbe_dcb_read_rtrup2tc(&adapter->hw,
+                                       adapter->ixgbe_ieee_ets->prio_tc);
        }
 
        for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {