]> Pileus Git - ~andy/linux/commitdiff
mtd: nand: add sanity check of ecc strength to nand_scan_tail()
authorMike Dunn <mikedunn@newsguy.com>
Wed, 25 Apr 2012 19:06:10 +0000 (12:06 -0700)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Mon, 14 May 2012 04:12:41 +0000 (23:12 -0500)
This patch adds sanity checks that ensure that drivers for controllers with
hardware ECC set the 'strength' element in struct nand_ecc_ctrl.  Also stylistic
changes to the line that calculates strength for software ECC.

This v2 simplifies the check.  Thanks Brian!¹

¹ http://lists.infradead.org/pipermail/linux-mtd/2012-April/040890.html

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/nand_base.c

index 8718eaf8269fc97e57dab9e72d8edebe3fea52e3..9f5d339a361090b311f7271417417f8b70f02567 100644 (file)
@@ -3348,8 +3348,13 @@ int nand_scan_tail(struct mtd_info *mtd)
                if (!chip->ecc.write_oob)
                        chip->ecc.write_oob = nand_write_oob_syndrome;
 
-               if (mtd->writesize >= chip->ecc.size)
+               if (mtd->writesize >= chip->ecc.size) {
+                       if (!chip->ecc.strength) {
+                               pr_warn("Driver must set ecc.strength when using hardware ECC\n");
+                               BUG();
+                       }
                        break;
+               }
                pr_warn("%d byte HW ECC not possible on "
                           "%d byte page size, fallback to SW ECC\n",
                           chip->ecc.size, mtd->writesize);
@@ -3404,7 +3409,7 @@ int nand_scan_tail(struct mtd_info *mtd)
                        BUG();
                }
                chip->ecc.strength =
-                       chip->ecc.bytes*8 / fls(8*chip->ecc.size);
+                       chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
                break;
 
        case NAND_ECC_NONE: