]> Pileus Git - ~andy/linux/commitdiff
powerpc/mpic: Fix irq distribution problem when MPIC_SINGLE_DEST_CPU
authorchenhui zhao <chenhui.zhao@freescale.com>
Mon, 27 May 2013 21:59:43 +0000 (21:59 +0000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 31 May 2013 22:29:24 +0000 (08:29 +1000)
For the mpic with a flag MPIC_SINGLE_DEST_CPU, only one bit should be
set in interrupt destination registers.

The code is applicable to 64-bit platforms as well as 32-bit.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
arch/powerpc/sysdev/mpic.c

index 0a13ecb270c7d0c30ac3ea2613bf7a4f76552f69..3cc2f9159ab1185f9f8f00ccefbcac14995ae6b1 100644 (file)
@@ -54,7 +54,7 @@ static DEFINE_RAW_SPINLOCK(mpic_lock);
 
 #ifdef CONFIG_PPC32    /* XXX for now */
 #ifdef CONFIG_IRQ_ALL_CPUS
-#define distribute_irqs        (!(mpic->flags & MPIC_SINGLE_DEST_CPU))
+#define distribute_irqs        (1)
 #else
 #define distribute_irqs        (0)
 #endif
@@ -1703,7 +1703,7 @@ void mpic_setup_this_cpu(void)
         * it differently, then we should make sure we also change the default
         * values of irq_desc[].affinity in irq.c.
         */
-       if (distribute_irqs) {
+       if (distribute_irqs && !(mpic->flags & MPIC_SINGLE_DEST_CPU)) {
                for (i = 0; i < mpic->num_sources ; i++)
                        mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION),
                                mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION)) | msk);