]> Pileus Git - ~andy/linux/commitdiff
drm/radeon/kms: fix tiling reg on fusion
authorAlex Deucher <alexdeucher@gmail.com>
Wed, 11 May 2011 07:15:24 +0000 (03:15 -0400)
committerDave Airlie <airlied@redhat.com>
Fri, 13 May 2011 06:15:39 +0000 (16:15 +1000)
The location of MC_ARB_RAMCFG changed on fusion.
I've diffed all the other regs in evergreend.h and this
is the only other reg that changed.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/evergreend.h

index c20eac3379e67f055f0d18ec89174ff4eb166e44..9073e3bfb08c7cde39ee411700e0ba838611fc2c 100644 (file)
@@ -1780,7 +1780,10 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
 
 
        mc_shared_chmap = RREG32(MC_SHARED_CHMAP);
-       mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);
+       if (rdev->flags & RADEON_IS_IGP)
+               mc_arb_ramcfg = RREG32(FUS_MC_ARB_RAMCFG);
+       else
+               mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);
 
        switch (rdev->config.evergreen.max_tile_pipes) {
        case 1:
index 94533849927e4ef473fcbfc19deb8f67b28464e8..fc40e0cc34516bb96af19f1a7615b6889a7425e3 100644 (file)
 #define                BURSTLENGTH_SHIFT                               9
 #define                BURSTLENGTH_MASK                                0x00000200
 #define                CHANSIZE_OVERRIDE                               (1 << 11)
+#define        FUS_MC_ARB_RAMCFG                               0x2768
 #define        MC_VM_AGP_TOP                                   0x2028
 #define        MC_VM_AGP_BOT                                   0x202C
 #define        MC_VM_AGP_BASE                                  0x2030